From: "H. Peter Anvin" <hpa@zytor.com>
To: Ondrej Zary <linux@rainbow-software.org>
Cc: Linux-pm mailing list <linux-pm@lists.linux-foundation.org>,
Kernel development list <linux-kernel@vger.kernel.org>,
Alan Stern <stern@rowland.harvard.edu>,
Len Brown <len.brown@intel.com>, Pavel Machek <pavel@ucw.cz>,
"Rafael J. Wysocki" <rjw@sisk.pl>
Subject: Re: [PATCH] [RFC] Save/restore MISC_ENABLE register
Date: Mon, 07 Jun 2010 10:27:23 -0700 [thread overview]
Message-ID: <4C0D2BFB.2090200@zytor.com> (raw)
In-Reply-To: <201006071814.53583.linux@rainbow-software.org>
On 06/07/2010 09:14 AM, Ondrej Zary wrote:
> Save/restore MISC_ENABLE register on suspend/resume.
> This fixes OOPS (invalid opcode) on resume from STR on Asus P4P800-VM, which
> wakes up with MWAIT disabled.
>
> Is this a correct thing to do? Is it OK on x86_64?
This MSR isn't available on all processors, and thus cannot be saved and
restored unconditionally like this. On the save path, one can use
rdmsr_safe(); on the wakeup path it's not clear to me it is safe to do
so, so it would be better to save a presence flag on the save path and
conditionalize the write.
-hpa
next prev parent reply other threads:[~2010-06-07 17:35 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-07 16:14 [PATCH] [RFC] Save/restore MISC_ENABLE register Ondrej Zary
2010-06-07 17:27 ` H. Peter Anvin [this message]
2010-06-07 18:51 ` Ondrej Zary
2010-06-07 18:53 ` H. Peter Anvin
2010-06-07 19:02 ` Ondrej Zary
2010-06-07 21:05 ` Rafael J. Wysocki
2010-06-07 21:06 ` H. Peter Anvin
2010-06-07 21:09 ` Alan Stern
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