From: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
To: "H. Peter Anvin" <hpa@zytor.com>, Matthew Wilcox <matthew@wil.cx>
Cc: tglx@linutronix.de, mingo@redhat.com,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
macro@linux-mips.org, kamezawa.hiroyu@jp.fujitsu.com,
eike-kernel@sf-tec.de
Subject: Re: [PATCH 1/2] x86: ioremap: fix wrong physical address handling
Date: Thu, 17 Jun 2010 13:55:22 +0900 [thread overview]
Message-ID: <4C19AABA.8000706@jp.fujitsu.com> (raw)
In-Reply-To: <4C19A2EE.2010203@zytor.com>
(2010/06/17 13:22), H. Peter Anvin wrote:
> On 06/16/2010 07:50 PM, Matthew Wilcox wrote:
>> On Thu, Jun 17, 2010 at 10:30:06AM +0900, Kenji Kaneshige wrote:
>>> Index: linux-2.6.34/arch/x86/mm/ioremap.c
>>> ===================================================================
>>> --- linux-2.6.34.orig/arch/x86/mm/ioremap.c 2010-06-15
>>> 04:43:00.978332015 +0900
>>> +++ linux-2.6.34/arch/x86/mm/ioremap.c 2010-06-15 05:32:59.291693007
>>> +0900
>>> @@ -62,8 +62,8 @@
>>> static void __iomem *__ioremap_caller(resource_size_t phys_addr,
>>> unsigned long size, unsigned long prot_val, void *caller)
>>> {
>>> - unsigned long pfn, offset, vaddr;
>>> - resource_size_t last_addr;
>>> + unsigned long offset, vaddr;
>>> + resource_size_t pfn, last_pfn, last_addr;
>>
>> I have a hard time understanding this change. pfn is always a physical
>> address shifted by PAGE_SHIFT. So a 32-bit pfn supports up to 44-bit
>> physical addresses. Are your addresses above 44-bits?
>>
>
> I think they might be. Kenji?
No. My addresses are in the 44-bits range (around fc000000000). So it is
not required for my problem. This change assumes that phys_addr can be
above 44-bits (up to 52-bits (and higher in the future?)).
By the way, is there linux kernel limit regarding above 44-bits physical
address in x86_32 PAE? For example, pfn above 32-bits is not supported?
#ifdef CONFIG_X86_PAE
/* 44=32+12, the limit we can fit into an unsigned long pfn */
#define __PHYSICAL_MASK_SHIFT 44
#define __VIRTUAL_MASK_SHIFT 32
If there is 44-bits physical address limit, I think it's better to use
PHYSICAL_PAGE_MASK for masking physical address, instead of "(phys_addr
>> PAGE_SHIFT) << PAGE_SHIFT)". The PHYSICAL_PAGE_MASK would become
greater value when 44-bits physical address limit is eliminated. And
maybe we need to change phys_addr_valid() returns error if physical
address is above (1 << __PHYSICAL_MASK_SHIFT)?
Thanks,
Kenji Kaneshige
next prev parent reply other threads:[~2010-06-17 4:56 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-17 1:28 [BUG][PATCH 0/2 (v.2)] x86: ioremap() problem in X86_32 PAE Kenji Kaneshige
2010-06-17 1:30 ` [PATCH 1/2] x86: ioremap: fix wrong physical address handling Kenji Kaneshige
2010-06-17 2:50 ` Matthew Wilcox
2010-06-17 4:22 ` H. Peter Anvin
2010-06-17 4:55 ` Kenji Kaneshige [this message]
2010-06-17 6:03 ` H. Peter Anvin
2010-06-17 6:21 ` Kenji Kaneshige
2010-06-17 9:35 ` Jeremy Fitzhardinge
2010-06-17 9:38 ` Jeremy Fitzhardinge
2010-06-17 13:46 ` H. Peter Anvin
2010-06-18 0:32 ` Kenji Kaneshige
2010-06-18 0:22 ` Kenji Kaneshige
2010-07-09 4:24 ` Simon Horman
2010-07-09 5:33 ` Jeremy Fitzhardinge
2010-07-09 6:10 ` Simon Horman
2010-06-17 6:28 ` Kenji Kaneshige
2010-07-09 18:31 ` [tip:x86/mm] x86, pae: Fix handling of large physical addresses in ioremap tip-bot for Kenji Kaneshige
2010-07-09 18:43 ` H. Peter Anvin
2010-06-17 1:31 ` [PATCH 2/2] x86: ioremap: fix normal ram range check Kenji Kaneshige
2010-07-09 18:31 ` [tip:x86/mm] x86, ioremap: Fix " tip-bot for Kenji Kaneshige
-- strict thread matches above, loose matches on Subject: below --
2010-06-18 3:21 [BUG][PATCH 0/2 (v.3)] x86: ioremap() problem in X86_32 PAE Kenji Kaneshige
2010-06-18 3:22 ` [PATCH 1/2] x86: ioremap: fix wrong physical address handling Kenji Kaneshige
2010-06-18 11:07 ` Jeremy Fitzhardinge
2010-06-21 1:40 ` Kenji Kaneshige
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