From: Nicolas Ferre <nicolas.ferre@atmel.com>
To: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: avictor.za@gmail.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] AT91: PM: dual ram controller support
Date: Mon, 21 Jun 2010 14:55:30 +0200 [thread overview]
Message-ID: <4C1F6142.3050004@atmel.com> (raw)
In-Reply-To: <1273492287-7647-1-git-send-email-nicolas.ferre@atmel.com>
Le 10/05/2010 13:51, Nicolas Ferre :
> This rework allows to address tow memory controllers. AT91SAM9263 and
> AT91SAM9G45 family have tow SDRAM or DDR/SDRAM controllers. Power management
> should take care of this.
> This patch modify the way RAM IP header files are implemented to allow
> access to registers of both controllers ; it also adds some macros.
>
> We also modify the power management files to use those modified header files.
> Slow clock (assembly) and regular power management functions are synchronized
> for setting of RAM self-refresh procedure:
> (lpr & ~AT91_DDRSDRC_LPCB) | AT91_DDRSDRC_LPCB_SELF_REFRESH
Queued as patch 6185/1 with Ack from Andrew Victor.
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6185/1
Best regards,
--
Nicolas Ferre
prev parent reply other threads:[~2010-06-21 12:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-10 11:51 [PATCH] AT91: PM: dual ram controller support Nicolas Ferre
2010-06-21 12:55 ` Nicolas Ferre [this message]
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