From: "H. Peter Anvin" <hpa@zytor.com>
To: djwong@us.ibm.com
Cc: Andrew Morton <akpm@linux-foundation.org>,
mingo@redhat.com, linux-kernel@vger.kernel.org, muli@il.ibm.com,
cschultz@linux.vnet.ibm.com, stable@kernel.org,
tglx@linutronix.de, mingo@elte.hu,
linux-tip-commits@vger.kernel.org
Subject: Re: [PATCH] x86, Calgary: Increase max PHB number
Date: Wed, 30 Jun 2010 16:05:42 -0700 [thread overview]
Message-ID: <4C2BCDC6.1010004@zytor.com> (raw)
In-Reply-To: <20100630214923.GP15515@tux1.beaverton.ibm.com>
On 06/30/2010 02:49 PM, Darrick J. Wong wrote:
> Newer systems (x3950M2) can have 48 PHBs per chassis and 4 chassis, so bump the
> limits up and provide an explanation of the requirements for each class. Since
> we can't have more than 256 PCI buses in these systems, we don't need the array
> check.
The 384-entry patch is already upstream. Can you send a patch relative
to current -linus?
-hpa
next prev parent reply other threads:[~2010-06-30 23:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-21 18:41 [PATCH RESEND] (revised) Calgary: increase max PHB number Corinna Schultz
2010-06-24 21:26 ` Darrick J. Wong
2010-06-25 14:14 ` Ingo Molnar
2010-06-25 15:29 ` [tip:x86/urgent] x86, Calgary: Increase " tip-bot for Darrick J. Wong
2010-06-29 22:51 ` Andrew Morton
2010-06-30 21:31 ` H. Peter Anvin
2010-06-30 21:45 ` Darrick J. Wong
2010-06-30 21:49 ` [PATCH] " Darrick J. Wong
2010-06-30 23:05 ` H. Peter Anvin [this message]
2010-07-01 0:45 ` Darrick J. Wong
2010-07-01 5:45 ` [tip:x86/urgent] x86, Calgary: Limit the max PHB number to 256 tip-bot for Darrick J. Wong
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