* [PATCH 1/7] coresight: move struct tracectx inside etm driver
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-07-25 17:05 ` [PATCH 2/7] coresight: add ETM management registers Alexander Shishkin
` (8 subsequent siblings)
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Alexander Shishkin, Russell King, linux-kernel
This is done so as to be able to make use of the coresight components'
registers in assembler code (like omap sleep code). Also, there shouldn't
be any users of this structure outside the etm driver.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/include/asm/hardware/coresight.h | 12 ------------
arch/arm/kernel/etm.c | 15 +++++++++++++++
2 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
index f82b25d..8838be1 100644
--- a/arch/arm/include/asm/hardware/coresight.h
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -21,18 +21,6 @@
#define TRACER_RUNNING BIT(TRACER_RUNNING_BIT)
#define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT)
-struct tracectx {
- unsigned int etb_bufsz;
- void __iomem *etb_regs;
- void __iomem *etm_regs;
- unsigned long flags;
- int ncmppairs;
- int etm_portsz;
- struct device *dev;
- struct clk *emu_clk;
- struct mutex mutex;
-};
-
#define TRACER_TIMEOUT 10000
#define etm_writel(t, v, x) \
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 8277539..47a38af 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -30,6 +30,21 @@
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Alexander Shishkin");
+/*
+ * ETM tracer state
+ */
+struct tracectx {
+ unsigned int etb_bufsz;
+ void __iomem *etb_regs;
+ void __iomem *etm_regs;
+ unsigned long flags;
+ int ncmppairs;
+ int etm_portsz;
+ struct device *dev;
+ struct clk *emu_clk;
+ struct mutex mutex;
+};
+
static struct tracectx tracer;
static inline bool trace_isrunning(struct tracectx *t)
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 2/7] coresight: add ETM management registers
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
2010-07-25 17:05 ` [PATCH 1/7] coresight: move struct tracectx inside etm driver Alexander Shishkin
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-07-25 17:05 ` [PATCH 3/7] coresight: cosmetic fixes Alexander Shishkin
` (7 subsequent siblings)
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Alexander Shishkin, Russell King, linux-kernel
Add notion of ETM OS lock, save and restore registers.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/include/asm/hardware/coresight.h | 8 ++++++--
arch/arm/kernel/etm.c | 2 +-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
index 8838be1..d846051 100644
--- a/arch/arm/include/asm/hardware/coresight.h
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -36,8 +36,6 @@
/* CoreSight Component Registers */
#define CSCR_CLASS 0xff4
-#define CSCR_PRSR 0x314
-
#define UNLOCK_MAGIC 0xc5acce55
/* ETM control register, "ETM Architecture", 3.3.1 */
@@ -120,6 +118,12 @@
ETMCTRL_BRANCH_OUTPUT | \
ETMCTRL_DO_CONTEXTID)
+/* ETM management registers, "ETM Architecture", 3.5.24 */
+#define ETMMR_OSLAR 0x300
+#define ETMMR_OSLSR 0x304
+#define ETMMR_OSSRR 0x308
+#define ETMMR_PDSR 0x314
+
/* ETB registers, "CoreSight Components TRM", 9.3 */
#define ETBR_DEPTH 0x04
#define ETBR_STATUS 0x0c
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 47a38af..d08062b 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -558,7 +558,7 @@ static int __init etm_probe(struct amba_device *dev, struct amba_id *id)
t->etm_portsz = 1;
etm_unlock(t);
- ret = etm_readl(t, CSCR_PRSR);
+ ret = etm_readl(t, ETMMR_PDSR);
t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf;
etm_writel(t, 0x440, ETMR_CTRL);
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 3/7] coresight: cosmetic fixes
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
2010-07-25 17:05 ` [PATCH 1/7] coresight: move struct tracectx inside etm driver Alexander Shishkin
2010-07-25 17:05 ` [PATCH 2/7] coresight: add ETM management registers Alexander Shishkin
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-07-25 17:05 ` [PATCH 4/7] etm: do a dummy read from OSSRR during initialization Alexander Shishkin
` (6 subsequent siblings)
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Alexander Shishkin, Russell King, linux-kernel
Use BIT() macro whenever it is sensible to do so.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/include/asm/hardware/coresight.h | 22 +++++++++++-----------
1 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h
index d846051..7ecd793 100644
--- a/arch/arm/include/asm/hardware/coresight.h
+++ b/arch/arm/include/asm/hardware/coresight.h
@@ -100,10 +100,10 @@
/* ETM status register, "ETM Architecture", 3.3.2 */
#define ETMR_STATUS (0x10)
-#define ETMST_OVERFLOW (1 << 0)
-#define ETMST_PROGBIT (1 << 1)
-#define ETMST_STARTSTOP (1 << 2)
-#define ETMST_TRIGGER (1 << 3)
+#define ETMST_OVERFLOW BIT(0)
+#define ETMST_PROGBIT BIT(1)
+#define ETMST_STARTSTOP BIT(2)
+#define ETMST_TRIGGER BIT(3)
#define etm_progbit(t) (etm_readl((t), ETMR_STATUS) & ETMST_PROGBIT)
#define etm_started(t) (etm_readl((t), ETMR_STATUS) & ETMST_STARTSTOP)
@@ -111,7 +111,7 @@
#define ETMR_TRACEENCTRL2 0x1c
#define ETMR_TRACEENCTRL 0x24
-#define ETMTE_INCLEXCL (1 << 24)
+#define ETMTE_INCLEXCL BIT(24)
#define ETMR_TRACEENEVT 0x20
#define ETMCTRL_OPTS (ETMCTRL_DO_CPRT | \
ETMCTRL_DATA_DO_ADDR | \
@@ -134,12 +134,12 @@
#define ETBR_CTRL 0x20
#define ETBR_FORMATTERCTRL 0x304
#define ETBFF_ENFTC 1
-#define ETBFF_ENFCONT (1 << 1)
-#define ETBFF_FONFLIN (1 << 4)
-#define ETBFF_MANUAL_FLUSH (1 << 6)
-#define ETBFF_TRIGIN (1 << 8)
-#define ETBFF_TRIGEVT (1 << 9)
-#define ETBFF_TRIGFL (1 << 10)
+#define ETBFF_ENFCONT BIT(1)
+#define ETBFF_FONFLIN BIT(4)
+#define ETBFF_MANUAL_FLUSH BIT(6)
+#define ETBFF_TRIGIN BIT(8)
+#define ETBFF_TRIGEVT BIT(9)
+#define ETBFF_TRIGFL BIT(10)
#define etb_writel(t, v, x) \
(__raw_writel((v), (t)->etb_regs + (x)))
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 4/7] etm: do a dummy read from OSSRR during initialization
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (2 preceding siblings ...)
2010-07-25 17:05 ` [PATCH 3/7] coresight: cosmetic fixes Alexander Shishkin
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-07-25 17:05 ` [PATCH 5/7] omap3: move EMU peripheral addresses to a platform header Alexander Shishkin
` (5 subsequent siblings)
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Alexander Shishkin, Russell King, linux-kernel
The first read from ETM OS save and restore register after the power
down bit deassertion returns garbage.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/kernel/etm.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index d08062b..73b824a 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -558,7 +558,9 @@ static int __init etm_probe(struct amba_device *dev, struct amba_id *id)
t->etm_portsz = 1;
etm_unlock(t);
- ret = etm_readl(t, ETMMR_PDSR);
+ (void)etm_readl(t, ETMMR_PDSR);
+ /* dummy first read */
+ (void)etm_readl(&tracer, ETMMR_OSSRR);
t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf;
etm_writel(t, 0x440, ETMR_CTRL);
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 5/7] omap3: move EMU peripheral addresses to a platform header
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (3 preceding siblings ...)
2010-07-25 17:05 ` [PATCH 4/7] etm: do a dummy read from OSSRR during initialization Alexander Shishkin
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-07-26 7:03 ` Shilimkar, Santosh
2010-07-25 17:05 ` [PATCH 6/7] save and restore etm state across core OFF modes Alexander Shishkin
` (4 subsequent siblings)
9 siblings, 1 reply; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Alexander Shishkin, Tony Lindgren, Russell King, Paul Walmsley,
Santosh Shilimkar, Kevin Hilman, linux-omap, linux-kernel
These addresses are also needed for the OFF code to save/restore the
contexts of the EMU peripherals correctly.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/emu.c | 14 ++++----------
arch/arm/plat-omap/include/plat/io.h | 20 ++++++++++++++++++++
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index 9c442e2..6b41745 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -24,19 +24,13 @@
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Alexander Shishkin");
-/* Cortex CoreSight components within omap3xxx EMU */
-#define ETM_BASE (L4_EMU_34XX_PHYS + 0x10000)
-#define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000)
-#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
-#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
-
static struct amba_device omap3_etb_device = {
.dev = {
.init_name = "etb",
},
.res = {
- .start = ETB_BASE,
- .end = ETB_BASE + SZ_4K - 1,
+ .start = OMAP34XX_ETB_PHYS,
+ .end = OMAP34XX_ETB_PHYS + OMAP34XX_ETB_SIZE - 1,
.flags = IORESOURCE_MEM,
},
.periphid = 0x000bb907,
@@ -47,8 +41,8 @@ static struct amba_device omap3_etm_device = {
.init_name = "etm",
},
.res = {
- .start = ETM_BASE,
- .end = ETM_BASE + SZ_4K - 1,
+ .start = OMAP34XX_ETM_PHYS,
+ .end = OMAP34XX_ETM_PHYS + OMAP34XX_ETM_SIZE - 1,
.flags = IORESOURCE_MEM,
},
.periphid = 0x102bb921,
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 128b549..81f736a 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -185,6 +185,26 @@
/* 3430 IVA - currently unmapped */
+#define OMAP34XX_DBG_OFFSET (0x00011000)
+#define OMAP34XX_DBG_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_DBG_OFFSET)
+#define OMAP34XX_DBG_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_DBG_OFFSET)
+#define OMAP34XX_DBG_SIZE SZ_4K
+
+#define OMAP34XX_ETM_OFFSET (0x00010000)
+#define OMAP34XX_ETM_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_ETM_OFFSET)
+#define OMAP34XX_ETM_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_ETM_OFFSET)
+#define OMAP34XX_ETM_SIZE SZ_4K
+
+#define OMAP34XX_ETB_OFFSET (0x0001b000)
+#define OMAP34XX_ETB_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_ETB_OFFSET)
+#define OMAP34XX_ETB_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_ETB_OFFSET)
+#define OMAP34XX_ETB_SIZE SZ_4K
+
+#define OMAP34XX_DAP_OFFSET (0x0001d000)
+#define OMAP34XX_DAP_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_DAP_OFFSET)
+#define OMAP34XX_DAP_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_DAP_OFFSET)
+#define OMAP34XX_DAP_SIZE SZ_4K
+
/*
* ----------------------------------------------------------------------------
* Omap4 specific IO mapping
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* RE: [PATCH 5/7] omap3: move EMU peripheral addresses to a platform header
2010-07-25 17:05 ` [PATCH 5/7] omap3: move EMU peripheral addresses to a platform header Alexander Shishkin
@ 2010-07-26 7:03 ` Shilimkar, Santosh
0 siblings, 0 replies; 25+ messages in thread
From: Shilimkar, Santosh @ 2010-07-26 7:03 UTC (permalink / raw)
To: Alexander Shishkin, linux-arm-kernel@lists.infradead.org
Cc: Tony Lindgren, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org
> -----Original Message-----
> From: Alexander Shishkin [mailto:virtuoso@slind.org]
> Sent: Sunday, July 25, 2010 10:35 PM
> To: linux-arm-kernel@lists.infradead.org
> Cc: Alexander Shishkin; Tony Lindgren; Russell King; Paul Walmsley;
> Shilimkar, Santosh; Kevin Hilman; linux-omap@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Subject: [PATCH 5/7] omap3: move EMU peripheral addresses to a platform
> header
>
> These addresses are also needed for the OFF code to save/restore the
> contexts of the EMU peripherals correctly.
>
> Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Paul Walmsley <paul@pwsan.com>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Cc: Kevin Hilman <khilman@deeprootsystems.com>
> Cc: linux-omap@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/arm/mach-omap2/emu.c | 14 ++++----------
> arch/arm/plat-omap/include/plat/io.h | 20 ++++++++++++++++++++
> 2 files changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
> index 9c442e2..6b41745 100644
> --- a/arch/arm/mach-omap2/emu.c
> +++ b/arch/arm/mach-omap2/emu.c
> @@ -24,19 +24,13 @@
> MODULE_LICENSE("GPL");
> MODULE_AUTHOR("Alexander Shishkin");
>
> -/* Cortex CoreSight components within omap3xxx EMU */
> -#define ETM_BASE (L4_EMU_34XX_PHYS + 0x10000)
> -#define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000)
> -#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
> -#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
> -
> static struct amba_device omap3_etb_device = {
> .dev = {
> .init_name = "etb",
> },
> .res = {
> - .start = ETB_BASE,
> - .end = ETB_BASE + SZ_4K - 1,
> + .start = OMAP34XX_ETB_PHYS,
> + .end = OMAP34XX_ETB_PHYS + OMAP34XX_ETB_SIZE - 1,
> .flags = IORESOURCE_MEM,
> },
> .periphid = 0x000bb907,
> @@ -47,8 +41,8 @@ static struct amba_device omap3_etm_device = {
> .init_name = "etm",
> },
> .res = {
> - .start = ETM_BASE,
> - .end = ETM_BASE + SZ_4K - 1,
> + .start = OMAP34XX_ETM_PHYS,
> + .end = OMAP34XX_ETM_PHYS + OMAP34XX_ETM_SIZE - 1,
> .flags = IORESOURCE_MEM,
> },
> .periphid = 0x102bb921,
> diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-
> omap/include/plat/io.h
> index 128b549..81f736a 100644
> --- a/arch/arm/plat-omap/include/plat/io.h
> +++ b/arch/arm/plat-omap/include/plat/io.h
> @@ -185,6 +185,26 @@
>
> /* 3430 IVA - currently unmapped */
>
> +#define OMAP34XX_DBG_OFFSET (0x00011000)
> +#define OMAP34XX_DBG_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_DBG_OFFSET)
> +#define OMAP34XX_DBG_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_DBG_OFFSET)
> +#define OMAP34XX_DBG_SIZE SZ_4K
> +
> +#define OMAP34XX_ETM_OFFSET (0x00010000)
> +#define OMAP34XX_ETM_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_ETM_OFFSET)
> +#define OMAP34XX_ETM_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_ETM_OFFSET)
> +#define OMAP34XX_ETM_SIZE SZ_4K
> +
> +#define OMAP34XX_ETB_OFFSET (0x0001b000)
> +#define OMAP34XX_ETB_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_ETB_OFFSET)
> +#define OMAP34XX_ETB_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_ETB_OFFSET)
> +#define OMAP34XX_ETB_SIZE SZ_4K
> +
> +#define OMAP34XX_DAP_OFFSET (0x0001d000)
> +#define OMAP34XX_DAP_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_DAP_OFFSET)
> +#define OMAP34XX_DAP_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_DAP_OFFSET)
> +#define OMAP34XX_DAP_SIZE SZ_4K
> +
Changes looks good to me.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 6/7] save and restore etm state across core OFF modes
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (4 preceding siblings ...)
2010-07-25 17:05 ` [PATCH 5/7] omap3: move EMU peripheral addresses to a platform header Alexander Shishkin
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-07-25 18:34 ` Hari Kanigeri
2010-07-30 12:16 ` [PATCH 6/7] " Alexander Shishkin
2010-07-25 17:05 ` [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
` (3 subsequent siblings)
9 siblings, 2 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Alexander Shishkin, Richard Woodruff, Tony Lindgren, Russell King,
Paul Walmsley, Kevin Hilman, linux-omap, linux-kernel
This prevents ETM stalls whenever core enters OFF mode. Original patch
author is Richard Woodruff <r-woodruff2@ti.com>.
This version of the patch makes use of the ETM OS save/restore mechanism,
which takes about 55 words in omap3_arm_context[] instead of 128. Also,
saving ETM context can be switched on/off at runtime.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/Kconfig | 9 ++
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 135 +++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/control.h | 2 +-
4 files changed, 146 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b48bacf..0413d88 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -243,6 +243,15 @@ config MACH_OMAP4_PANDA
default y
depends on ARCH_OMAP4
+config ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ bool "Enable hardware emulation context save and restore"
+ depends on ARCH_OMAP3
+ default y
+ help
+ This option enables JTAG & ETM debugging across power states.
+ With out this option emulation features are reset across OFF
+ mode state changes.
+
config OMAP3_EMU
bool "OMAP3 debugging peripherals"
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index a8d20ee..22dd240 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -93,7 +93,7 @@ void *omap3_secure_ram_storage;
* The address is stored in scratchpad, so that it can be used
* during the restore path.
*/
-u32 omap3_arm_context[128];
+u32 omap3_arm_context[256];
struct omap3_control_regs {
u32 sysconfig;
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index d522cd7..cd6a1d4 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -28,6 +28,7 @@
#include <asm/assembler.h>
#include <mach/io.h>
#include <plat/control.h>
+#include <asm/hardware/coresight.h>
#include "cm.h"
#include "prm.h"
@@ -226,6 +227,18 @@ loop:
nop
bl wait_sdrc_ok
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Restore Coresight debug registers
+ */
+ ldr r6, debug_vbase /* base Vaddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ ldr r6, etm_vbase /* base Vaddr of ETM */
+ bl unlock_debug /* remove global lock if set */
+ str r6, [r6, #ETMMR_OSLAR] /* clear OSLAR lock using non-key */
+#endif
+
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
/*b restore_es3*/ @ Enable to debug restore code
@@ -385,6 +398,44 @@ logic_l1_restore:
/*normal memory remap register */
MCR p15, 0, r5, c10, c2, 1
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Restore Coresight debug registers
+ */
+ ldr r6, debug_pbase /* base paddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ str r4, [r6, #ETMMR_OSLAR] /* reset-pointer (already locked) */
+ ldr r4, [r6, #ETMMR_OSSRR] /* dummy read */
+ ldr r4, [r3], #4 /* load save size */
+ cmp r4, #0 /* check for zero */
+debug_restore:
+ ittt ne /* t2/compat if-then block */
+ ldrne r5, [r3], #4 /* get saved value */
+ strne r5, [r6,#ETMMR_OSSRR] /* restore saved value */
+ subnes r4, r4, #1 /* decrement loop */
+ bne debug_restore /* loop till done */
+ str r5, [r6, #ETMMR_OSSRR] /* clear lock */
+ /*
+ * Restore CoreSight ETM registers
+ */
+ ldr r6, etm_pbase /* base paddr of ETM */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ str r4, [r6, #ETMMR_OSLAR] /* reset-pointer (already locked) */
+ ldr r4, [r6, #ETMMR_OSSRR] /* dummy read */
+ ldr r4, [r3], #4 /* load save size */
+ cmp r4, #0 /* check for zero */
+ beq etm_skip
+etm_restore:
+ ldrne r5, [r3], #4 /* get saved value */
+ strne r5, [r6, #ETMMR_OSSRR] /* restore saved value */
+ subnes r4, r4, #1 /* decrement loop */
+ bne etm_restore /* loop till done */
+etm_skip:
+ str r6, [r6, #ETMMR_OSLAR] /* remove OS lock */
+#endif
+
/* Restore cpsr */
ldmia r3!,{r4} /*load CPSR from SDRAM*/
msr cpsr, r4 /*store cpsr */
@@ -506,6 +557,48 @@ l1_logic_lost:
mrc p15, 0, r5, c10, c2, 1
stmia r8!,{r4-r5}
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Save Coresight debug registers
+ */
+ ldr r4, do_etm_save
+ cmp r4, #0
+ streq r4, [r8], #4 /* 0 for coresight saved size */
+ streq r4, [r8], #4 /* 0 for ETM saved size */
+ beq etm_skip_save
+ ldr r6, debug_vbase /* base vaddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* force global unlock */
+ str r4, [r6, #ETMMR_OSLAR] /* lock debug access */
+ ldr r4, [r6, #ETMMR_OSSRR] /* OSSRR returns size on first read */
+ str r4, [r8], #4 /* push item to save area */
+ cmp r4, #0 /* zero check */
+debug_save:
+ ittt ne /* thumb 2 compat if-then block */
+ ldrne r5, [r6, #ETMMR_OSSRR] /* get reg value */
+ strne r5, [r8], #4 /* push item to save area */
+ subnes r4, r4, #1 /* decrement size */
+ bne debug_save /* loop till done */
+ str r6, [r6, #ETMMR_OSLAR] /* unlock debug access */
+ /*
+ * Save etm registers
+ */
+ ldr r6, etm_vbase /* base vaddr of ETM */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* force global unlock */
+ str r4, [r6, #ETMMR_OSLAR] /* lock OS access to trace regs */
+ ldr r4, [r6, #ETMMR_OSSRR] /* OSSRR returns size on first read */
+ str r4, [r8], #4 /* push size to save area */
+ cmp r4, #0 /* zero check */
+etm_save:
+ ldrne r5, [r6, #ETMMR_OSSRR] /* get reg value */
+ strne r5, [r8], #4 /* push item to save area */
+ subnes r4, r4, #1 /* decrement size */
+ bne etm_save /* loop till done */
+ str r6, [r6, #ETMMR_OSLAR] /* unlock debug access */
+etm_skip_save:
+#endif
+
/* Store current cpsr*/
mrs r2, cpsr
stmia r8!, {r2}
@@ -520,6 +613,7 @@ clean_caches:
cmp r9, #1 /* Check whether L2 inval is required or not*/
bne skip_l2_inval
clean_l2:
+#ifndef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
/* read clidr */
mrc p15, 1, r0, c0, c0, 1
/* extract loc from clidr */
@@ -586,6 +680,12 @@ finished:
/* select current cache level in cssr */
mcr p15, 2, r10, c0, c0, 0
isb
+#else
+ ldr r1, kernel_flush /* get 32 bit addr of flush */
+ mov lr, pc /* prepare for return */
+ bx r1 /* do it */
+#endif
+
skip_l2_inval:
/* Data memory barrier and Data sync barrier */
mov r1, #0
@@ -632,6 +732,36 @@ wait_dll_lock:
bne wait_dll_lock
bx lr
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * unlock debug:
+ * Input:
+ * r6 has base address of emulation
+ * r4 has unlock key
+ * Output
+ * r5 has PDS value (1=accessable)
+ */
+unlock_debug:
+ ldr r5, [r6, #CSMR_LOCKSTATUS] /* get LSR */
+ cmp r5, #0x3 /* need unlocking? */
+ streq r4, [r6, #CSMR_LOCKACCESS] /* unlock if so */
+ ldr r5, [r6, #ETMMR_PDSR] /* clear power status */
+ bx lr /* back to caller */
+
+debug_vbase:
+ .word OMAP34XX_DBG_VIRT
+debug_pbase:
+ .word OMAP34XX_DBG_PHYS
+etm_vbase:
+ .word OMAP34XX_ETM_VIRT
+etm_pbase:
+ .word OMAP34XX_ETM_PHYS
+debug_xlar_key:
+ .word UNLOCK_MAGIC
+#endif
+
+kernel_flush:
+ .word v7_flush_dcache_all
cm_idlest1_core:
.word CM_IDLEST1_CORE_V
sdrc_dlla_status:
@@ -668,5 +798,10 @@ cache_pred_disable_mask:
.word 0xFFFFE7FB
control_stat:
.word CONTROL_STAT
+/* this word needs to be at the end */
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+do_etm_save:
+ .word 0
+#endif
ENTRY(omap34xx_cpu_suspend_sz)
.word . - omap34xx_cpu_suspend
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 131bf40..537acbe 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -362,7 +362,7 @@ extern void omap3_save_scratchpad_contents(void);
extern void omap3_clear_scratchpad_contents(void);
extern u32 *get_restore_pointer(void);
extern u32 *get_es3_restore_pointer(void);
-extern u32 omap3_arm_context[128];
+extern u32 omap3_arm_context[256];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 6/7] save and restore etm state across core OFF modes
2010-07-25 17:05 ` [PATCH 6/7] save and restore etm state across core OFF modes Alexander Shishkin
@ 2010-07-25 18:34 ` Hari Kanigeri
2010-07-25 19:38 ` Alexander Shishkin
` (2 more replies)
2010-07-30 12:16 ` [PATCH 6/7] " Alexander Shishkin
1 sibling, 3 replies; 25+ messages in thread
From: Hari Kanigeri @ 2010-07-25 18:34 UTC (permalink / raw)
To: Alexander Shishkin
Cc: linux-arm-kernel, Richard Woodruff, Tony Lindgren, Russell King,
Paul Walmsley, Kevin Hilman, linux-omap, linux-kernel
> +config ENABLE_OFF_MODE_JTAG_ETM_DEBUG
> + bool "Enable hardware emulation context save and restore"
> + depends on ARCH_OMAP3
-- Shouldn't this be depends on OMAP3_EMU instead ?
> + default y
-- As this is debug option, can you keep this "n" by default ?
> + help
> + This option enables JTAG & ETM debugging across power states.
> + With out this option emulation features are reset across OFF
> + mode state changes.
> +
Hari
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 6/7] save and restore etm state across core OFF modes
2010-07-25 18:34 ` Hari Kanigeri
@ 2010-07-25 19:38 ` Alexander Shishkin
2010-07-25 21:04 ` [PATCH] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
2010-07-25 21:15 ` [PATCH] save and restore etm state across core OFF modes Alexander Shishkin
2 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 19:38 UTC (permalink / raw)
To: Hari Kanigeri
Cc: linux-arm-kernel, Richard Woodruff, Tony Lindgren, Russell King,
Paul Walmsley, Kevin Hilman, linux-omap, linux-kernel
On Sun, Jul 25, 2010 at 12:34:22 -0600, Hari Kanigeri wrote:
> > +config ENABLE_OFF_MODE_JTAG_ETM_DEBUG
> > + bool "Enable hardware emulation context save and restore"
> > + depends on ARCH_OMAP3
>
> -- Shouldn't this be depends on OMAP3_EMU instead ?
Not really. OMAP3_EMU will enable ETM/ETB drivers within omap, but this
particular patch is also needed if you're using an external hardware
debugger to debug code across OFF modes.
> > + default y
>
> -- As this is debug option, can you keep this "n" by default ?
This option allows for enabling certain debugging functionality in runtime
(via a sysfs file), which is turned off by default. It is debatable whether
this option should default to 'y' or 'n', seeing as it doesn't add much
overhead to the normal usecase.
> > + help
> > + This option enables JTAG & ETM debugging across power states.
> > + With out this option emulation features are reset across OFF
> > + mode state changes.
But I see that the wording is misleading and unclear, so I'll try to come
up with something more descriptive.
Regards,
--
Alex
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH] omap3: make coresight register save across OFF modes a sysfs option
2010-07-25 18:34 ` Hari Kanigeri
2010-07-25 19:38 ` Alexander Shishkin
@ 2010-07-25 21:04 ` Alexander Shishkin
2010-07-25 21:14 ` Alexander Shishkin
2010-07-26 6:58 ` Shilimkar, Santosh
2010-07-25 21:15 ` [PATCH] save and restore etm state across core OFF modes Alexander Shishkin
2 siblings, 2 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 21:04 UTC (permalink / raw)
To: Hari Kanigeri
Cc: Alexander Shishkin, linux-arm-kernel, Tony Lindgren, Russell King,
Paul Walmsley, Kevin Hilman, linux-omap, linux-kernel
This adds a sysfs file at /sys/power/coresight_save which is used to
control if the ETM and debug components' states should be saved and
restored across OFF modes.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/debug34xx.c | 66 +++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/pm.h | 6 +++
arch/arm/mach-omap2/pm34xx.c | 3 ++
4 files changed, 76 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/debug34xx.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f5b4ff4..3a64ce4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -49,6 +49,7 @@ ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
+obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-omap2/debug34xx.c
new file mode 100644
index 0000000..698e83a
--- /dev/null
+++ b/arch/arm/mach-omap2/debug34xx.c
@@ -0,0 +1,66 @@
+/*
+ * Control saving and restoring of coresight components' state during
+ * OFF mode.
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Alexander Shishkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/kobject.h>
+
+#include "pm.h"
+
+/*
+ * Pointer to a place in sram where the ETM/debug state save
+ * flag is. It can be calculated after the omap_sram_idle is
+ * pushed to sram.
+ */
+static unsigned int *_etm_save;
+
+/*
+ * sysfs file /sys/power/coresight_save controls whether the
+ * state of coresight components should be saved and restored
+ * across OFF modes.
+ */
+static ssize_t coresight_save_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ return sprintf(buf, "%u\n", *_etm_save);
+}
+
+static ssize_t coresight_save_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t n)
+{
+ unsigned int value;
+
+ if (sscanf(buf, "%u", &value) != 1)
+ return -EINVAL;
+
+ *_etm_save = !!value;
+
+ return n;
+}
+
+static struct kobj_attribute coresight_save_attr =
+ __ATTR(coresight_save, 0644, coresight_save_show, coresight_save_store);
+
+int omap3_coresight_pm_init(void *sram_addr)
+{
+ int ret;
+
+ /* the last word from the top of omap_sram_idle */
+ _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz - 4);
+
+ ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
+
+ return ret;
+}
+
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 3de6ece..0321834 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -76,6 +76,12 @@ extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
extern void save_secure_ram_context(u32 *addr);
extern void omap3_save_scratchpad_contents(void);
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+int omap3_coresight_pm_init(void *sram_addr);
+#else
+#define omap3_coresight_pm_init(x) do {} while (0)
+#endif
+
extern unsigned int omap24xx_idle_loop_suspend_sz;
extern unsigned int omap34xx_suspend_sz;
extern unsigned int save_secure_ram_context_sz;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fb4994a..c389e65 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1096,6 +1096,9 @@ static int __init omap3_pm_init(void)
core_clkdm = clkdm_lookup("core_clkdm");
omap_push_sram_idle();
+
+ omap3_coresight_pm_init(_omap_sram_idle);
+
#ifdef CONFIG_SUSPEND
suspend_set_ops(&omap_pm_ops);
#endif /* CONFIG_SUSPEND */
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH] omap3: make coresight register save across OFF modes a sysfs option
2010-07-25 21:04 ` [PATCH] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
@ 2010-07-25 21:14 ` Alexander Shishkin
2010-07-26 6:58 ` Shilimkar, Santosh
1 sibling, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 21:14 UTC (permalink / raw)
To: Hari Kanigeri
Cc: linux-arm-kernel, Tony Lindgren, Russell King, Paul Walmsley,
Kevin Hilman, linux-omap, linux-kernel
On Mon, Jul 26, 2010 at 12:04:23 +0300, Alexander Shishkin wrote:
> This adds a sysfs file at /sys/power/coresight_save which is used to
> control if the ETM and debug components' states should be saved and
> restored across OFF modes.
Oops, I wanted to resend the previous patch, but it's getting late here.
Sorry for the spam.
Regards,
--
Alex
^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH] omap3: make coresight register save across OFF modes a sysfs option
2010-07-25 21:04 ` [PATCH] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
2010-07-25 21:14 ` Alexander Shishkin
@ 2010-07-26 6:58 ` Shilimkar, Santosh
2010-07-26 7:32 ` Alexander Shishkin
1 sibling, 1 reply; 25+ messages in thread
From: Shilimkar, Santosh @ 2010-07-26 6:58 UTC (permalink / raw)
To: Alexander Shishkin, Hari Kanigeri
Cc: linux-arm-kernel@lists.infradead.org, Tony Lindgren, Russell King,
Paul Walmsley, Kevin Hilman, linux-omap@vger.kernel.org,
linux-kernel@vger.kernel.org
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Alexander Shishkin
> Sent: Monday, July 26, 2010 2:34 AM
> To: Hari Kanigeri
> Cc: Alexander Shishkin; linux-arm-kernel@lists.infradead.org; Tony
> Lindgren; Russell King; Paul Walmsley; Kevin Hilman; linux-
> omap@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: [PATCH] omap3: make coresight register save across OFF modes a
> sysfs option
>
> This adds a sysfs file at /sys/power/coresight_save which is used to
> control if the ETM and debug components' states should be saved and
> restored across OFF modes.
>
> Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Paul Walmsley <paul@pwsan.com>
> Cc: Kevin Hilman <khilman@deeprootsystems.com>
> Cc: linux-omap@vger.kernel.org
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/arm/mach-omap2/Makefile | 1 +
> arch/arm/mach-omap2/debug34xx.c | 66
> +++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/pm.h | 6 +++
> arch/arm/mach-omap2/pm34xx.c | 3 ++
> 4 files changed, 76 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-omap2/debug34xx.c
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index f5b4ff4..3a64ce4 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -49,6 +49,7 @@ ifeq ($(CONFIG_PM),y)
> obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
> obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
> obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
> +obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
> obj-$(CONFIG_PM_DEBUG) += pm-debug.o
>
> AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-
> omap2/debug34xx.c
> new file mode 100644
> index 0000000..698e83a
> --- /dev/null
> +++ b/arch/arm/mach-omap2/debug34xx.c
> @@ -0,0 +1,66 @@
> +/*
> + * Control saving and restoring of coresight components' state during
> + * OFF mode.
> + *
> + * Copyright (C) 2010 Nokia Corporation
> + * Alexander Shishkin
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/sysfs.h>
> +#include <linux/kobject.h>
> +
> +#include "pm.h"
> +
> +/*
> + * Pointer to a place in sram where the ETM/debug state save
> + * flag is. It can be calculated after the omap_sram_idle is
> + * pushed to sram.
> + */
> +static unsigned int *_etm_save;
> +
> +/*
> + * sysfs file /sys/power/coresight_save controls whether the
> + * state of coresight components should be saved and restored
> + * across OFF modes.
> + */
> +static ssize_t coresight_save_show(struct kobject *kobj,
> + struct kobj_attribute *attr,
> + char *buf)
> +{
> + return sprintf(buf, "%u\n", *_etm_save);
> +}
> +
> +static ssize_t coresight_save_store(struct kobject *kobj,
> + struct kobj_attribute *attr,
> + const char *buf, size_t n)
> +{
> + unsigned int value;
> +
> + if (sscanf(buf, "%u", &value) != 1)
> + return -EINVAL;
> +
> + *_etm_save = !!value;
> +
> + return n;
> +}
> +
> +static struct kobj_attribute coresight_save_attr =
> + __ATTR(coresight_save, 0644, coresight_save_show,
> coresight_save_store);
> +
> +int omap3_coresight_pm_init(void *sram_addr)
> +{
> + int ret;
> +
> + /* the last word from the top of omap_sram_idle */
> + _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz -
> 4);
> +
> + ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
> +
> + return ret;
> +}
Looking at content of this file, I think you can keep this under common
pm-debug.c file.
Any problems with that ?
> +
> diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
> index 3de6ece..0321834 100644
> --- a/arch/arm/mach-omap2/pm.h
> +++ b/arch/arm/mach-omap2/pm.h
> @@ -76,6 +76,12 @@ extern void omap34xx_cpu_suspend(u32 *addr, int
> save_state);
> extern void save_secure_ram_context(u32 *addr);
> extern void omap3_save_scratchpad_contents(void);
>
> +#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
> +int omap3_coresight_pm_init(void *sram_addr);
> +#else
> +#define omap3_coresight_pm_init(x) do {} while (0)
> +#endif
> +
> extern unsigned int omap24xx_idle_loop_suspend_sz;
> extern unsigned int omap34xx_suspend_sz;
> extern unsigned int save_secure_ram_context_sz;
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index fb4994a..c389e65 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -1096,6 +1096,9 @@ static int __init omap3_pm_init(void)
> core_clkdm = clkdm_lookup("core_clkdm");
>
> omap_push_sram_idle();
> +
> + omap3_coresight_pm_init(_omap_sram_idle);
> +
> #ifdef CONFIG_SUSPEND
> suspend_set_ops(&omap_pm_ops);
> #endif /* CONFIG_SUSPEND */
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH] omap3: make coresight register save across OFF modes a sysfs option
2010-07-26 6:58 ` Shilimkar, Santosh
@ 2010-07-26 7:32 ` Alexander Shishkin
2010-07-26 8:31 ` Shilimkar, Santosh
0 siblings, 1 reply; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-26 7:32 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: Hari Kanigeri, linux-arm-kernel@lists.infradead.org,
Tony Lindgren, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org
On Mon, Jul 26, 2010 at 12:28:38 +0530, Shilimkar, Santosh wrote:
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> > owner@vger.kernel.org] On Behalf Of Alexander Shishkin
> > Sent: Monday, July 26, 2010 2:34 AM
> > To: Hari Kanigeri
> > Cc: Alexander Shishkin; linux-arm-kernel@lists.infradead.org; Tony
> > Lindgren; Russell King; Paul Walmsley; Kevin Hilman; linux-
> > omap@vger.kernel.org; linux-kernel@vger.kernel.org
> > Subject: [PATCH] omap3: make coresight register save across OFF modes a
> > sysfs option
> >
> > This adds a sysfs file at /sys/power/coresight_save which is used to
> > control if the ETM and debug components' states should be saved and
> > restored across OFF modes.
> >
> > Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
> > Cc: Tony Lindgren <tony@atomide.com>
> > Cc: Russell King <linux@arm.linux.org.uk>
> > Cc: Paul Walmsley <paul@pwsan.com>
> > Cc: Kevin Hilman <khilman@deeprootsystems.com>
> > Cc: linux-omap@vger.kernel.org
> > Cc: linux-arm-kernel@lists.infradead.org
> > Cc: linux-kernel@vger.kernel.org
> > ---
> > arch/arm/mach-omap2/Makefile | 1 +
> > arch/arm/mach-omap2/debug34xx.c | 66
> > +++++++++++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/pm.h | 6 +++
> > arch/arm/mach-omap2/pm34xx.c | 3 ++
> > 4 files changed, 76 insertions(+), 0 deletions(-)
> > create mode 100644 arch/arm/mach-omap2/debug34xx.c
> >
> > diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> > index f5b4ff4..3a64ce4 100644
> > --- a/arch/arm/mach-omap2/Makefile
> > +++ b/arch/arm/mach-omap2/Makefile
> > @@ -49,6 +49,7 @@ ifeq ($(CONFIG_PM),y)
> > obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
> > obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
> > obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
> > +obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
> > obj-$(CONFIG_PM_DEBUG) += pm-debug.o
> >
> > AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> > diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-
> > omap2/debug34xx.c
> > new file mode 100644
> > index 0000000..698e83a
> > --- /dev/null
> > +++ b/arch/arm/mach-omap2/debug34xx.c
>
> > @@ -0,0 +1,66 @@
> > +/*
> > + * Control saving and restoring of coresight components' state during
> > + * OFF mode.
> > + *
> > + * Copyright (C) 2010 Nokia Corporation
> > + * Alexander Shishkin
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +#include <linux/kernel.h>
> > +#include <linux/sysfs.h>
> > +#include <linux/kobject.h>
> > +
> > +#include "pm.h"
> > +
> > +/*
> > + * Pointer to a place in sram where the ETM/debug state save
> > + * flag is. It can be calculated after the omap_sram_idle is
> > + * pushed to sram.
> > + */
> > +static unsigned int *_etm_save;
> > +
> > +/*
> > + * sysfs file /sys/power/coresight_save controls whether the
> > + * state of coresight components should be saved and restored
> > + * across OFF modes.
> > + */
> > +static ssize_t coresight_save_show(struct kobject *kobj,
> > + struct kobj_attribute *attr,
> > + char *buf)
> > +{
> > + return sprintf(buf, "%u\n", *_etm_save);
> > +}
> > +
> > +static ssize_t coresight_save_store(struct kobject *kobj,
> > + struct kobj_attribute *attr,
> > + const char *buf, size_t n)
> > +{
> > + unsigned int value;
> > +
> > + if (sscanf(buf, "%u", &value) != 1)
> > + return -EINVAL;
> > +
> > + *_etm_save = !!value;
> > +
> > + return n;
> > +}
> > +
> > +static struct kobj_attribute coresight_save_attr =
> > + __ATTR(coresight_save, 0644, coresight_save_show,
> > coresight_save_store);
> > +
> > +int omap3_coresight_pm_init(void *sram_addr)
> > +{
> > + int ret;
> > +
> > + /* the last word from the top of omap_sram_idle */
> > + _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz -
> > 4);
> > +
> > + ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
> > +
> > + return ret;
> > +}
>
> Looking at content of this file, I think you can keep this under common
> pm-debug.c file.
> Any problems with that ?
I was trying to avoid #ifdeffing too much and I didn't want this code to
compile at all when CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG is not set.
Otherwise, no problems.
Regards,
--
Alex
^ permalink raw reply [flat|nested] 25+ messages in thread* RE: [PATCH] omap3: make coresight register save across OFF modes a sysfs option
2010-07-26 7:32 ` Alexander Shishkin
@ 2010-07-26 8:31 ` Shilimkar, Santosh
2010-07-26 9:04 ` Alexander Shishkin
0 siblings, 1 reply; 25+ messages in thread
From: Shilimkar, Santosh @ 2010-07-26 8:31 UTC (permalink / raw)
To: Alexander Shishkin
Cc: Hari Kanigeri, linux-arm-kernel@lists.infradead.org,
Tony Lindgren, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org
> -----Original Message-----
> From: Alexander Shishkin [mailto:virtuoso@slind.org]
> Sent: Monday, July 26, 2010 1:02 PM
> To: Shilimkar, Santosh
> Cc: Hari Kanigeri; linux-arm-kernel@lists.infradead.org; Tony Lindgren;
> Russell King; Paul Walmsley; Kevin Hilman; linux-omap@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] omap3: make coresight register save across OFF modes
> a sysfs option
>
> On Mon, Jul 26, 2010 at 12:28:38 +0530, Shilimkar, Santosh wrote:
> > > -----Original Message-----
> > > From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> > > owner@vger.kernel.org] On Behalf Of Alexander Shishkin
> > > Sent: Monday, July 26, 2010 2:34 AM
> > > To: Hari Kanigeri
> > > Cc: Alexander Shishkin; linux-arm-kernel@lists.infradead.org; Tony
> > > Lindgren; Russell King; Paul Walmsley; Kevin Hilman; linux-
> > > omap@vger.kernel.org; linux-kernel@vger.kernel.org
> > > Subject: [PATCH] omap3: make coresight register save across OFF modes
> a
> > > sysfs option
> > >
> > > This adds a sysfs file at /sys/power/coresight_save which is used to
> > > control if the ETM and debug components' states should be saved and
> > > restored across OFF modes.
> > >
> > > Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
> > > Cc: Tony Lindgren <tony@atomide.com>
> > > Cc: Russell King <linux@arm.linux.org.uk>
> > > Cc: Paul Walmsley <paul@pwsan.com>
> > > Cc: Kevin Hilman <khilman@deeprootsystems.com>
> > > Cc: linux-omap@vger.kernel.org
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > Cc: linux-kernel@vger.kernel.org
> > > ---
> > > arch/arm/mach-omap2/Makefile | 1 +
> > > arch/arm/mach-omap2/debug34xx.c | 66
> > > +++++++++++++++++++++++++++++++++++++++
> > > arch/arm/mach-omap2/pm.h | 6 +++
> > > arch/arm/mach-omap2/pm34xx.c | 3 ++
> > > 4 files changed, 76 insertions(+), 0 deletions(-)
> > > create mode 100644 arch/arm/mach-omap2/debug34xx.c
> > >
> > > diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-
> omap2/Makefile
> > > index f5b4ff4..3a64ce4 100644
> > > --- a/arch/arm/mach-omap2/Makefile
> > > +++ b/arch/arm/mach-omap2/Makefile
> > > @@ -49,6 +49,7 @@ ifeq ($(CONFIG_PM),y)
> > > obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
> > > obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
> > > obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
> > > +obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
> > > obj-$(CONFIG_PM_DEBUG) += pm-debug.o
> > >
> > > AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> > > diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-
> > > omap2/debug34xx.c
> > > new file mode 100644
> > > index 0000000..698e83a
> > > --- /dev/null
> > > +++ b/arch/arm/mach-omap2/debug34xx.c
> >
> > > @@ -0,0 +1,66 @@
> > > +/*
> > > + * Control saving and restoring of coresight components' state during
> > > + * OFF mode.
> > > + *
> > > + * Copyright (C) 2010 Nokia Corporation
> > > + * Alexander Shishkin
> > > + *
> > > + * This program is free software; you can redistribute it and/or
> modify
> > > + * it under the terms of the GNU General Public License version 2 as
> > > + * published by the Free Software Foundation.
> > > + */
> > > +
> > > +#include <linux/kernel.h>
> > > +#include <linux/sysfs.h>
> > > +#include <linux/kobject.h>
> > > +
> > > +#include "pm.h"
> > > +
> > > +/*
> > > + * Pointer to a place in sram where the ETM/debug state save
> > > + * flag is. It can be calculated after the omap_sram_idle is
> > > + * pushed to sram.
> > > + */
> > > +static unsigned int *_etm_save;
> > > +
> > > +/*
> > > + * sysfs file /sys/power/coresight_save controls whether the
> > > + * state of coresight components should be saved and restored
> > > + * across OFF modes.
> > > + */
> > > +static ssize_t coresight_save_show(struct kobject *kobj,
> > > + struct kobj_attribute *attr,
> > > + char *buf)
> > > +{
> > > + return sprintf(buf, "%u\n", *_etm_save);
> > > +}
> > > +
> > > +static ssize_t coresight_save_store(struct kobject *kobj,
> > > + struct kobj_attribute *attr,
> > > + const char *buf, size_t n)
> > > +{
> > > + unsigned int value;
> > > +
> > > + if (sscanf(buf, "%u", &value) != 1)
> > > + return -EINVAL;
> > > +
> > > + *_etm_save = !!value;
> > > +
> > > + return n;
> > > +}
> > > +
> > > +static struct kobj_attribute coresight_save_attr =
> > > + __ATTR(coresight_save, 0644, coresight_save_show,
> > > coresight_save_store);
> > > +
> > > +int omap3_coresight_pm_init(void *sram_addr)
> > > +{
> > > + int ret;
> > > +
> > > + /* the last word from the top of omap_sram_idle */
> > > + _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz -
> > > 4);
> > > +
> > > + ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
> > > +
> > > + return ret;
> > > +}
> >
> > Looking at content of this file, I think you can keep this under common
> > pm-debug.c file.
> > Any problems with that ?
>
> I was trying to avoid #ifdeffing too much and I didn't want this code to
> compile at all when CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG is not set.
> Otherwise, no problems.
>
Ok.
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH] omap3: make coresight register save across OFF modes a sysfs option
2010-07-26 8:31 ` Shilimkar, Santosh
@ 2010-07-26 9:04 ` Alexander Shishkin
0 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-26 9:04 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: Hari Kanigeri, linux-arm-kernel@lists.infradead.org,
Tony Lindgren, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org
On Mon, Jul 26, 2010 at 02:01:14 +0530, Shilimkar, Santosh wrote:
>
>
> > -----Original Message-----
> > From: Alexander Shishkin [mailto:virtuoso@slind.org]
> > Sent: Monday, July 26, 2010 1:02 PM
> > To: Shilimkar, Santosh
> > Cc: Hari Kanigeri; linux-arm-kernel@lists.infradead.org; Tony Lindgren;
> > Russell King; Paul Walmsley; Kevin Hilman; linux-omap@vger.kernel.org;
> > linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH] omap3: make coresight register save across OFF modes
> > a sysfs option
> >
> > On Mon, Jul 26, 2010 at 12:28:38 +0530, Shilimkar, Santosh wrote:
> > > > -----Original Message-----
> > > > From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> > > > owner@vger.kernel.org] On Behalf Of Alexander Shishkin
> > > > Sent: Monday, July 26, 2010 2:34 AM
> > > > To: Hari Kanigeri
> > > > Cc: Alexander Shishkin; linux-arm-kernel@lists.infradead.org; Tony
> > > > Lindgren; Russell King; Paul Walmsley; Kevin Hilman; linux-
> > > > omap@vger.kernel.org; linux-kernel@vger.kernel.org
> > > > Subject: [PATCH] omap3: make coresight register save across OFF modes
> > a
> > > > sysfs option
> > > >
> > > > This adds a sysfs file at /sys/power/coresight_save which is used to
> > > > control if the ETM and debug components' states should be saved and
> > > > restored across OFF modes.
> > > >
> > > > Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
> > > > Cc: Tony Lindgren <tony@atomide.com>
> > > > Cc: Russell King <linux@arm.linux.org.uk>
> > > > Cc: Paul Walmsley <paul@pwsan.com>
> > > > Cc: Kevin Hilman <khilman@deeprootsystems.com>
> > > > Cc: linux-omap@vger.kernel.org
> > > > Cc: linux-arm-kernel@lists.infradead.org
> > > > Cc: linux-kernel@vger.kernel.org
> > > > ---
> > > > arch/arm/mach-omap2/Makefile | 1 +
> > > > arch/arm/mach-omap2/debug34xx.c | 66
> > > > +++++++++++++++++++++++++++++++++++++++
> > > > arch/arm/mach-omap2/pm.h | 6 +++
> > > > arch/arm/mach-omap2/pm34xx.c | 3 ++
> > > > 4 files changed, 76 insertions(+), 0 deletions(-)
> > > > create mode 100644 arch/arm/mach-omap2/debug34xx.c
> > > >
> > > > diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-
> > omap2/Makefile
> > > > index f5b4ff4..3a64ce4 100644
> > > > --- a/arch/arm/mach-omap2/Makefile
> > > > +++ b/arch/arm/mach-omap2/Makefile
> > > > @@ -49,6 +49,7 @@ ifeq ($(CONFIG_PM),y)
> > > > obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
> > > > obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
> > > > obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
> > > > +obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
> > > > obj-$(CONFIG_PM_DEBUG) += pm-debug.o
> > > >
> > > > AFLAGS_sleep24xx.o :=-Wa,-march=armv6
> > > > diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-
> > > > omap2/debug34xx.c
> > > > new file mode 100644
> > > > index 0000000..698e83a
> > > > --- /dev/null
> > > > +++ b/arch/arm/mach-omap2/debug34xx.c
> > >
> > > > @@ -0,0 +1,66 @@
> > > > +/*
> > > > + * Control saving and restoring of coresight components' state during
> > > > + * OFF mode.
> > > > + *
> > > > + * Copyright (C) 2010 Nokia Corporation
> > > > + * Alexander Shishkin
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or
> > modify
> > > > + * it under the terms of the GNU General Public License version 2 as
> > > > + * published by the Free Software Foundation.
> > > > + */
> > > > +
> > > > +#include <linux/kernel.h>
> > > > +#include <linux/sysfs.h>
> > > > +#include <linux/kobject.h>
> > > > +
> > > > +#include "pm.h"
> > > > +
> > > > +/*
> > > > + * Pointer to a place in sram where the ETM/debug state save
> > > > + * flag is. It can be calculated after the omap_sram_idle is
> > > > + * pushed to sram.
> > > > + */
> > > > +static unsigned int *_etm_save;
> > > > +
> > > > +/*
> > > > + * sysfs file /sys/power/coresight_save controls whether the
> > > > + * state of coresight components should be saved and restored
> > > > + * across OFF modes.
> > > > + */
> > > > +static ssize_t coresight_save_show(struct kobject *kobj,
> > > > + struct kobj_attribute *attr,
> > > > + char *buf)
> > > > +{
> > > > + return sprintf(buf, "%u\n", *_etm_save);
> > > > +}
> > > > +
> > > > +static ssize_t coresight_save_store(struct kobject *kobj,
> > > > + struct kobj_attribute *attr,
> > > > + const char *buf, size_t n)
> > > > +{
> > > > + unsigned int value;
> > > > +
> > > > + if (sscanf(buf, "%u", &value) != 1)
> > > > + return -EINVAL;
> > > > +
> > > > + *_etm_save = !!value;
> > > > +
> > > > + return n;
> > > > +}
> > > > +
> > > > +static struct kobj_attribute coresight_save_attr =
> > > > + __ATTR(coresight_save, 0644, coresight_save_show,
> > > > coresight_save_store);
> > > > +
> > > > +int omap3_coresight_pm_init(void *sram_addr)
> > > > +{
> > > > + int ret;
> > > > +
> > > > + /* the last word from the top of omap_sram_idle */
> > > > + _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz -
> > > > 4);
> > > > +
> > > > + ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
> > > > +
> > > > + return ret;
> > > > +}
> > >
> > > Looking at content of this file, I think you can keep this under common
> > > pm-debug.c file.
> > > Any problems with that ?
> >
> > I was trying to avoid #ifdeffing too much and I didn't want this code to
> > compile at all when CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG is not set.
> > Otherwise, no problems.
> >
> Ok.
But feel free to ack, all the same. :)
Regards,
--
Alex
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH] save and restore etm state across core OFF modes
2010-07-25 18:34 ` Hari Kanigeri
2010-07-25 19:38 ` Alexander Shishkin
2010-07-25 21:04 ` [PATCH] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
@ 2010-07-25 21:15 ` Alexander Shishkin
2 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 21:15 UTC (permalink / raw)
To: Hari Kanigeri
Cc: Alexander Shishkin, linux-arm-kernel, Richard Woodruff,
Tony Lindgren, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap, linux-kernel
This prevents ETM stalls whenever core enters OFF mode. Original patch
author is Richard Woodruff <r-woodruff2@ti.com>.
This version of the patch makes use of the ETM OS save/restore mechanism,
which takes about 55 words in omap3_arm_context[] instead of 128. Also,
saving ETM context can be switched on/off at runtime.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/Kconfig | 12 +++
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 135 +++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/control.h | 2 +-
4 files changed, 149 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b48bacf..b00d719 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -243,6 +243,18 @@ config MACH_OMAP4_PANDA
default y
depends on ARCH_OMAP4
+config ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ bool "Enable hardware emulation context save and restore"
+ depends on ARCH_OMAP3
+ default y
+ help
+ This option enables the code that controls the capability to
+ save and restore JTAG & ETM debugging across power states. It
+ may be required when using the ETM/ETB tracing driver or an
+ external debugging hardware.
+ Without this option emulation features' states are reset across
+ OFF mode state changes.
+
config OMAP3_EMU
bool "OMAP3 debugging peripherals"
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index a8d20ee..22dd240 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -93,7 +93,7 @@ void *omap3_secure_ram_storage;
* The address is stored in scratchpad, so that it can be used
* during the restore path.
*/
-u32 omap3_arm_context[128];
+u32 omap3_arm_context[256];
struct omap3_control_regs {
u32 sysconfig;
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index d522cd7..cd6a1d4 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -28,6 +28,7 @@
#include <asm/assembler.h>
#include <mach/io.h>
#include <plat/control.h>
+#include <asm/hardware/coresight.h>
#include "cm.h"
#include "prm.h"
@@ -226,6 +227,18 @@ loop:
nop
bl wait_sdrc_ok
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Restore Coresight debug registers
+ */
+ ldr r6, debug_vbase /* base Vaddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ ldr r6, etm_vbase /* base Vaddr of ETM */
+ bl unlock_debug /* remove global lock if set */
+ str r6, [r6, #ETMMR_OSLAR] /* clear OSLAR lock using non-key */
+#endif
+
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
/*b restore_es3*/ @ Enable to debug restore code
@@ -385,6 +398,44 @@ logic_l1_restore:
/*normal memory remap register */
MCR p15, 0, r5, c10, c2, 1
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Restore Coresight debug registers
+ */
+ ldr r6, debug_pbase /* base paddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ str r4, [r6, #ETMMR_OSLAR] /* reset-pointer (already locked) */
+ ldr r4, [r6, #ETMMR_OSSRR] /* dummy read */
+ ldr r4, [r3], #4 /* load save size */
+ cmp r4, #0 /* check for zero */
+debug_restore:
+ ittt ne /* t2/compat if-then block */
+ ldrne r5, [r3], #4 /* get saved value */
+ strne r5, [r6,#ETMMR_OSSRR] /* restore saved value */
+ subnes r4, r4, #1 /* decrement loop */
+ bne debug_restore /* loop till done */
+ str r5, [r6, #ETMMR_OSSRR] /* clear lock */
+ /*
+ * Restore CoreSight ETM registers
+ */
+ ldr r6, etm_pbase /* base paddr of ETM */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ str r4, [r6, #ETMMR_OSLAR] /* reset-pointer (already locked) */
+ ldr r4, [r6, #ETMMR_OSSRR] /* dummy read */
+ ldr r4, [r3], #4 /* load save size */
+ cmp r4, #0 /* check for zero */
+ beq etm_skip
+etm_restore:
+ ldrne r5, [r3], #4 /* get saved value */
+ strne r5, [r6, #ETMMR_OSSRR] /* restore saved value */
+ subnes r4, r4, #1 /* decrement loop */
+ bne etm_restore /* loop till done */
+etm_skip:
+ str r6, [r6, #ETMMR_OSLAR] /* remove OS lock */
+#endif
+
/* Restore cpsr */
ldmia r3!,{r4} /*load CPSR from SDRAM*/
msr cpsr, r4 /*store cpsr */
@@ -506,6 +557,48 @@ l1_logic_lost:
mrc p15, 0, r5, c10, c2, 1
stmia r8!,{r4-r5}
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Save Coresight debug registers
+ */
+ ldr r4, do_etm_save
+ cmp r4, #0
+ streq r4, [r8], #4 /* 0 for coresight saved size */
+ streq r4, [r8], #4 /* 0 for ETM saved size */
+ beq etm_skip_save
+ ldr r6, debug_vbase /* base vaddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* force global unlock */
+ str r4, [r6, #ETMMR_OSLAR] /* lock debug access */
+ ldr r4, [r6, #ETMMR_OSSRR] /* OSSRR returns size on first read */
+ str r4, [r8], #4 /* push item to save area */
+ cmp r4, #0 /* zero check */
+debug_save:
+ ittt ne /* thumb 2 compat if-then block */
+ ldrne r5, [r6, #ETMMR_OSSRR] /* get reg value */
+ strne r5, [r8], #4 /* push item to save area */
+ subnes r4, r4, #1 /* decrement size */
+ bne debug_save /* loop till done */
+ str r6, [r6, #ETMMR_OSLAR] /* unlock debug access */
+ /*
+ * Save etm registers
+ */
+ ldr r6, etm_vbase /* base vaddr of ETM */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* force global unlock */
+ str r4, [r6, #ETMMR_OSLAR] /* lock OS access to trace regs */
+ ldr r4, [r6, #ETMMR_OSSRR] /* OSSRR returns size on first read */
+ str r4, [r8], #4 /* push size to save area */
+ cmp r4, #0 /* zero check */
+etm_save:
+ ldrne r5, [r6, #ETMMR_OSSRR] /* get reg value */
+ strne r5, [r8], #4 /* push item to save area */
+ subnes r4, r4, #1 /* decrement size */
+ bne etm_save /* loop till done */
+ str r6, [r6, #ETMMR_OSLAR] /* unlock debug access */
+etm_skip_save:
+#endif
+
/* Store current cpsr*/
mrs r2, cpsr
stmia r8!, {r2}
@@ -520,6 +613,7 @@ clean_caches:
cmp r9, #1 /* Check whether L2 inval is required or not*/
bne skip_l2_inval
clean_l2:
+#ifndef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
/* read clidr */
mrc p15, 1, r0, c0, c0, 1
/* extract loc from clidr */
@@ -586,6 +680,12 @@ finished:
/* select current cache level in cssr */
mcr p15, 2, r10, c0, c0, 0
isb
+#else
+ ldr r1, kernel_flush /* get 32 bit addr of flush */
+ mov lr, pc /* prepare for return */
+ bx r1 /* do it */
+#endif
+
skip_l2_inval:
/* Data memory barrier and Data sync barrier */
mov r1, #0
@@ -632,6 +732,36 @@ wait_dll_lock:
bne wait_dll_lock
bx lr
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * unlock debug:
+ * Input:
+ * r6 has base address of emulation
+ * r4 has unlock key
+ * Output
+ * r5 has PDS value (1=accessable)
+ */
+unlock_debug:
+ ldr r5, [r6, #CSMR_LOCKSTATUS] /* get LSR */
+ cmp r5, #0x3 /* need unlocking? */
+ streq r4, [r6, #CSMR_LOCKACCESS] /* unlock if so */
+ ldr r5, [r6, #ETMMR_PDSR] /* clear power status */
+ bx lr /* back to caller */
+
+debug_vbase:
+ .word OMAP34XX_DBG_VIRT
+debug_pbase:
+ .word OMAP34XX_DBG_PHYS
+etm_vbase:
+ .word OMAP34XX_ETM_VIRT
+etm_pbase:
+ .word OMAP34XX_ETM_PHYS
+debug_xlar_key:
+ .word UNLOCK_MAGIC
+#endif
+
+kernel_flush:
+ .word v7_flush_dcache_all
cm_idlest1_core:
.word CM_IDLEST1_CORE_V
sdrc_dlla_status:
@@ -668,5 +798,10 @@ cache_pred_disable_mask:
.word 0xFFFFE7FB
control_stat:
.word CONTROL_STAT
+/* this word needs to be at the end */
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+do_etm_save:
+ .word 0
+#endif
ENTRY(omap34xx_cpu_suspend_sz)
.word . - omap34xx_cpu_suspend
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 131bf40..537acbe 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -362,7 +362,7 @@ extern void omap3_save_scratchpad_contents(void);
extern void omap3_clear_scratchpad_contents(void);
extern u32 *get_restore_pointer(void);
extern u32 *get_es3_restore_pointer(void);
-extern u32 omap3_arm_context[128];
+extern u32 omap3_arm_context[256];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH 6/7] save and restore etm state across core OFF modes
2010-07-25 17:05 ` [PATCH 6/7] save and restore etm state across core OFF modes Alexander Shishkin
2010-07-25 18:34 ` Hari Kanigeri
@ 2010-07-30 12:16 ` Alexander Shishkin
1 sibling, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-30 12:16 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Richard Woodruff, Tony Lindgren, Russell King, Paul Walmsley,
Kevin Hilman, linux-omap, linux-kernel, Alexander Shishkin
On Sun, Jul 25, 2010 at 08:05:19 +0300, Alexander Shishkin wrote:
> This prevents ETM stalls whenever core enters OFF mode. Original patch
> author is Richard Woodruff <r-woodruff2@ti.com>.
>
> This version of the patch makes use of the ETM OS save/restore mechanism,
> which takes about 55 words in omap3_arm_context[] instead of 128. Also,
> saving ETM context can be switched on/off at runtime.
Can I have some (n)acks on this one and 7/7 as well?
Regards,
--
Alex
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (5 preceding siblings ...)
2010-07-25 17:05 ` [PATCH 6/7] save and restore etm state across core OFF modes Alexander Shishkin
@ 2010-07-25 17:05 ` Alexander Shishkin
2010-08-06 12:37 ` Alexander Shishkin
2010-08-26 9:14 ` [PATCH 1/3] omap3: move EMU peripheral addresses to a platform header Alexander Shishkin
` (2 subsequent siblings)
9 siblings, 1 reply; 25+ messages in thread
From: Alexander Shishkin @ 2010-07-25 17:05 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Alexander Shishkin, Tony Lindgren, Russell King, Paul Walmsley,
Kevin Hilman, linux-omap, linux-kernel
This adds a sysfs file at /sys/power/coresight_save which is used to
control if the ETM and debug components' states should be saved and
restored across OFF modes.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/debug34xx.c | 66 +++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/pm.h | 6 +++
arch/arm/mach-omap2/pm34xx.c | 3 ++
4 files changed, 76 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/debug34xx.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f5b4ff4..3a64ce4 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -49,6 +49,7 @@ ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
+obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-omap2/debug34xx.c
new file mode 100644
index 0000000..698e83a
--- /dev/null
+++ b/arch/arm/mach-omap2/debug34xx.c
@@ -0,0 +1,66 @@
+/*
+ * Control saving and restoring of coresight components' state during
+ * OFF mode.
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Alexander Shishkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/kobject.h>
+
+#include "pm.h"
+
+/*
+ * Pointer to a place in sram where the ETM/debug state save
+ * flag is. It can be calculated after the omap_sram_idle is
+ * pushed to sram.
+ */
+static unsigned int *_etm_save;
+
+/*
+ * sysfs file /sys/power/coresight_save controls whether the
+ * state of coresight components should be saved and restored
+ * across OFF modes.
+ */
+static ssize_t coresight_save_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ return sprintf(buf, "%u\n", *_etm_save);
+}
+
+static ssize_t coresight_save_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t n)
+{
+ unsigned int value;
+
+ if (sscanf(buf, "%u", &value) != 1)
+ return -EINVAL;
+
+ *_etm_save = !!value;
+
+ return n;
+}
+
+static struct kobj_attribute coresight_save_attr =
+ __ATTR(coresight_save, 0644, coresight_save_show, coresight_save_store);
+
+int omap3_coresight_pm_init(void *sram_addr)
+{
+ int ret;
+
+ /* the last word from the top of omap_sram_idle */
+ _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz - 4);
+
+ ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
+
+ return ret;
+}
+
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 3de6ece..0321834 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -76,6 +76,12 @@ extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
extern void save_secure_ram_context(u32 *addr);
extern void omap3_save_scratchpad_contents(void);
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+int omap3_coresight_pm_init(void *sram_addr);
+#else
+#define omap3_coresight_pm_init(x) do {} while (0)
+#endif
+
extern unsigned int omap24xx_idle_loop_suspend_sz;
extern unsigned int omap34xx_suspend_sz;
extern unsigned int save_secure_ram_context_sz;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fb4994a..c389e65 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1096,6 +1096,9 @@ static int __init omap3_pm_init(void)
core_clkdm = clkdm_lookup("core_clkdm");
omap_push_sram_idle();
+
+ omap3_coresight_pm_init(_omap_sram_idle);
+
#ifdef CONFIG_SUSPEND
suspend_set_ops(&omap_pm_ops);
#endif /* CONFIG_SUSPEND */
--
1.7.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option
2010-07-25 17:05 ` [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
@ 2010-08-06 12:37 ` Alexander Shishkin
2010-08-06 12:47 ` Tony Lindgren
0 siblings, 1 reply; 25+ messages in thread
From: Alexander Shishkin @ 2010-08-06 12:37 UTC (permalink / raw)
To: Tony Lindgren
Cc: linux-arm-kernel, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap, linux-kernel
On Sun, Jul 25, 2010 at 08:05:20 +0300, Alexander Shishkin wrote:
> This adds a sysfs file at /sys/power/coresight_save which is used to
> control if the ETM and debug components' states should be saved and
> restored across OFF modes.
The non-omap patches are merged to Russell's tree, so these three are
the only remaining.
This one won't apply to linux-omap master any more because of the pm44xx
in the makefile, but should be ok otherwise. It would still apply to
linus' tree.
So, should I rediff it, resend it or just drop it, because it's not needed?
Regards,
--
Alex
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option
2010-08-06 12:37 ` Alexander Shishkin
@ 2010-08-06 12:47 ` Tony Lindgren
2010-09-04 8:57 ` Cousson, Benoit
0 siblings, 1 reply; 25+ messages in thread
From: Tony Lindgren @ 2010-08-06 12:47 UTC (permalink / raw)
To: linux-arm-kernel, Russell King, Paul Walmsley, Kevin Hilman,
linux-omap, linux-kernel
* Alexander Shishkin <virtuoso@slind.org> [100806 15:30]:
> On Sun, Jul 25, 2010 at 08:05:20 +0300, Alexander Shishkin wrote:
> > This adds a sysfs file at /sys/power/coresight_save which is used to
> > control if the ETM and debug components' states should be saved and
> > restored across OFF modes.
>
> The non-omap patches are merged to Russell's tree, so these three are
> the only remaining.
>
> This one won't apply to linux-omap master any more because of the pm44xx
> in the makefile, but should be ok otherwise. It would still apply to
> linus' tree.
>
> So, should I rediff it, resend it or just drop it, because it's not needed?
Patches look OK to me.
Care to refresh and repost the remaining ones one more time to avoid
confusion about which ones remain?
Are you OK if we merge these in the next merge window after this?
I'd rather have these sitting in linux-omap tree for a while first
before we merge them so we can be sure they won't break the idle
code..
Regards,
Tony
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option
2010-08-06 12:47 ` Tony Lindgren
@ 2010-09-04 8:57 ` Cousson, Benoit
2010-09-23 17:52 ` Tony Lindgren
0 siblings, 1 reply; 25+ messages in thread
From: Cousson, Benoit @ 2010-09-04 8:57 UTC (permalink / raw)
To: Tony Lindgren
Cc: linux-arm-kernel@lists.infradead.org, Russell King, Paul Walmsley,
Kevin Hilman, linux-omap@vger.kernel.org,
linux-kernel@vger.kernel.org
Hi Tony,
On 8/6/2010 2:47 PM, Tony Lindgren wrote:
> * Alexander Shishkin<virtuoso@slind.org> [100806 15:30]:
>> On Sun, Jul 25, 2010 at 08:05:20 +0300, Alexander Shishkin wrote:
>>> This adds a sysfs file at /sys/power/coresight_save which is used to
>>> control if the ETM and debug components' states should be saved and
>>> restored across OFF modes.
>>
>> The non-omap patches are merged to Russell's tree, so these three are
>> the only remaining.
>>
>> This one won't apply to linux-omap master any more because of the pm44xx
>> in the makefile, but should be ok otherwise. It would still apply to
>> linus' tree.
>>
>> So, should I rediff it, resend it or just drop it, because it's not needed?
>
> Patches look OK to me.
These patches are still using static virtual to physical mapping in
io.h, shouldn't we take the opportunity of this series to fix that and
use ioremap instead?
Or do you prefer to do that in a second step?
Regards,
Benoit
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option
2010-09-04 8:57 ` Cousson, Benoit
@ 2010-09-23 17:52 ` Tony Lindgren
0 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2010-09-23 17:52 UTC (permalink / raw)
To: Cousson, Benoit
Cc: linux-arm-kernel@lists.infradead.org, Russell King, Paul Walmsley,
Kevin Hilman, linux-omap@vger.kernel.org,
linux-kernel@vger.kernel.org
* Cousson, Benoit <b-cousson@ti.com> [100904 01:49]:
>
> These patches are still using static virtual to physical mapping in
> io.h, shouldn't we take the opportunity of this series to fix that
> and use ioremap instead?
Hmm, well the amba device should ioremap, but we need the virt address
for sleep34xx.S also. So to me it seems like we're missing the static
ioremap entries for plat-omap/io.c for the virtual addresses.
Alexander, can you please check that and repost the remaining
three patches one more time?
Thanks,
Tony
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 1/3] omap3: move EMU peripheral addresses to a platform header
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (6 preceding siblings ...)
2010-07-25 17:05 ` [PATCH 7/7] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
@ 2010-08-26 9:14 ` Alexander Shishkin
2010-08-26 9:14 ` [PATCH 2/3] save and restore etm state across core OFF modes Alexander Shishkin
2010-08-26 9:14 ` [PATCH 3/3] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-08-26 9:14 UTC (permalink / raw)
To: Tony Lindgren
Cc: linux-omap, Alexander Shishkin, Tony Lindgren, Russell King,
Paul Walmsley, Santosh Shilimkar, Kevin Hilman, linux-arm-kernel,
linux-kernel
These addresses are also needed for the OFF code to save/restore the
contexts of the EMU peripherals correctly.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/emu.c | 14 ++++----------
arch/arm/plat-omap/include/plat/io.h | 20 ++++++++++++++++++++
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index 9c442e2..6b41745 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -24,19 +24,13 @@
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Alexander Shishkin");
-/* Cortex CoreSight components within omap3xxx EMU */
-#define ETM_BASE (L4_EMU_34XX_PHYS + 0x10000)
-#define DBG_BASE (L4_EMU_34XX_PHYS + 0x11000)
-#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
-#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
-
static struct amba_device omap3_etb_device = {
.dev = {
.init_name = "etb",
},
.res = {
- .start = ETB_BASE,
- .end = ETB_BASE + SZ_4K - 1,
+ .start = OMAP34XX_ETB_PHYS,
+ .end = OMAP34XX_ETB_PHYS + OMAP34XX_ETB_SIZE - 1,
.flags = IORESOURCE_MEM,
},
.periphid = 0x000bb907,
@@ -47,8 +41,8 @@ static struct amba_device omap3_etm_device = {
.init_name = "etm",
},
.res = {
- .start = ETM_BASE,
- .end = ETM_BASE + SZ_4K - 1,
+ .start = OMAP34XX_ETM_PHYS,
+ .end = OMAP34XX_ETM_PHYS + OMAP34XX_ETM_SIZE - 1,
.flags = IORESOURCE_MEM,
},
.periphid = 0x102bb921,
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 128b549..81f736a 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -185,6 +185,26 @@
/* 3430 IVA - currently unmapped */
+#define OMAP34XX_DBG_OFFSET (0x00011000)
+#define OMAP34XX_DBG_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_DBG_OFFSET)
+#define OMAP34XX_DBG_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_DBG_OFFSET)
+#define OMAP34XX_DBG_SIZE SZ_4K
+
+#define OMAP34XX_ETM_OFFSET (0x00010000)
+#define OMAP34XX_ETM_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_ETM_OFFSET)
+#define OMAP34XX_ETM_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_ETM_OFFSET)
+#define OMAP34XX_ETM_SIZE SZ_4K
+
+#define OMAP34XX_ETB_OFFSET (0x0001b000)
+#define OMAP34XX_ETB_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_ETB_OFFSET)
+#define OMAP34XX_ETB_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_ETB_OFFSET)
+#define OMAP34XX_ETB_SIZE SZ_4K
+
+#define OMAP34XX_DAP_OFFSET (0x0001d000)
+#define OMAP34XX_DAP_VIRT (L4_EMU_34XX_VIRT + OMAP34XX_DAP_OFFSET)
+#define OMAP34XX_DAP_PHYS (L4_EMU_34XX_PHYS + OMAP34XX_DAP_OFFSET)
+#define OMAP34XX_DAP_SIZE SZ_4K
+
/*
* ----------------------------------------------------------------------------
* Omap4 specific IO mapping
--
1.7.2.1.45.gb66c2
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 2/3] save and restore etm state across core OFF modes
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (7 preceding siblings ...)
2010-08-26 9:14 ` [PATCH 1/3] omap3: move EMU peripheral addresses to a platform header Alexander Shishkin
@ 2010-08-26 9:14 ` Alexander Shishkin
2010-08-26 9:14 ` [PATCH 3/3] omap3: make coresight register save across OFF modes a sysfs option Alexander Shishkin
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-08-26 9:14 UTC (permalink / raw)
To: Tony Lindgren
Cc: linux-omap, Alexander Shishkin, Richard Woodruff, Tony Lindgren,
Russell King, Paul Walmsley, Kevin Hilman, linux-arm-kernel,
linux-kernel
This prevents ETM stalls whenever core enters OFF mode. Original patch
author is Richard Woodruff <r-woodruff2@ti.com>.
This version of the patch makes use of the ETM OS save/restore mechanism,
which takes about 55 words in omap3_arm_context[] instead of 128. Also,
saving ETM context can be switched on/off at runtime.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/Kconfig | 12 +++
arch/arm/mach-omap2/control.c | 2 +-
arch/arm/mach-omap2/sleep34xx.S | 135 +++++++++++++++++++++++++++++
arch/arm/plat-omap/include/plat/control.h | 2 +-
4 files changed, 149 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b48bacf..b00d719 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -243,6 +243,18 @@ config MACH_OMAP4_PANDA
default y
depends on ARCH_OMAP4
+config ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ bool "Enable hardware emulation context save and restore"
+ depends on ARCH_OMAP3
+ default y
+ help
+ This option enables the code that controls the capability to
+ save and restore JTAG & ETM debugging across power states. It
+ may be required when using the ETM/ETB tracing driver or an
+ external debugging hardware.
+ Without this option emulation features' states are reset across
+ OFF mode state changes.
+
config OMAP3_EMU
bool "OMAP3 debugging peripherals"
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index a8d20ee..22dd240 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -93,7 +93,7 @@ void *omap3_secure_ram_storage;
* The address is stored in scratchpad, so that it can be used
* during the restore path.
*/
-u32 omap3_arm_context[128];
+u32 omap3_arm_context[256];
struct omap3_control_regs {
u32 sysconfig;
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index ba53191..c7a77c5 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -28,6 +28,7 @@
#include <asm/assembler.h>
#include <mach/io.h>
#include <plat/control.h>
+#include <asm/hardware/coresight.h>
#include "cm.h"
#include "prm.h"
@@ -226,6 +227,18 @@ loop:
nop
bl wait_sdrc_ok
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Restore Coresight debug registers
+ */
+ ldr r6, debug_vbase /* base Vaddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ ldr r6, etm_vbase /* base Vaddr of ETM */
+ bl unlock_debug /* remove global lock if set */
+ str r6, [r6, #ETMMR_OSLAR] /* clear OSLAR lock using non-key */
+#endif
+
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
/*b restore_es3*/ @ Enable to debug restore code
@@ -385,6 +398,44 @@ logic_l1_restore:
/*normal memory remap register */
MCR p15, 0, r5, c10, c2, 1
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Restore Coresight debug registers
+ */
+ ldr r6, debug_pbase /* base paddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ str r4, [r6, #ETMMR_OSLAR] /* reset-pointer (already locked) */
+ ldr r4, [r6, #ETMMR_OSSRR] /* dummy read */
+ ldr r4, [r3], #4 /* load save size */
+ cmp r4, #0 /* check for zero */
+debug_restore:
+ ittt ne /* t2/compat if-then block */
+ ldrne r5, [r3], #4 /* get saved value */
+ strne r5, [r6,#ETMMR_OSSRR] /* restore saved value */
+ subnes r4, r4, #1 /* decrement loop */
+ bne debug_restore /* loop till done */
+ str r5, [r6, #ETMMR_OSSRR] /* clear lock */
+ /*
+ * Restore CoreSight ETM registers
+ */
+ ldr r6, etm_pbase /* base paddr of ETM */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* remove global lock if set */
+ str r4, [r6, #ETMMR_OSLAR] /* reset-pointer (already locked) */
+ ldr r4, [r6, #ETMMR_OSSRR] /* dummy read */
+ ldr r4, [r3], #4 /* load save size */
+ cmp r4, #0 /* check for zero */
+ beq etm_skip
+etm_restore:
+ ldrne r5, [r3], #4 /* get saved value */
+ strne r5, [r6, #ETMMR_OSSRR] /* restore saved value */
+ subnes r4, r4, #1 /* decrement loop */
+ bne etm_restore /* loop till done */
+etm_skip:
+ str r6, [r6, #ETMMR_OSLAR] /* remove OS lock */
+#endif
+
/* Restore cpsr */
ldmia r3!,{r4} /*load CPSR from SDRAM*/
msr cpsr, r4 /*store cpsr */
@@ -506,6 +557,48 @@ l1_logic_lost:
mrc p15, 0, r5, c10, c2, 1
stmia r8!,{r4-r5}
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * Save Coresight debug registers
+ */
+ ldr r4, do_etm_save
+ cmp r4, #0
+ streq r4, [r8], #4 /* 0 for coresight saved size */
+ streq r4, [r8], #4 /* 0 for ETM saved size */
+ beq etm_skip_save
+ ldr r6, debug_vbase /* base vaddr of CortexA8-Debug */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* force global unlock */
+ str r4, [r6, #ETMMR_OSLAR] /* lock debug access */
+ ldr r4, [r6, #ETMMR_OSSRR] /* OSSRR returns size on first read */
+ str r4, [r8], #4 /* push item to save area */
+ cmp r4, #0 /* zero check */
+debug_save:
+ ittt ne /* thumb 2 compat if-then block */
+ ldrne r5, [r6, #ETMMR_OSSRR] /* get reg value */
+ strne r5, [r8], #4 /* push item to save area */
+ subnes r4, r4, #1 /* decrement size */
+ bne debug_save /* loop till done */
+ str r6, [r6, #ETMMR_OSLAR] /* unlock debug access */
+ /*
+ * Save etm registers
+ */
+ ldr r6, etm_vbase /* base vaddr of ETM */
+ ldr r4, debug_xlar_key /* get lock key for OSLAR */
+ bl unlock_debug /* force global unlock */
+ str r4, [r6, #ETMMR_OSLAR] /* lock OS access to trace regs */
+ ldr r4, [r6, #ETMMR_OSSRR] /* OSSRR returns size on first read */
+ str r4, [r8], #4 /* push size to save area */
+ cmp r4, #0 /* zero check */
+etm_save:
+ ldrne r5, [r6, #ETMMR_OSSRR] /* get reg value */
+ strne r5, [r8], #4 /* push item to save area */
+ subnes r4, r4, #1 /* decrement size */
+ bne etm_save /* loop till done */
+ str r6, [r6, #ETMMR_OSLAR] /* unlock debug access */
+etm_skip_save:
+#endif
+
/* Store current cpsr*/
mrs r2, cpsr
stmia r8!, {r2}
@@ -520,6 +613,7 @@ clean_caches:
cmp r9, #1 /* Check whether L2 inval is required or not*/
bne skip_l2_inval
clean_l2:
+#ifndef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
/* read clidr */
mrc p15, 1, r0, c0, c0, 1
/* extract loc from clidr */
@@ -586,6 +680,12 @@ finished:
/* select current cache level in cssr */
mcr p15, 2, r10, c0, c0, 0
isb
+#else
+ ldr r1, kernel_flush /* get 32 bit addr of flush */
+ mov lr, pc /* prepare for return */
+ bx r1 /* do it */
+#endif
+
skip_l2_inval:
/* Data memory barrier and Data sync barrier */
mov r1, #0
@@ -632,6 +732,36 @@ wait_dll_lock:
bne wait_dll_lock
bx lr
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+ /*
+ * unlock debug:
+ * Input:
+ * r6 has base address of emulation
+ * r4 has unlock key
+ * Output
+ * r5 has PDS value (1=accessable)
+ */
+unlock_debug:
+ ldr r5, [r6, #CSMR_LOCKSTATUS] /* get LSR */
+ cmp r5, #0x3 /* need unlocking? */
+ streq r4, [r6, #CSMR_LOCKACCESS] /* unlock if so */
+ ldr r5, [r6, #ETMMR_PDSR] /* clear power status */
+ bx lr /* back to caller */
+
+debug_vbase:
+ .word OMAP34XX_DBG_VIRT
+debug_pbase:
+ .word OMAP34XX_DBG_PHYS
+etm_vbase:
+ .word OMAP34XX_ETM_VIRT
+etm_pbase:
+ .word OMAP34XX_ETM_PHYS
+debug_xlar_key:
+ .word UNLOCK_MAGIC
+#endif
+
+kernel_flush:
+ .word v7_flush_dcache_all
cm_idlest1_core:
.word CM_IDLEST1_CORE_V
sdrc_dlla_status:
@@ -668,5 +798,10 @@ cache_pred_disable_mask:
.word 0xFFFFE7FB
control_stat:
.word CONTROL_STAT
+/* this word needs to be at the end */
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+do_etm_save:
+ .word 0
+#endif
ENTRY(omap34xx_cpu_suspend_sz)
.word . - omap34xx_cpu_suspend
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 131bf40..537acbe 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -362,7 +362,7 @@ extern void omap3_save_scratchpad_contents(void);
extern void omap3_clear_scratchpad_contents(void);
extern u32 *get_restore_pointer(void);
extern u32 *get_es3_restore_pointer(void);
-extern u32 omap3_arm_context[128];
+extern u32 omap3_arm_context[256];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
--
1.7.2.1.45.gb66c2
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 3/3] omap3: make coresight register save across OFF modes a sysfs option
[not found] <13B9B4C6EF24D648824FF11BE896716203BADA0745@dlee02.ent.ti.com>
` (8 preceding siblings ...)
2010-08-26 9:14 ` [PATCH 2/3] save and restore etm state across core OFF modes Alexander Shishkin
@ 2010-08-26 9:14 ` Alexander Shishkin
9 siblings, 0 replies; 25+ messages in thread
From: Alexander Shishkin @ 2010-08-26 9:14 UTC (permalink / raw)
To: Tony Lindgren
Cc: linux-omap, Alexander Shishkin, Tony Lindgren, Russell King,
Paul Walmsley, Kevin Hilman, linux-arm-kernel, linux-kernel
This adds a sysfs file at /sys/power/coresight_save which is used to
control if the ETM and debug components' states should be saved and
restored across OFF modes.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
arch/arm/mach-omap2/Makefile | 1 +
arch/arm/mach-omap2/debug34xx.c | 66 +++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/pm.h | 6 +++
arch/arm/mach-omap2/pm34xx.c | 3 ++
4 files changed, 76 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/debug34xx.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 88d3a1e..0545dd8 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o
+obj-$(CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG) += debug34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
diff --git a/arch/arm/mach-omap2/debug34xx.c b/arch/arm/mach-omap2/debug34xx.c
new file mode 100644
index 0000000..698e83a
--- /dev/null
+++ b/arch/arm/mach-omap2/debug34xx.c
@@ -0,0 +1,66 @@
+/*
+ * Control saving and restoring of coresight components' state during
+ * OFF mode.
+ *
+ * Copyright (C) 2010 Nokia Corporation
+ * Alexander Shishkin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/kobject.h>
+
+#include "pm.h"
+
+/*
+ * Pointer to a place in sram where the ETM/debug state save
+ * flag is. It can be calculated after the omap_sram_idle is
+ * pushed to sram.
+ */
+static unsigned int *_etm_save;
+
+/*
+ * sysfs file /sys/power/coresight_save controls whether the
+ * state of coresight components should be saved and restored
+ * across OFF modes.
+ */
+static ssize_t coresight_save_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ return sprintf(buf, "%u\n", *_etm_save);
+}
+
+static ssize_t coresight_save_store(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ const char *buf, size_t n)
+{
+ unsigned int value;
+
+ if (sscanf(buf, "%u", &value) != 1)
+ return -EINVAL;
+
+ *_etm_save = !!value;
+
+ return n;
+}
+
+static struct kobj_attribute coresight_save_attr =
+ __ATTR(coresight_save, 0644, coresight_save_show, coresight_save_store);
+
+int omap3_coresight_pm_init(void *sram_addr)
+{
+ int ret;
+
+ /* the last word from the top of omap_sram_idle */
+ _etm_save = (unsigned *)((u8 *)sram_addr + omap34xx_cpu_suspend_sz - 4);
+
+ ret = sysfs_create_file(power_kobj, &coresight_save_attr.attr);
+
+ return ret;
+}
+
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 3de6ece..0321834 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -76,6 +76,12 @@ extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
extern void save_secure_ram_context(u32 *addr);
extern void omap3_save_scratchpad_contents(void);
+#ifdef CONFIG_ENABLE_OFF_MODE_JTAG_ETM_DEBUG
+int omap3_coresight_pm_init(void *sram_addr);
+#else
+#define omap3_coresight_pm_init(x) do {} while (0)
+#endif
+
extern unsigned int omap24xx_idle_loop_suspend_sz;
extern unsigned int omap34xx_suspend_sz;
extern unsigned int save_secure_ram_context_sz;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7b03426..8f925db 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1098,6 +1098,9 @@ static int __init omap3_pm_init(void)
core_clkdm = clkdm_lookup("core_clkdm");
omap_push_sram_idle();
+
+ omap3_coresight_pm_init(_omap_sram_idle);
+
#ifdef CONFIG_SUSPEND
suspend_set_ops(&omap_pm_ops);
#endif /* CONFIG_SUSPEND */
--
1.7.2.1.45.gb66c2
^ permalink raw reply related [flat|nested] 25+ messages in thread