Microblaze little-endian port + driver changes

Microblaze little-endian port + driver changes

[Michal Simek]

Hi everybody,

here is the first bunch of patches which is necessary to apply 
to get microblaze little-endian AXI version work.

All patches are placed in microblaze-next branch and they are also
merged to linux-next branch.

Grant: I would like to ask you if you can please take a look
at little-endian driver changes. 

Thanks for your review,
Michal

[PATCH 1/7] of: GPIO: Fix OF probing on little-endian systems

[Michal Simek]

DTB is always big-endian that's why is necessary
to convert it.

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: Tejun Heo <tj@kernel.org>
CC: Anton Vorontsov <avorontsov@ru.mvista.com>
CC: linux-kernel@vger.kernel.org
CC: devicetree-discuss@lists.ozlabs.org
---
 drivers/gpio/xilinx_gpio.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 7096909..846fbd5 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -171,13 +171,13 @@ static int __devinit xgpio_of_probe(struct device_node *np)
 	/* Update GPIO state shadow register with default value */
 	tree_info = of_get_property(np, "xlnx,dout-default", NULL);
 	if (tree_info)
-		chip->gpio_state = *tree_info;
+		chip->gpio_state = be32_to_cpup(tree_info);
 
 	/* Update GPIO direction shadow register with default value */
 	chip->gpio_dir = 0xFFFFFFFF; /* By default, all pins are inputs */
 	tree_info = of_get_property(np, "xlnx,tri-default", NULL);
 	if (tree_info)
-		chip->gpio_dir = *tree_info;
+		chip->gpio_dir = be32_to_cpup(tree_info);
 
 	/* Check device node and parent device node for device width */
 	chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */
@@ -186,7 +186,7 @@ static int __devinit xgpio_of_probe(struct device_node *np)
 		tree_info = of_get_property(np->parent,
 					    "xlnx,gpio-width", NULL);
 	if (tree_info)
-		chip->mmchip.gc.ngpio = *tree_info;
+		chip->mmchip.gc.ngpio = be32_to_cpup(tree_info);
 
 	spin_lock_init(&chip->gpio_lock);
 
-- 
1.5.5.1

[PATCH 2/7] of: MTD: Fix OF probing on little-endian systems

[Michal Simek]

Convert big-endian DTB to little-endian if necessary.

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: David Woodhouse <dwmw2@infradead.org>
CC: Tejun Heo <tj@kernel.org>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: linux-mtd@lists.infradead.org
CC: linux-kernel@vger.kernel.org
CC: devicetree-discuss@lists.ozlabs.org
---
 drivers/mtd/maps/physmap_of.c |    2 +-
 drivers/mtd/ofpart.c          |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index fe63f6b..ec3edf6 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -294,7 +294,7 @@ static int __devinit of_flash_probe(struct platform_device *dev,
 		info->list[i].map.name = dev_name(&dev->dev);
 		info->list[i].map.phys = res.start;
 		info->list[i].map.size = res_size;
-		info->list[i].map.bankwidth = *width;
+		info->list[i].map.bankwidth = be32_to_cpup(width);
 
 		err = -ENOMEM;
 		info->list[i].map.virt = ioremap(info->list[i].map.phys,
diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c
index 8bf7dc6..7bd171e 100644
--- a/drivers/mtd/ofpart.c
+++ b/drivers/mtd/ofpart.c
@@ -53,8 +53,8 @@ int __devinit of_mtd_parse_partitions(struct device *dev,
 			continue;
 		}
 
-		(*pparts)[i].offset = reg[0];
-		(*pparts)[i].size = reg[1];
+		(*pparts)[i].offset = be32_to_cpu(reg[0]);
+		(*pparts)[i].size = be32_to_cpu(reg[1]);
 
 		partname = of_get_property(pp, "label", &len);
 		if (!partname)
-- 
1.5.5.1

[PATCH 3/7] of: Fix uart16550 initialization on little-endian systems

[Michal Simek]

Convert values from big-endian to cpu-endian.

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: "David S. Miller" <davem@davemloft.net>
CC: Tejun Heo <tj@kernel.org>
CC: linux-kernel@vger.kernel.org
CC: devicetree-discuss@lists.ozlabs.org
---
 drivers/serial/of_serial.c |   17 ++++++++++-------
 1 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
index 2af8fd1..0e4d894 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/serial/of_serial.c
@@ -31,17 +31,19 @@ static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
 {
 	struct resource resource;
 	struct device_node *np = ofdev->dev.of_node;
-	const unsigned int *clk, *spd;
+	const unsigned int *spd;
+	unsigned int clk;
 	const u32 *prop;
 	int ret, prop_size;
 
 	memset(port, 0, sizeof *port);
 	spd = of_get_property(np, "current-speed", NULL);
-	clk = of_get_property(np, "clock-frequency", NULL);
-	if (!clk) {
+	prop = of_get_property(np, "clock-frequency", NULL);
+	if (!prop) {
 		dev_warn(&ofdev->dev, "no clock-frequency property set\n");
 		return -ENODEV;
 	}
+	clk = be32_to_cpup(prop);
 
 	ret = of_address_to_resource(np, 0, &resource);
 	if (ret) {
@@ -55,23 +57,24 @@ static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
 	/* Check for shifted address mapping */
 	prop = of_get_property(np, "reg-offset", &prop_size);
 	if (prop && (prop_size == sizeof(u32)))
-		port->mapbase += *prop;
+		port->mapbase += be32_to_cpup(prop);
 
 	/* Check for registers offset within the devices address range */
 	prop = of_get_property(np, "reg-shift", &prop_size);
 	if (prop && (prop_size == sizeof(u32)))
-		port->regshift = *prop;
+		port->regshift = be32_to_cpup(prop);
 
 	port->irq = irq_of_parse_and_map(np, 0);
 	port->iotype = UPIO_MEM;
 	port->type = type;
-	port->uartclk = *clk;
+	port->uartclk = clk;
 	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
 		| UPF_FIXED_PORT | UPF_FIXED_TYPE;
 	port->dev = &ofdev->dev;
+
 	/* If current-speed was set, then try not to change it. */
 	if (spd)
-		port->custom_divisor = *clk / (16 * (*spd));
+		port->custom_divisor = clk / (16 * be32_to_cpup(spd));
 
 	return 0;
 }
-- 
1.5.5.1

[PATCH 4/7] net: emaclite: Add support for little-endian platforms

[Michal Simek]

Upcomming Microblaze is little endian that's why is necessary
to fix protocol and length loading.

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: "David S. Miller" <davem@davemloft.net>
CC: Grant Likely <grant.likely@secretlab.ca>
CC: Eric Dumazet <eric.dumazet@gmail.com>
CC: netdev@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: devicetree-discuss@lists.ozlabs.org
---
 drivers/net/xilinx_emaclite.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 71122ee..533ebb1 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -430,8 +430,8 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
 	}
 
 	/* Get the protocol type of the ethernet frame that arrived */
-	proto_type = ((in_be32(addr + XEL_HEADER_OFFSET +
-			XEL_RXBUFF_OFFSET) >> XEL_HEADER_SHIFT) &
+	proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
+			XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
 			XEL_RPLR_LENGTH_MASK);
 
 	/* Check if received ethernet frame is a raw ethernet frame
@@ -439,9 +439,9 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
 	if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
 
 		if (proto_type == ETH_P_IP) {
-			length = ((in_be32(addr +
+			length = ((ntohl(in_be32(addr +
 					XEL_HEADER_IP_LENGTH_OFFSET +
-					XEL_RXBUFF_OFFSET) >>
+					XEL_RXBUFF_OFFSET)) >>
 					XEL_HEADER_SHIFT) &
 					XEL_RPLR_LENGTH_MASK);
 			length += ETH_HLEN + ETH_FCS_LEN;
-- 
1.5.5.1

[PATCH 5/7] microblaze: Add PVR for endians plus detection

[Michal Simek]

Upcomming microblaze version will support little-endian.

Signed-off-by: Michal Simek <monstr@monstr.eu>
---
 arch/microblaze/include/asm/cpuinfo.h         |    1 +
 arch/microblaze/include/asm/pvr.h             |    3 +++
 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c |    1 +
 arch/microblaze/kernel/cpu/cpuinfo-static.c   |    1 +
 arch/microblaze/kernel/cpu/mb.c               |    3 ++-
 arch/microblaze/platform/generic/system.dts   |    1 +
 6 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index b4f5ca3..0d4f0ce 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -38,6 +38,7 @@ struct cpuinfo {
 	u32 use_exc;
 	u32 ver_code;
 	u32 mmu;
+	u32 endian;
 
 	/* CPU caches */
 	u32 use_icache;
diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
index 3161055..37db96a 100644
--- a/arch/microblaze/include/asm/pvr.h
+++ b/arch/microblaze/include/asm/pvr.h
@@ -32,6 +32,7 @@ struct pvr_s {
 #define PVR0_USE_DCACHE_MASK		0x01000000
 #define PVR0_USE_MMU			0x00800000
 #define PVR0_USE_BTC			0x00400000
+#define PVR0_ENDI			0x00200000
 #define PVR0_VERSION_MASK		0x0000FF00
 #define PVR0_USER1_MASK			0x000000FF
 
@@ -209,6 +210,8 @@ struct pvr_s {
 #define PVR_MMU_TLB_ACCESS(pvr)	(pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
 #define PVR_MMU_ZONES(pvr)	(pvr.pvr[11] & PVR11_MMU_ZONES)
 
+/* endian */
+#define PVR_ENDIAN(pvr)	(pvr.pvr[0] & PVR0_ENDI)
 
 int cpu_has_pvr(void);
 void get_pvr(struct pvr_s *pvr);
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
index f72dbd6..f70a604 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -72,6 +72,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
 	CI(pvr_user2, USER2);
 
 	CI(mmu, USE_MMU);
+	CI(endian, ENDIAN);
 
 	CI(use_icache, USE_ICACHE);
 	CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
index 6095aa6..b16b994 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-static.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -119,6 +119,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
 	ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
 
 	ci->mmu = fcpu(cpu, "xlnx,use-mmu");
+	ci->endian = fcpu(cpu, "xlnx,endianness");
 
 	ci->ver_code = 0;
 	ci->fpga_family_code = 0;
diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
index 7086e35..b4048af 100644
--- a/arch/microblaze/kernel/cpu/mb.c
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -51,11 +51,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 	count = seq_printf(m,
 			"CPU-Family:	MicroBlaze\n"
 			"FPGA-Arch:	%s\n"
-			"CPU-Ver:	%s\n"
+			"CPU-Ver:	%s, %s endian\n"
 			"CPU-MHz:	%d.%02d\n"
 			"BogoMips:	%lu.%02lu\n",
 			fpga_family,
 			cpu_ver,
+			cpuinfo.endian ? "little" : "big",
 			cpuinfo.cpu_clock_freq /
 			1000000,
 			cpuinfo.cpu_clock_freq %
diff --git a/arch/microblaze/platform/generic/system.dts b/arch/microblaze/platform/generic/system.dts
index ef667d1..3f85df2 100644
--- a/arch/microblaze/platform/generic/system.dts
+++ b/arch/microblaze/platform/generic/system.dts
@@ -85,6 +85,7 @@
 			xlnx,dynamic-bus-sizing = <0x1>;
 			xlnx,edge-is-positive = <0x1>;
 			xlnx,family = "virtex5";
+			xlnx,endianness = <0x1>;
 			xlnx,fpu-exception = <0x1>;
 			xlnx,fsl-data-size = <0x20>;
 			xlnx,fsl-exception = <0x0>;
-- 
1.5.5.1

[PATCH 6/7] microblaze: KGDB little endian support

[Michal Simek]

Just need to use little-endian opcode for brki r16, 0x18

Signed-off-by: Michal Simek <monstr@monstr.eu>
CC: Jason Wessel <jason.wessel@windriver.com>
---
 arch/microblaze/kernel/kgdb.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/microblaze/kernel/kgdb.c b/arch/microblaze/kernel/kgdb.c
index 9b5a817..09a5e82 100644
--- a/arch/microblaze/kernel/kgdb.c
+++ b/arch/microblaze/kernel/kgdb.c
@@ -142,5 +142,9 @@ void kgdb_arch_exit(void)
  * Global data
  */
 struct kgdb_arch arch_kgdb_ops = {
+#ifdef __MICROBLAZEEL__
+	.gdb_bpt_instr = {0x18, 0x00, 0x0c, 0xba}, /* brki r16, 0x18 */
+#else
 	.gdb_bpt_instr = {0xba, 0x0c, 0x00, 0x18}, /* brki r16, 0x18 */
+#endif
 };
-- 
1.5.5.1

[PATCH 7/7] microblaze: Add support for little-endian Microblaze

[Michal Simek]

Microblaze little-endian toolchain exports __MICROBLAZEEL__
which is used in the kernel to identify little/big endian.

The most of the changes are in loading values from DTB which
is always big endian.

Little endian platforms are based on new AXI bus which has
impact to early uartlite initialization.

Signed-off-by: Michal Simek <monstr@monstr.eu>
---
 arch/microblaze/include/asm/byteorder.h |    4 ++++
 arch/microblaze/include/asm/checksum.h  |    9 +++++++--
 arch/microblaze/include/asm/cpuinfo.h   |    3 ++-
 arch/microblaze/include/asm/elf.h       |    2 +-
 arch/microblaze/include/asm/unaligned.h |   12 +++++++++---
 arch/microblaze/kernel/heartbeat.c      |    3 ++-
 arch/microblaze/kernel/intc.c           |    9 ++++++---
 arch/microblaze/kernel/prom.c           |    7 ++++---
 arch/microblaze/kernel/timer.c          |    8 +++++---
 arch/microblaze/kernel/vmlinux.lds.S    |    4 ++++
 10 files changed, 44 insertions(+), 17 deletions(-)

diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index ce9c587..3190276 100644
--- a/arch/microblaze/include/asm/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -1,6 +1,10 @@
 #ifndef _ASM_MICROBLAZE_BYTEORDER_H
 #define _ASM_MICROBLAZE_BYTEORDER_H
 
+#ifdef __MICROBLAZEEL__
+#include <linux/byteorder/little_endian.h>
+#else
 #include <linux/byteorder/big_endian.h>
+#endif
 
 #endif /* _ASM_MICROBLAZE_BYTEORDER_H */
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
index 128bf03..0185cbe 100644
--- a/arch/microblaze/include/asm/checksum.h
+++ b/arch/microblaze/include/asm/checksum.h
@@ -24,8 +24,13 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
 		"addc %0, %0, %3\n\t"
 		"addc %0, %0, r0\n\t"
 		: "+&d" (sum)
-		: "d" (saddr), "d" (daddr), "d" (len + proto));
-
+		: "d" (saddr), "d" (daddr),
+#ifdef __MICROBLAZEEL__
+	"d" ((len + proto) << 8)
+#else
+	"d" (len + proto)
+#endif
+);
 	return sum;
 }
 
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index 0d4f0ce..7fab800 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -98,7 +98,8 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
 static inline unsigned int fcpu(struct device_node *cpu, char *n)
 {
 	int *val;
-	return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0;
+	return (val = (int *) of_get_property(cpu, n, NULL)) ?
+							be32_to_cpup(val) : 0;
 }
 
 #endif /* _ASM_MICROBLAZE_CPUINFO_H */
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
index 732caf1..098dfdd 100644
--- a/arch/microblaze/include/asm/elf.h
+++ b/arch/microblaze/include/asm/elf.h
@@ -71,7 +71,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 
 #define ELF_ET_DYN_BASE         (0x08000000)
 
-#ifdef __LITTLE_ENDIAN__
+#ifdef __MICROBLAZEEL__
 #define ELF_DATA	ELFDATA2LSB
 #else
 #define ELF_DATA	ELFDATA2MSB
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
index 3658d91..2b97cbe 100644
--- a/arch/microblaze/include/asm/unaligned.h
+++ b/arch/microblaze/include/asm/unaligned.h
@@ -12,12 +12,18 @@
 
 # ifdef __KERNEL__
 
-# include <linux/unaligned/be_struct.h>
+# include <linux/unaligned/be_byteshift.h>
 # include <linux/unaligned/le_byteshift.h>
 # include <linux/unaligned/generic.h>
 
-# define get_unaligned	__get_unaligned_be
-# define put_unaligned	__put_unaligned_be
+
+#  ifdef __MICROBLAZEEL__
+#   define get_unaligned	__get_unaligned_le
+#   define put_unaligned	__put_unaligned_le
+#  else
+#   define get_unaligned	__get_unaligned_be
+#   define put_unaligned	__put_unaligned_be
+#  endif
 
 # endif	/* __KERNEL__ */
 #endif /* _ASM_MICROBLAZE_UNALIGNED_H */
diff --git a/arch/microblaze/kernel/heartbeat.c b/arch/microblaze/kernel/heartbeat.c
index 5c24eb8..efb9a9d 100644
--- a/arch/microblaze/kernel/heartbeat.c
+++ b/arch/microblaze/kernel/heartbeat.c
@@ -59,7 +59,8 @@ void setup_heartbeat(void)
 	}
 
 	if (gpio) {
-		base_addr = *(int *) of_get_property(gpio, "reg", NULL);
+		base_addr = be32_to_cpup((int *)of_get_property(gpio,
+								"reg", NULL));
 		base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE);
 		printk(KERN_NOTICE "Heartbeat GPIO at 0x%x\n", base_addr);
 
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index e85bbea..d175a5b 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -138,12 +138,15 @@ void __init init_IRQ(void)
 	}
 	BUG_ON(!intc);
 
-	intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL);
+	intc_baseaddr = be32_to_cpup((int *) of_get_property(intc,
+								"reg", NULL));
 	intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE);
-	nr_irq = *(int *) of_get_property(intc, "xlnx,num-intr-inputs", NULL);
+	nr_irq = be32_to_cpup((int *) of_get_property(intc,
+						"xlnx,num-intr-inputs", NULL));
 
 	intr_type =
-		*(int *) of_get_property(intc, "xlnx,kind-of-intr", NULL);
+		be32_to_cpup((int *) of_get_property(intc,
+						"xlnx,kind-of-intr", NULL));
 	if (intr_type >= (1 << (nr_irq + 1)))
 		printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n");
 
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 3617b17..14c81c1 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -77,7 +77,8 @@ static int __init early_init_dt_scan_serial(unsigned long node,
 /* find compatible node with uartlite */
 	p = of_get_flat_dt_prop(node, "compatible", &l);
 	if ((strncmp(p, "xlnx,xps-uartlite", 17) != 0) &&
-			(strncmp(p, "xlnx,opb-uartlite", 17) != 0))
+			(strncmp(p, "xlnx,opb-uartlite", 17) != 0) &&
+			(strncmp(p, "xlnx,axi-uartlite", 17) != 0))
 		return 0;
 
 	addr = of_get_flat_dt_prop(node, "reg", &l);
@@ -87,7 +88,7 @@ static int __init early_init_dt_scan_serial(unsigned long node,
 /* this function is looking for early uartlite console - Microblaze specific */
 int __init early_uartlite_console(void)
 {
-	return of_scan_flat_dt(early_init_dt_scan_serial, NULL);
+	return be32_to_cpu(of_scan_flat_dt(early_init_dt_scan_serial, NULL));
 }
 
 /* MS this is Microblaze specifig function */
@@ -121,7 +122,7 @@ static int __init early_init_dt_scan_serial2(unsigned long node,
 /* this function is looking for early uartlite console - Microblaze specific */
 int __init early_uart16550_console(void)
 {
-	return of_scan_flat_dt(early_init_dt_scan_serial2, NULL);
+	return be32_to_cpu(of_scan_flat_dt(early_init_dt_scan_serial2, NULL));
 }
 #endif
 
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index 64ca14d..b4d5ce4 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -270,11 +270,13 @@ void __init time_init(void)
 	}
 	BUG_ON(!timer);
 
-	timer_baseaddr = *(int *) of_get_property(timer, "reg", NULL);
+	timer_baseaddr = be32_to_cpup((int *) of_get_property(timer,
+								"reg", NULL));
 	timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE);
-	irq = *(int *) of_get_property(timer, "interrupts", NULL);
+	irq = be32_to_cpup((int *) of_get_property(timer, "interrupts", NULL));
 	timer_num =
-		*(int *) of_get_property(timer, "xlnx,one-timer-only", NULL);
+		be32_to_cpup((int *) of_get_property(timer,
+						"xlnx,one-timer-only", NULL));
 	if (timer_num) {
 		eprintk(KERN_EMERG "Please enable two timers in HW\n");
 		BUG();
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index 20b0552..96a88c3 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -15,7 +15,11 @@ ENTRY(microblaze_start)
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/thread_info.h>
 
+#ifdef __MICROBLAZEEL__
+jiffies = jiffies_64;
+#else
 jiffies = jiffies_64 + 4;
+#endif
 
 SECTIONS {
 	. = CONFIG_KERNEL_START;
-- 
1.5.5.1

Re: [PATCH 7/7] microblaze: Add support for little-endian Microblaze

[Grant Likely]

On Wed, Sep 29, 2010 at 03:52:18PM +1000, Michal Simek wrote:
> Microblaze little-endian toolchain exports __MICROBLAZEEL__
> which is used in the kernel to identify little/big endian.
> 
> The most of the changes are in loading values from DTB which
> is always big endian.
> 
> Little endian platforms are based on new AXI bus which has
> impact to early uartlite initialization.
> 
> Signed-off-by: Michal Simek <monstr@monstr.eu>

Hi Michal,

Looks pretty good, but a few comments below.

> ---
>  arch/microblaze/include/asm/byteorder.h |    4 ++++
>  arch/microblaze/include/asm/checksum.h  |    9 +++++++--
>  arch/microblaze/include/asm/cpuinfo.h   |    3 ++-
>  arch/microblaze/include/asm/elf.h       |    2 +-
>  arch/microblaze/include/asm/unaligned.h |   12 +++++++++---
>  arch/microblaze/kernel/heartbeat.c      |    3 ++-
>  arch/microblaze/kernel/intc.c           |    9 ++++++---
>  arch/microblaze/kernel/prom.c           |    7 ++++---
>  arch/microblaze/kernel/timer.c          |    8 +++++---
>  arch/microblaze/kernel/vmlinux.lds.S    |    4 ++++
>  10 files changed, 44 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
> index ce9c587..3190276 100644
> --- a/arch/microblaze/include/asm/byteorder.h
> +++ b/arch/microblaze/include/asm/byteorder.h
> @@ -1,6 +1,10 @@
>  #ifndef _ASM_MICROBLAZE_BYTEORDER_H
>  #define _ASM_MICROBLAZE_BYTEORDER_H
>  
> +#ifdef __MICROBLAZEEL__
> +#include <linux/byteorder/little_endian.h>
> +#else
>  #include <linux/byteorder/big_endian.h>
> +#endif
>  
>  #endif /* _ASM_MICROBLAZE_BYTEORDER_H */
> diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
> index 128bf03..0185cbe 100644
> --- a/arch/microblaze/include/asm/checksum.h
> +++ b/arch/microblaze/include/asm/checksum.h
> @@ -24,8 +24,13 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
>  		"addc %0, %0, %3\n\t"
>  		"addc %0, %0, r0\n\t"
>  		: "+&d" (sum)
> -		: "d" (saddr), "d" (daddr), "d" (len + proto));
> -
> +		: "d" (saddr), "d" (daddr),
> +#ifdef __MICROBLAZEEL__
> +	"d" ((len + proto) << 8)
> +#else
> +	"d" (len + proto)
> +#endif
> +);
>  	return sum;
>  }
>  
> diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
> index 0d4f0ce..7fab800 100644
> --- a/arch/microblaze/include/asm/cpuinfo.h
> +++ b/arch/microblaze/include/asm/cpuinfo.h
> @@ -98,7 +98,8 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
>  static inline unsigned int fcpu(struct device_node *cpu, char *n)
>  {
>  	int *val;
> -	return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0;
> +	return (val = (int *) of_get_property(cpu, n, NULL)) ?
> +							be32_to_cpup(val) : 0;
>  }
>  
>  #endif /* _ASM_MICROBLAZE_CPUINFO_H */
> diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
> index 732caf1..098dfdd 100644
> --- a/arch/microblaze/include/asm/elf.h
> +++ b/arch/microblaze/include/asm/elf.h
> @@ -71,7 +71,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
>  
>  #define ELF_ET_DYN_BASE         (0x08000000)
>  
> -#ifdef __LITTLE_ENDIAN__
> +#ifdef __MICROBLAZEEL__
>  #define ELF_DATA	ELFDATA2LSB
>  #else
>  #define ELF_DATA	ELFDATA2MSB
> diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
> index 3658d91..2b97cbe 100644
> --- a/arch/microblaze/include/asm/unaligned.h
> +++ b/arch/microblaze/include/asm/unaligned.h
> @@ -12,12 +12,18 @@
>  
>  # ifdef __KERNEL__
>  
> -# include <linux/unaligned/be_struct.h>
> +# include <linux/unaligned/be_byteshift.h>
>  # include <linux/unaligned/le_byteshift.h>
>  # include <linux/unaligned/generic.h>
>  
> -# define get_unaligned	__get_unaligned_be
> -# define put_unaligned	__put_unaligned_be
> +
> +#  ifdef __MICROBLAZEEL__
> +#   define get_unaligned	__get_unaligned_le
> +#   define put_unaligned	__put_unaligned_le
> +#  else
> +#   define get_unaligned	__get_unaligned_be
> +#   define put_unaligned	__put_unaligned_be
> +#  endif
>  
>  # endif	/* __KERNEL__ */
>  #endif /* _ASM_MICROBLAZE_UNALIGNED_H */
> diff --git a/arch/microblaze/kernel/heartbeat.c b/arch/microblaze/kernel/heartbeat.c
> index 5c24eb8..efb9a9d 100644
> --- a/arch/microblaze/kernel/heartbeat.c
> +++ b/arch/microblaze/kernel/heartbeat.c
> @@ -59,7 +59,8 @@ void setup_heartbeat(void)
>  	}
>  
>  	if (gpio) {
> -		base_addr = *(int *) of_get_property(gpio, "reg", NULL);
> +		base_addr = be32_to_cpup((int *)of_get_property(gpio,
> +								"reg", NULL));
>  		base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE);
>  		printk(KERN_NOTICE "Heartbeat GPIO at 0x%x\n", base_addr);
>  
> diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
> index e85bbea..d175a5b 100644
> --- a/arch/microblaze/kernel/intc.c
> +++ b/arch/microblaze/kernel/intc.c
> @@ -138,12 +138,15 @@ void __init init_IRQ(void)
>  	}
>  	BUG_ON(!intc);
>  
> -	intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL);
> +	intc_baseaddr = be32_to_cpup((int *) of_get_property(intc,
> +								"reg", NULL));
>  	intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE);
> -	nr_irq = *(int *) of_get_property(intc, "xlnx,num-intr-inputs", NULL);
> +	nr_irq = be32_to_cpup((int *) of_get_property(intc,
> +						"xlnx,num-intr-inputs", NULL));
>  
>  	intr_type =
> -		*(int *) of_get_property(intc, "xlnx,kind-of-intr", NULL);
> +		be32_to_cpup((int *) of_get_property(intc,
> +						"xlnx,kind-of-intr", NULL));

Unnecessary casts (see comment below)

>  	if (intr_type >= (1 << (nr_irq + 1)))
>  		printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n");
>  
> diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
> index 3617b17..14c81c1 100644
> --- a/arch/microblaze/kernel/prom.c
> +++ b/arch/microblaze/kernel/prom.c
> @@ -77,7 +77,8 @@ static int __init early_init_dt_scan_serial(unsigned long node,
>  /* find compatible node with uartlite */
>  	p = of_get_flat_dt_prop(node, "compatible", &l);
>  	if ((strncmp(p, "xlnx,xps-uartlite", 17) != 0) &&
> -			(strncmp(p, "xlnx,opb-uartlite", 17) != 0))
> +			(strncmp(p, "xlnx,opb-uartlite", 17) != 0) &&
> +			(strncmp(p, "xlnx,axi-uartlite", 17) != 0))
>  		return 0;
>  
>  	addr = of_get_flat_dt_prop(node, "reg", &l);
> @@ -87,7 +88,7 @@ static int __init early_init_dt_scan_serial(unsigned long node,
>  /* this function is looking for early uartlite console - Microblaze specific */
>  int __init early_uartlite_console(void)
>  {
> -	return of_scan_flat_dt(early_init_dt_scan_serial, NULL);
> +	return be32_to_cpu(of_scan_flat_dt(early_init_dt_scan_serial, NULL));

of_scan_flat_dt returns a rc that should already by in cpu endianess.
of_scan_flat_dt needs to be fixed instead.

>  }
>  
>  /* MS this is Microblaze specifig function */
> @@ -121,7 +122,7 @@ static int __init early_init_dt_scan_serial2(unsigned long node,
>  /* this function is looking for early uartlite console - Microblaze specific */
>  int __init early_uart16550_console(void)
>  {
> -	return of_scan_flat_dt(early_init_dt_scan_serial2, NULL);
> +	return be32_to_cpu(of_scan_flat_dt(early_init_dt_scan_serial2, NULL));

Ditto

>  }
>  #endif
>  
> diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
> index 64ca14d..b4d5ce4 100644
> --- a/arch/microblaze/kernel/timer.c
> +++ b/arch/microblaze/kernel/timer.c
> @@ -270,11 +270,13 @@ void __init time_init(void)
>  	}
>  	BUG_ON(!timer);
>  
> -	timer_baseaddr = *(int *) of_get_property(timer, "reg", NULL);
> +	timer_baseaddr = be32_to_cpup((int *) of_get_property(timer,
> +								"reg", NULL));

The (int*) casting shouldn't be needed.  of_get_property returns a
'const void *', and be32_to_cpup accepts a 'const __be32 *'.  Ditto
through the other instances of this casting.

>  	timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE);
> -	irq = *(int *) of_get_property(timer, "interrupts", NULL);
> +	irq = be32_to_cpup((int *) of_get_property(timer, "interrupts", NULL));
>  	timer_num =
> -		*(int *) of_get_property(timer, "xlnx,one-timer-only", NULL);
> +		be32_to_cpup((int *) of_get_property(timer,
> +						"xlnx,one-timer-only", NULL));
>  	if (timer_num) {
>  		eprintk(KERN_EMERG "Please enable two timers in HW\n");
>  		BUG();
> diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
> index 20b0552..96a88c3 100644
> --- a/arch/microblaze/kernel/vmlinux.lds.S
> +++ b/arch/microblaze/kernel/vmlinux.lds.S
> @@ -15,7 +15,11 @@ ENTRY(microblaze_start)
>  #include <asm-generic/vmlinux.lds.h>
>  #include <asm/thread_info.h>
>  
> +#ifdef __MICROBLAZEEL__
> +jiffies = jiffies_64;
> +#else
>  jiffies = jiffies_64 + 4;
> +#endif

I comment would go nicely hear to explain to reviewers what this is
about.

Cheers,
g.

Re: [PATCH 7/7] microblaze: Add support for little-endian Microblaze

[Grant Likely]

On Wed, Sep 29, 2010 at 4:31 PM, Michal Simek <monstr@monstr.eu> wrote:
>
>
> 2010/9/29 Grant Likely <grant.likely@secretlab.ca>
>>
>> On Wed, Sep 29, 2010 at 03:52:18PM +1000, Michal Simek wrote:
>> > Microblaze little-endian toolchain exports __MICROBLAZEEL__
>> > which is used in the kernel to identify little/big endian.
>> >
>> > The most of the changes are in loading values from DTB which
>> > is always big endian.
>> >
>> > Little endian platforms are based on new AXI bus which has
>> > impact to early uartlite initialization.
>> >
>> > Signed-off-by: Michal Simek <monstr@monstr.eu>
>>
>> Hi Michal,
>>
>> Looks pretty good, but a few comments below.
>>
>> > @@ -87,7 +88,7 @@ static int __init early_init_dt_scan_serial(unsigned
>> > long node,
>> >  /* this function is looking for early uartlite console - Microblaze
>> > specific */
>> >  int __init early_uartlite_console(void)
>> >  {
>> > -     return of_scan_flat_dt(early_init_dt_scan_serial, NULL);
>> > +     return be32_to_cpu(of_scan_flat_dt(early_init_dt_scan_serial,
>> > NULL));
>>
>> of_scan_flat_dt returns a rc that should already by in cpu endianess.
>> of_scan_flat_dt needs to be fixed instead.
>
> It is easy to do it. I will generate patch for it. It is in drivers/of/fdt.c

Oops, I told you the wrong thing.  the fix needs to be made in
early_init_dt_scan_serial().  of_scan_flat_dt() is just fine.

>> diff --git a/arch/microblaze/kernel/vmlinux.lds.S
>> b/arch/microblaze/kernel/vmlinux.lds.S
>> index 20b0552..96a88c3 100644
>> --- a/arch/microblaze/kernel/vmlinux.lds.S
>> +++ b/arch/microblaze/kernel/vmlinux.lds.S
>> @@ -15,7 +15,11 @@ ENTRY(microblaze_start)
>>  #include <asm-generic/vmlinux.lds.h>
>>  #include <asm/thread_info.h>
>>
>> +#ifdef __MICROBLAZEEL__
>> +jiffies = jiffies_64;
>> +#else
>>  jiffies = jiffies_64 + 4;
>> +#endif
>
>> I comment would go nicely hear to explain to reviewers what this is
>> about.
>
> 1. It is the same what ARM and MIPS (maybe other) have.
>
> 2. Look at this example
> Store 64 bit value ("0x12345678 90abcdef") on little and big endian.
>
> a) big endian
> it is just copying values to the memory.
> 0x0 = 0x12345678
> 0x4 = 0x90abcdef
>
> Address 0 is start of jiffies_64
> and you just want to point on the last (smallest) 32 bit which is on offset
> 0x4 - which is jiffies.
>
> b) little endian
> The same case for little endian
> 0x0 = 0xefcdab90
> 0x4 = 0x78563412
>
> Address 0 is start of jiffies_64
> and you just want to point on the last (smallest) 32 bit which is on offset
> 0x0 - which is jiffies.

Ah, okay.  jiffies_64 is a pointer (I couldn't be bothered to look at
the definition of jiffies it in context).

g.

Re: [PATCH 5/7] microblaze: Add PVR for endians plus detection

[Grant Likely]

On Wed, Sep 29, 2010 at 03:52:16PM +1000, Michal Simek wrote:
> Upcomming microblaze version will support little-endian.
> 
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> ---
>  arch/microblaze/include/asm/cpuinfo.h         |    1 +
>  arch/microblaze/include/asm/pvr.h             |    3 +++
>  arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c |    1 +
>  arch/microblaze/kernel/cpu/cpuinfo-static.c   |    1 +
>  arch/microblaze/kernel/cpu/mb.c               |    3 ++-
>  arch/microblaze/platform/generic/system.dts   |    1 +
>  6 files changed, 9 insertions(+), 1 deletions(-)

FWIW: Acked-by: Grant Likely <grant.likely@secretlab.ca>

> 
> diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
> index b4f5ca3..0d4f0ce 100644
> --- a/arch/microblaze/include/asm/cpuinfo.h
> +++ b/arch/microblaze/include/asm/cpuinfo.h
> @@ -38,6 +38,7 @@ struct cpuinfo {
>  	u32 use_exc;
>  	u32 ver_code;
>  	u32 mmu;
> +	u32 endian;
>  
>  	/* CPU caches */
>  	u32 use_icache;
> diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
> index 3161055..37db96a 100644
> --- a/arch/microblaze/include/asm/pvr.h
> +++ b/arch/microblaze/include/asm/pvr.h
> @@ -32,6 +32,7 @@ struct pvr_s {
>  #define PVR0_USE_DCACHE_MASK		0x01000000
>  #define PVR0_USE_MMU			0x00800000
>  #define PVR0_USE_BTC			0x00400000
> +#define PVR0_ENDI			0x00200000
>  #define PVR0_VERSION_MASK		0x0000FF00
>  #define PVR0_USER1_MASK			0x000000FF
>  
> @@ -209,6 +210,8 @@ struct pvr_s {
>  #define PVR_MMU_TLB_ACCESS(pvr)	(pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
>  #define PVR_MMU_ZONES(pvr)	(pvr.pvr[11] & PVR11_MMU_ZONES)
>  
> +/* endian */
> +#define PVR_ENDIAN(pvr)	(pvr.pvr[0] & PVR0_ENDI)
>  
>  int cpu_has_pvr(void);
>  void get_pvr(struct pvr_s *pvr);
> diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
> index f72dbd6..f70a604 100644
> --- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
> +++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
> @@ -72,6 +72,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
>  	CI(pvr_user2, USER2);
>  
>  	CI(mmu, USE_MMU);
> +	CI(endian, ENDIAN);
>  
>  	CI(use_icache, USE_ICACHE);
>  	CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
> diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
> index 6095aa6..b16b994 100644
> --- a/arch/microblaze/kernel/cpu/cpuinfo-static.c
> +++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
> @@ -119,6 +119,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
>  	ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
>  
>  	ci->mmu = fcpu(cpu, "xlnx,use-mmu");
> +	ci->endian = fcpu(cpu, "xlnx,endianness");
>  
>  	ci->ver_code = 0;
>  	ci->fpga_family_code = 0;
> diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
> index 7086e35..b4048af 100644
> --- a/arch/microblaze/kernel/cpu/mb.c
> +++ b/arch/microblaze/kernel/cpu/mb.c
> @@ -51,11 +51,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
>  	count = seq_printf(m,
>  			"CPU-Family:	MicroBlaze\n"
>  			"FPGA-Arch:	%s\n"
> -			"CPU-Ver:	%s\n"
> +			"CPU-Ver:	%s, %s endian\n"
>  			"CPU-MHz:	%d.%02d\n"
>  			"BogoMips:	%lu.%02lu\n",
>  			fpga_family,
>  			cpu_ver,
> +			cpuinfo.endian ? "little" : "big",
>  			cpuinfo.cpu_clock_freq /
>  			1000000,
>  			cpuinfo.cpu_clock_freq %
> diff --git a/arch/microblaze/platform/generic/system.dts b/arch/microblaze/platform/generic/system.dts
> index ef667d1..3f85df2 100644
> --- a/arch/microblaze/platform/generic/system.dts
> +++ b/arch/microblaze/platform/generic/system.dts
> @@ -85,6 +85,7 @@
>  			xlnx,dynamic-bus-sizing = <0x1>;
>  			xlnx,edge-is-positive = <0x1>;
>  			xlnx,family = "virtex5";
> +			xlnx,endianness = <0x1>;
>  			xlnx,fpu-exception = <0x1>;
>  			xlnx,fsl-data-size = <0x20>;
>  			xlnx,fsl-exception = <0x0>;
> -- 
> 1.5.5.1
> 

Re: [PATCH 4/7] net: emaclite: Add support for little-endian platforms

[Grant Likely]

On Wed, Sep 29, 2010 at 03:52:15PM +1000, Michal Simek wrote:
> Upcomming Microblaze is little endian that's why is necessary
> to fix protocol and length loading.
> 
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> CC: "David S. Miller" <davem@davemloft.net>
> CC: Grant Likely <grant.likely@secretlab.ca>
> CC: Eric Dumazet <eric.dumazet@gmail.com>
> CC: netdev@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
> CC: devicetree-discuss@lists.ozlabs.org

This should go via davem, but it looks correct to me.

Acked-by: Grant Likely <grant.likely@secretlab.ca>

> ---
>  drivers/net/xilinx_emaclite.c |    8 ++++----
>  1 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
> index 71122ee..533ebb1 100644
> --- a/drivers/net/xilinx_emaclite.c
> +++ b/drivers/net/xilinx_emaclite.c
> @@ -430,8 +430,8 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
>  	}
>  
>  	/* Get the protocol type of the ethernet frame that arrived */
> -	proto_type = ((in_be32(addr + XEL_HEADER_OFFSET +
> -			XEL_RXBUFF_OFFSET) >> XEL_HEADER_SHIFT) &
> +	proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
> +			XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
>  			XEL_RPLR_LENGTH_MASK);
>  
>  	/* Check if received ethernet frame is a raw ethernet frame
> @@ -439,9 +439,9 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
>  	if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
>  
>  		if (proto_type == ETH_P_IP) {
> -			length = ((in_be32(addr +
> +			length = ((ntohl(in_be32(addr +
>  					XEL_HEADER_IP_LENGTH_OFFSET +
> -					XEL_RXBUFF_OFFSET) >>
> +					XEL_RXBUFF_OFFSET)) >>
>  					XEL_HEADER_SHIFT) &
>  					XEL_RPLR_LENGTH_MASK);
>  			length += ETH_HLEN + ETH_FCS_LEN;
> -- 
> 1.5.5.1
> 

Re: [PATCH 4/7] net: emaclite: Add support for little-endian platforms

[David Miller]

From: Grant Likely <grant.likely@secretlab.ca>
Date: Wed, 29 Sep 2010 15:11:46 +0900

> On Wed, Sep 29, 2010 at 03:52:15PM +1000, Michal Simek wrote:
>> Upcomming Microblaze is little endian that's why is necessary
>> to fix protocol and length loading.
>> 
>> Signed-off-by: Michal Simek <monstr@monstr.eu>
>> CC: "David S. Miller" <davem@davemloft.net>
>> CC: Grant Likely <grant.likely@secretlab.ca>
>> CC: Eric Dumazet <eric.dumazet@gmail.com>
>> CC: netdev@vger.kernel.org
>> CC: linux-kernel@vger.kernel.org
>> CC: devicetree-discuss@lists.ozlabs.org
> 
> This should go via davem, but it looks correct to me.
> 
> Acked-by: Grant Likely <grant.likely@secretlab.ca>

It doesn't need to, the microblaze guys can integrate this directly:

Acked-by: David S. Miller <davem@davemloft.net>

Re: [PATCH 4/7] net: emaclite: Add support for little-endian platforms

[Michal Simek]

David Miller wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
> Date: Wed, 29 Sep 2010 15:11:46 +0900
> 
>> On Wed, Sep 29, 2010 at 03:52:15PM +1000, Michal Simek wrote:
>>> Upcomming Microblaze is little endian that's why is necessary
>>> to fix protocol and length loading.
>>>
>>> Signed-off-by: Michal Simek <monstr@monstr.eu>
>>> CC: "David S. Miller" <davem@davemloft.net>
>>> CC: Grant Likely <grant.likely@secretlab.ca>
>>> CC: Eric Dumazet <eric.dumazet@gmail.com>
>>> CC: netdev@vger.kernel.org
>>> CC: linux-kernel@vger.kernel.org
>>> CC: devicetree-discuss@lists.ozlabs.org
>> This should go via davem, but it looks correct to me.
>>
>> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> 
> It doesn't need to, the microblaze guys can integrate this directly:
> 
> Acked-by: David S. Miller <davem@davemloft.net>

Thanks for ACKs. I will add them and will take care about it.

Michal


-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian

Re: [PATCH 3/7] of: Fix uart16550 initialization on little-endian systems

[Grant Likely]

On Wed, Sep 29, 2010 at 03:52:14PM +1000, Michal Simek wrote:
> Convert values from big-endian to cpu-endian.
> 
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> CC: Grant Likely <grant.likely@secretlab.ca>
> CC: "David S. Miller" <davem@davemloft.net>
> CC: Tejun Heo <tj@kernel.org>
> CC: linux-kernel@vger.kernel.org
> CC: devicetree-discuss@lists.ozlabs.org

Applied, thanks.

g.

> ---
>  drivers/serial/of_serial.c |   17 ++++++++++-------
>  1 files changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
> index 2af8fd1..0e4d894 100644
> --- a/drivers/serial/of_serial.c
> +++ b/drivers/serial/of_serial.c
> @@ -31,17 +31,19 @@ static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
>  {
>  	struct resource resource;
>  	struct device_node *np = ofdev->dev.of_node;
> -	const unsigned int *clk, *spd;
> +	const unsigned int *spd;
> +	unsigned int clk;
>  	const u32 *prop;
>  	int ret, prop_size;
>  
>  	memset(port, 0, sizeof *port);
>  	spd = of_get_property(np, "current-speed", NULL);
> -	clk = of_get_property(np, "clock-frequency", NULL);
> -	if (!clk) {
> +	prop = of_get_property(np, "clock-frequency", NULL);
> +	if (!prop) {
>  		dev_warn(&ofdev->dev, "no clock-frequency property set\n");
>  		return -ENODEV;
>  	}
> +	clk = be32_to_cpup(prop);
>  
>  	ret = of_address_to_resource(np, 0, &resource);
>  	if (ret) {
> @@ -55,23 +57,24 @@ static int __devinit of_platform_serial_setup(struct platform_device *ofdev,
>  	/* Check for shifted address mapping */
>  	prop = of_get_property(np, "reg-offset", &prop_size);
>  	if (prop && (prop_size == sizeof(u32)))
> -		port->mapbase += *prop;
> +		port->mapbase += be32_to_cpup(prop);
>  
>  	/* Check for registers offset within the devices address range */
>  	prop = of_get_property(np, "reg-shift", &prop_size);
>  	if (prop && (prop_size == sizeof(u32)))
> -		port->regshift = *prop;
> +		port->regshift = be32_to_cpup(prop);
>  
>  	port->irq = irq_of_parse_and_map(np, 0);
>  	port->iotype = UPIO_MEM;
>  	port->type = type;
> -	port->uartclk = *clk;
> +	port->uartclk = clk;
>  	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
>  		| UPF_FIXED_PORT | UPF_FIXED_TYPE;
>  	port->dev = &ofdev->dev;
> +
>  	/* If current-speed was set, then try not to change it. */
>  	if (spd)
> -		port->custom_divisor = *clk / (16 * (*spd));
> +		port->custom_divisor = clk / (16 * be32_to_cpup(spd));
>  
>  	return 0;
>  }
> -- 
> 1.5.5.1
> 

Re: [PATCH 2/7] of: MTD: Fix OF probing on little-endian systems

[Grant Likely]

On Wed, Sep 29, 2010 at 03:52:13PM +1000, Michal Simek wrote:
> Convert big-endian DTB to little-endian if necessary.
> 
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> CC: David Woodhouse <dwmw2@infradead.org>
> CC: Tejun Heo <tj@kernel.org>
> CC: Grant Likely <grant.likely@secretlab.ca>
> CC: linux-mtd@lists.infradead.org
> CC: linux-kernel@vger.kernel.org
> CC: devicetree-discuss@lists.ozlabs.org

Applied, thanks.

g.

> ---
>  drivers/mtd/maps/physmap_of.c |    2 +-
>  drivers/mtd/ofpart.c          |    4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
> index fe63f6b..ec3edf6 100644
> --- a/drivers/mtd/maps/physmap_of.c
> +++ b/drivers/mtd/maps/physmap_of.c
> @@ -294,7 +294,7 @@ static int __devinit of_flash_probe(struct platform_device *dev,
>  		info->list[i].map.name = dev_name(&dev->dev);
>  		info->list[i].map.phys = res.start;
>  		info->list[i].map.size = res_size;
> -		info->list[i].map.bankwidth = *width;
> +		info->list[i].map.bankwidth = be32_to_cpup(width);
>  
>  		err = -ENOMEM;
>  		info->list[i].map.virt = ioremap(info->list[i].map.phys,
> diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c
> index 8bf7dc6..7bd171e 100644
> --- a/drivers/mtd/ofpart.c
> +++ b/drivers/mtd/ofpart.c
> @@ -53,8 +53,8 @@ int __devinit of_mtd_parse_partitions(struct device *dev,
>  			continue;
>  		}
>  
> -		(*pparts)[i].offset = reg[0];
> -		(*pparts)[i].size = reg[1];
> +		(*pparts)[i].offset = be32_to_cpu(reg[0]);
> +		(*pparts)[i].size = be32_to_cpu(reg[1]);
>  
>  		partname = of_get_property(pp, "label", &len);
>  		if (!partname)
> -- 
> 1.5.5.1
> 

Re: [PATCH 1/7] of: GPIO: Fix OF probing on little-endian systems

[Grant Likely]

On Wed, Sep 29, 2010 at 03:52:12PM +1000, Michal Simek wrote:
> DTB is always big-endian that's why is necessary
> to convert it.
> 
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> CC: Grant Likely <grant.likely@secretlab.ca>
> CC: Tejun Heo <tj@kernel.org>
> CC: Anton Vorontsov <avorontsov@ru.mvista.com>
> CC: linux-kernel@vger.kernel.org
> CC: devicetree-discuss@lists.ozlabs.org

Applied, thanks.

g.

> ---
>  drivers/gpio/xilinx_gpio.c |    6 +++---
>  1 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
> index 7096909..846fbd5 100644
> --- a/drivers/gpio/xilinx_gpio.c
> +++ b/drivers/gpio/xilinx_gpio.c
> @@ -171,13 +171,13 @@ static int __devinit xgpio_of_probe(struct device_node *np)
>  	/* Update GPIO state shadow register with default value */
>  	tree_info = of_get_property(np, "xlnx,dout-default", NULL);
>  	if (tree_info)
> -		chip->gpio_state = *tree_info;
> +		chip->gpio_state = be32_to_cpup(tree_info);
>  
>  	/* Update GPIO direction shadow register with default value */
>  	chip->gpio_dir = 0xFFFFFFFF; /* By default, all pins are inputs */
>  	tree_info = of_get_property(np, "xlnx,tri-default", NULL);
>  	if (tree_info)
> -		chip->gpio_dir = *tree_info;
> +		chip->gpio_dir = be32_to_cpup(tree_info);
>  
>  	/* Check device node and parent device node for device width */
>  	chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */
> @@ -186,7 +186,7 @@ static int __devinit xgpio_of_probe(struct device_node *np)
>  		tree_info = of_get_property(np->parent,
>  					    "xlnx,gpio-width", NULL);
>  	if (tree_info)
> -		chip->mmchip.gc.ngpio = *tree_info;
> +		chip->mmchip.gc.ngpio = be32_to_cpup(tree_info);
>  
>  	spin_lock_init(&chip->gpio_lock);
>  
> -- 
> 1.5.5.1
> 

Re: Microblaze little-endian port + driver changes

[Grant Likely]

On Tue, Sep 28, 2010 at 11:52 PM, Michal Simek <monstr@monstr.eu> wrote:
> Hi everybody,
>
> here is the first bunch of patches which is necessary to apply
> to get microblaze little-endian AXI version work.
>
> All patches are placed in microblaze-next branch and they are also
> merged to linux-next branch.
>
> Grant: I would like to ask you if you can please take a look
> at little-endian driver changes.

[cc'ing sfr re: pending linux-next merge conflict]

Hi Michal,

Can you please remove the following patches from your linux-next branch:

of: GPIO: Fix OF probing on little-endian systems
of: MTD: Fix OF probing on little-endian systems
of: Fix uart16550 initialization on little-endian systems

The emaclite patch can stay since it has a proper acked-by from both
davem and I.

I had picked up all three, and then later replaced the of_serial patch
with a better one. However, because it is also in your tree it will
cause a linux-next conflict when Stephen tries to merge.

For device tree patches that touch code outside of arch/microblaze, I
would like them to not show up in linux-next before I've acked them to
avoid this exact problem.  I don't have a problem with device tree
patches going in via another tree, but I need to know about it so that
I can keep things coordinated.

Stephen, when/if you see the conflict, please take the copy of
of_serial.c from my tree.

Thanks,
g.

Re: Microblaze little-endian port + driver changes

[Michal Simek]

Grant Likely wrote:
> On Tue, Sep 28, 2010 at 11:52 PM, Michal Simek <monstr@monstr.eu> wrote:
>> Hi everybody,
>>
>> here is the first bunch of patches which is necessary to apply
>> to get microblaze little-endian AXI version work.
>>
>> All patches are placed in microblaze-next branch and they are also
>> merged to linux-next branch.
>>
>> Grant: I would like to ask you if you can please take a look
>> at little-endian driver changes.
> 
> [cc'ing sfr re: pending linux-next merge conflict]
> 
> Hi Michal,
> 
> Can you please remove the following patches from your linux-next branch:
> 
> of: GPIO: Fix OF probing on little-endian systems
> of: MTD: Fix OF probing on little-endian systems
> of: Fix uart16550 initialization on little-endian systems

Removed from microblaze-next branch.

Regards,
Michal


-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian