From: "H. Peter Anvin" <hpa@zytor.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: linux-kernel@vger.kernel.org, "Siddha,
Suresh B" <suresh.b.siddha@intel.com>,
Venkatesh Pallipadi <venki@google.com>
Subject: Re: Loss of PAT-WC after resume on i5
Date: Mon, 03 Jan 2011 09:29:30 -0800 [thread overview]
Message-ID: <4D22077A.80001@zytor.com> (raw)
In-Reply-To: <1bdc18$j527vf@fmsmga002.fm.intel.com>
On 01/03/2011 08:21 AM, Chris Wilson wrote:
> On Mon, 03 Jan 2011 08:01:05 -0800, "H. Peter Anvin" <hpa@zytor.com> wrote:
>> Sounds like it. It sounds based on your description that it's something
>> more fundamental than just the state of the PAT MSR being lost, too,
>> although perhaps that's the first thing to check...
>
> Right, I should have mentioned that a rdmsr(MSR_ISA32_CR_PAT) showed no
> change across a dysfunctional resume. And that
> /sys/kernel/debug/x86/pat_memtype_list had the same contents (just the
> first entries reversed upon resume).
OK, this is doubly strange: both that entries would have change order
and that they would not be active, if the PAT MSR is set correctly.
That would imply that the page tables are somehow corrupt, which seems
like a scary concept.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
prev parent reply other threads:[~2011-01-03 17:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <849307$b076ne@azsmga001.ch.intel.com>
2011-01-03 16:01 ` Loss of PAT-WC after resume on i5 H. Peter Anvin
2011-01-03 16:21 ` Chris Wilson
2011-01-03 17:29 ` H. Peter Anvin [this message]
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