Re: Loss of PAT-WC after resume on i5

Re: Loss of PAT-WC after resume on i5

[H. Peter Anvin]

On 01/03/2011 04:14 AM, Chris Wilson wrote:
> We have noticed that graphics may become very slow after suspend & resume.
> One effect that we have clearly identified is that writing through the GTT
> becomes very slow:
> 
> Before suspending:
>   Time to pwrite 16k through the CPU:               4µs
>   Time to read 16k through a GTT map:             901µs
>   Time to write 16k through a GTT map:             23µs
>   Time to read 16k (again) through a GTT map:     900µs
>   Time to pwrite 16k through the GTT:               7µs
> 
> After resume:
>   Time to pwrite 16k through the CPU:               4µs
>   Time to read 16k through a GTT map:             900µs
>   Time to write 16k through a GTT map:            876µs
>   Time to read 16k (again) through a GTT map:     899µs
>   Time to pwrite 16k through the GTT:             431µs
> 
> Presuming that it was the loss of the WC mapping, I tore down and
> recreated the ioremap_wc upon resume which restored performance back to
> normal.
> 
> So could we indeed be failing to restore the PAT caching state upon
> resume?
> 

Sounds like it.  It sounds based on your description that it's something
more fundamental than just the state of the PAT MSR being lost, too,
although perhaps that's the first thing to check...

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

Re: Loss of PAT-WC after resume on i5

[Chris Wilson]

On Mon, 03 Jan 2011 08:01:05 -0800, "H. Peter Anvin" <hpa@zytor.com> wrote:
> Sounds like it.  It sounds based on your description that it's something
> more fundamental than just the state of the PAT MSR being lost, too,
> although perhaps that's the first thing to check...

Right, I should have mentioned that a rdmsr(MSR_ISA32_CR_PAT) showed no
change across a dysfunctional resume. And that
/sys/kernel/debug/x86/pat_memtype_list had the same contents (just the
first entries reversed upon resume).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: Loss of PAT-WC after resume on i5

[H. Peter Anvin]

On 01/03/2011 08:21 AM, Chris Wilson wrote:
> On Mon, 03 Jan 2011 08:01:05 -0800, "H. Peter Anvin" <hpa@zytor.com> wrote:
>> Sounds like it.  It sounds based on your description that it's something
>> more fundamental than just the state of the PAT MSR being lost, too,
>> although perhaps that's the first thing to check...
> 
> Right, I should have mentioned that a rdmsr(MSR_ISA32_CR_PAT) showed no
> change across a dysfunctional resume. And that
> /sys/kernel/debug/x86/pat_memtype_list had the same contents (just the
> first entries reversed upon resume).

OK, this is doubly strange: both that entries would have change order
and that they would not be active, if the PAT MSR is set correctly.
That would imply that the page tables are somehow corrupt, which seems
like a scary concept.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.