From: Denis Turischev <denis@compulab.co.il>
To: Greg Kroah-Hartman <gregkh@suse.de>
Cc: linux-kernel@vger.kernel.org,
Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Subject: pch_uart: reference clock on CM-iTC
Date: Mon, 07 Mar 2011 11:31:44 +0200 [thread overview]
Message-ID: <4D74A600.7070302@compulab.co.il> (raw)
Default clock source for UARTs on Topcliff is external UART_CLK.
On CM-iTC USB_48MHz is used unstead. After VCO2PLL and DIV
manipulations UARTs will receive 192 MHz.
Clock manipulations on Topcliff are controlled in pch_phub.c
Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
drivers/misc/pch_phub.c | 16 ++++++++++++++++
drivers/tty/serial/pch_uart.c | 9 +++++++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index 744b804..50cb839 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -27,6 +27,7 @@
#include <linux/mutex.h>
#include <linux/if_ether.h>
#include <linux/ctype.h>
+#include <linux/dmi.h>
#define PHUB_STATUS 0x00 /* Status Register offset */
#define PHUB_CONTROL 0x04 /* Control Register offset */
@@ -41,6 +42,13 @@
#define PCH_MINOR_NOS 1
#define CLKCFG_CAN_50MHZ 0x12000000
#define CLKCFG_CANCLK_MASK 0xFF000000
+#define CLKCFG_UART_MASK 0xFFFFFF
+
+/* CM-iTC */
+#define CLKCFG_UART_48MHZ (1 << 16)
+#define CLKCFG_BAUDDIV (2 << 20)
+#define CLKCFG_PLL2VCO (8 << 9)
+#define CLKCFG_UARTCLKSEL (1 << 18)
/* SROM ACCESS Macro */
#define PCH_WORD_ADDR_MASK (~((1 << 2) - 1))
@@ -607,6 +615,14 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
pch_phub_read_modify_write_reg(chip, (unsigned int)CLKCFG_REG_OFFSET,
CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK);
+ /* quirk for CM-iTC board */
+ if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+ pch_phub_read_modify_write_reg(chip,
+ (unsigned int)CLKCFG_REG_OFFSET,
+ CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV |
+ CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL,
+ CLKCFG_UART_MASK);
+
/* set the prefech value */
iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 70a6145..9689ac6 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -21,6 +21,7 @@
#include <linux/serial_core.h>
#include <linux/interrupt.h>
#include <linux/io.h>
+#include <linux/dmi.h>
#include <linux/dmaengine.h>
#include <linux/pch_dma.h>
@@ -1267,14 +1268,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
if (!rxbuf)
goto init_port_free_txbuf;
+ base_baud = 1843200; /* 1.8432MHz */
+
+ /* quirk for CM-iTC board */
+ if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+ base_baud = 192000000; /* 192.0MHz */
+
switch (port_type) {
case PORT_UNKNOWN:
fifosize = 256; /* UART0 */
- base_baud = 1843200; /* 1.8432MHz */
break;
case PORT_8250:
fifosize = 64; /* UART1~3 */
- base_baud = 1843200; /* 1.8432MHz */
break;
default:
dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type);
--
1.7.0.4
--
Denis
next reply other threads:[~2011-03-07 9:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-07 9:31 Denis Turischev [this message]
2011-03-07 20:07 ` pch_uart: reference clock on CM-iTC Greg KH
2011-03-08 12:22 ` [PATCH v2] " Denis Turischev
2011-03-09 23:42 ` Greg KH
2011-03-10 13:14 ` [PATCH v3] " Denis Turischev
2011-03-11 22:25 ` Greg KH
2011-03-13 13:48 ` Denis Turischev
2011-03-14 23:25 ` Greg KH
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