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* pch_uart: reference clock on CM-iTC
@ 2011-03-07  9:31 Denis Turischev
  2011-03-07 20:07 ` Greg KH
  0 siblings, 1 reply; 8+ messages in thread
From: Denis Turischev @ 2011-03-07  9:31 UTC (permalink / raw)
  To: Greg Kroah-Hartman; +Cc: linux-kernel, Tomoya MORINAGA

Default clock source for UARTs on Topcliff is external UART_CLK.
On CM-iTC USB_48MHz is used unstead. After VCO2PLL and DIV
manipulations UARTs will receive 192 MHz.
Clock manipulations on Topcliff are controlled in pch_phub.c

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
 drivers/misc/pch_phub.c       |   16 ++++++++++++++++
 drivers/tty/serial/pch_uart.c |    9 +++++++--
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index 744b804..50cb839 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -27,6 +27,7 @@
 #include <linux/mutex.h>
 #include <linux/if_ether.h>
 #include <linux/ctype.h>
+#include <linux/dmi.h>

 #define PHUB_STATUS 0x00		/* Status Register offset */
 #define PHUB_CONTROL 0x04		/* Control Register offset */
@@ -41,6 +42,13 @@
 #define PCH_MINOR_NOS 1
 #define CLKCFG_CAN_50MHZ 0x12000000
 #define CLKCFG_CANCLK_MASK 0xFF000000
+#define CLKCFG_UART_MASK			0xFFFFFF
+
+/* CM-iTC */
+#define CLKCFG_UART_48MHZ			(1 << 16)
+#define CLKCFG_BAUDDIV				(2 << 20)
+#define CLKCFG_PLL2VCO				(8 << 9)
+#define CLKCFG_UARTCLKSEL			(1 << 18)

 /* SROM ACCESS Macro */
 #define PCH_WORD_ADDR_MASK (~((1 << 2) - 1))
@@ -607,6 +615,14 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
 	pch_phub_read_modify_write_reg(chip, (unsigned int)CLKCFG_REG_OFFSET,
 					CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK);

+	/* quirk for CM-iTC board */
+	if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+		pch_phub_read_modify_write_reg(chip,
+					(unsigned int)CLKCFG_REG_OFFSET,
+					CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV |
+					CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL,
+					CLKCFG_UART_MASK);
+
 	/* set the prefech value */
 	iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
 	/* set the interrupt delay value */
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 70a6145..9689ac6 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -21,6 +21,7 @@
 #include <linux/serial_core.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/dmi.h>

 #include <linux/dmaengine.h>
 #include <linux/pch_dma.h>
@@ -1267,14 +1268,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	if (!rxbuf)
 		goto init_port_free_txbuf;

+	base_baud = 1843200; /* 1.8432MHz */
+
+	/* quirk for CM-iTC board */
+	if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+		base_baud = 192000000; /* 192.0MHz */
+
 	switch (port_type) {
 	case PORT_UNKNOWN:
 		fifosize = 256; /* UART0 */
-		base_baud = 1843200; /* 1.8432MHz */
 		break;
 	case PORT_8250:
 		fifosize = 64; /* UART1~3 */
-		base_baud = 1843200; /* 1.8432MHz */
 		break;
 	default:
 		dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type);
-- 
1.7.0.4

-- 
Denis

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: pch_uart: reference clock on CM-iTC
  2011-03-07  9:31 pch_uart: reference clock on CM-iTC Denis Turischev
@ 2011-03-07 20:07 ` Greg KH
  2011-03-08 12:22   ` [PATCH v2] " Denis Turischev
  0 siblings, 1 reply; 8+ messages in thread
From: Greg KH @ 2011-03-07 20:07 UTC (permalink / raw)
  To: Denis Turischev; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

On Mon, Mar 07, 2011 at 11:31:44AM +0200, Denis Turischev wrote:
> Default clock source for UARTs on Topcliff is external UART_CLK.
> On CM-iTC USB_48MHz is used unstead. After VCO2PLL and DIV
> manipulations UARTs will receive 192 MHz.
> Clock manipulations on Topcliff are controlled in pch_phub.c
> 
> Signed-off-by: Denis Turischev <denis@compulab.co.il>
> ---
>  drivers/misc/pch_phub.c       |   16 ++++++++++++++++
>  drivers/tty/serial/pch_uart.c |    9 +++++++--

This patch fails to apply to my tree, care to redo it against the
linux-next tree and resend it?

thanks,

greg k-h

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v2] pch_uart: reference clock on CM-iTC
  2011-03-07 20:07 ` Greg KH
@ 2011-03-08 12:22   ` Denis Turischev
  2011-03-09 23:42     ` Greg KH
  0 siblings, 1 reply; 8+ messages in thread
From: Denis Turischev @ 2011-03-08 12:22 UTC (permalink / raw)
  To: Greg KH; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

Default clock source for UARTs on Topcliff is external UART_CLK.
On CM-iTC USB_48MHz is used instead. After VCO2PLL and DIV
manipulations UARTs will receive 192 MHz.
Clock manipulations on Topcliff are controlled in pch_phub.c

v2: redone against the linux-next tree

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
 drivers/misc/pch_phub.c       |   19 +++++++++++++++++++
 drivers/tty/serial/pch_uart.c |    9 +++++++--
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index 98bffc4..a85c4a3 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -27,6 +27,7 @@
 #include <linux/mutex.h>
 #include <linux/if_ether.h>
 #include <linux/ctype.h>
+#include <linux/dmi.h>

 #define PHUB_STATUS 0x00		/* Status Register offset */
 #define PHUB_CONTROL 0x04		/* Control Register offset */
@@ -46,6 +47,13 @@
 #define PCH_MINOR_NOS 1
 #define CLKCFG_CAN_50MHZ 0x12000000
 #define CLKCFG_CANCLK_MASK 0xFF000000
+#define CLKCFG_UART_MASK			0xFFFFFF
+
+/* CM-iTC */
+#define CLKCFG_UART_48MHZ			(1 << 16)
+#define CLKCFG_BAUDDIV				(2 << 20)
+#define CLKCFG_PLL2VCO				(8 << 9)
+#define CLKCFG_UARTCLKSEL			(1 << 18)

 /* Macros for ML7213 */
 #define PCI_VENDOR_ID_ROHM			0x10db
@@ -618,6 +626,17 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
 					       CLKCFG_CAN_50MHZ,
 					       CLKCFG_CANCLK_MASK);

+		/* quirk for CM-iTC board */
+		if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+			pch_phub_read_modify_write_reg(chip,
+						(unsigned int)CLKCFG_REG_OFFSET,
+						CLKCFG_UART_48MHZ |
+						CLKCFG_BAUDDIV |
+						CLKCFG_PLL2VCO |
+						CLKCFG_UARTCLKSEL,
+						CLKCFG_UART_MASK);
+
+
 		/* set the prefech value */
 		iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
 		/* set the interrupt delay value */
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 7aba41f..26403b8 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -20,6 +20,7 @@
 #include <linux/serial_core.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/dmi.h>

 #include <linux/dmaengine.h>
 #include <linux/pch_dma.h>
@@ -1403,14 +1404,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
 	if (!rxbuf)
 		goto init_port_free_txbuf;

+	base_baud = 1843200; /* 1.8432MHz */
+
+	/* quirk for CM-iTC board */
+	if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+		base_baud = 192000000; /* 192.0MHz */
+
 	switch (port_type) {
 	case PORT_UNKNOWN:
 		fifosize = 256; /* EG20T/ML7213: UART0 */
-		base_baud = 1843200; /* 1.8432MHz */
 		break;
 	case PORT_8250:
 		fifosize = 64; /* EG20T:UART1~3  ML7213: UART1~2*/
-		base_baud = 1843200; /* 1.8432MHz */
 		break;
 	default:
 		dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type);
-- 
1.7.0.4

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] pch_uart: reference clock on CM-iTC
  2011-03-08 12:22   ` [PATCH v2] " Denis Turischev
@ 2011-03-09 23:42     ` Greg KH
  2011-03-10 13:14       ` [PATCH v3] " Denis Turischev
  0 siblings, 1 reply; 8+ messages in thread
From: Greg KH @ 2011-03-09 23:42 UTC (permalink / raw)
  To: Denis Turischev; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

On Tue, Mar 08, 2011 at 02:22:23PM +0200, Denis Turischev wrote:
> Default clock source for UARTs on Topcliff is external UART_CLK.
> On CM-iTC USB_48MHz is used instead. After VCO2PLL and DIV
> manipulations UARTs will receive 192 MHz.
> Clock manipulations on Topcliff are controlled in pch_phub.c
> 
> v2: redone against the linux-next tree

Are you sure?  I still get the following conflicts when applying it:
	patching file drivers/misc/pch_phub.c
	Hunk #2 succeeded at 42 with fuzz 2 (offset -5 lines).
	Hunk #3 FAILED at 626.
	1 out of 3 hunks FAILED -- saving rejects to file drivers/misc/pch_phub.c.rej
	patching file drivers/tty/serial/pch_uart.c
	Hunk #1 succeeded at 21 (offset 1 line).
	Hunk #2 succeeded at 1405 (offset 1 line).

confused,

greg k-h

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3] pch_uart: reference clock on CM-iTC
  2011-03-09 23:42     ` Greg KH
@ 2011-03-10 13:14       ` Denis Turischev
  2011-03-11 22:25         ` Greg KH
  0 siblings, 1 reply; 8+ messages in thread
From: Denis Turischev @ 2011-03-10 13:14 UTC (permalink / raw)
  To: Greg KH; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

Default clock source for UARTs on Topcliff is external UART_CLK.
On CM-iTC USB_48MHz is used instead. After VCO2PLL and DIV
manipulations UARTs will receive 192 MHz.
Clock manipulations on Topcliff are controlled in pch_phub.c

v2: redone against the linux-next tree
v3: redone against linux/kernel/git/next/linux-next.git snapshot

Signed-off-by: Denis Turischev <denis@compulab.co.il>
---
diff -Nru linux-next-20110310.orig/drivers/misc/pch_phub.c linux-next-20110310/drivers/misc/pch_phub.c
--- linux-next-20110310.orig/drivers/misc/pch_phub.c	2011-03-10 08:31:30.000000000 +0200
+++ linux-next-20110310/drivers/misc/pch_phub.c	2011-03-10 14:42:05.110978473 +0200
@@ -27,6 +27,7 @@
 #include <linux/mutex.h>
 #include <linux/if_ether.h>
 #include <linux/ctype.h>
+#include <linux/dmi.h>

 #define PHUB_STATUS 0x00		/* Status Register offset */
 #define PHUB_CONTROL 0x04		/* Control Register offset */
@@ -46,6 +47,13 @@
 #define PCH_MINOR_NOS 1
 #define CLKCFG_CAN_50MHZ 0x12000000
 #define CLKCFG_CANCLK_MASK 0xFF000000
+#define CLKCFG_UART_MASK			0xFFFFFF
+
+/* CM-iTC */
+#define CLKCFG_UART_48MHZ			(1 << 16)
+#define CLKCFG_BAUDDIV				(2 << 20)
+#define CLKCFG_PLL2VCO				(8 << 9)
+#define CLKCFG_UARTCLKSEL			(1 << 18)

 /* Macros for ML7213 */
 #define PCI_VENDOR_ID_ROHM			0x10db
@@ -618,6 +626,14 @@
 					       CLKCFG_CAN_50MHZ,
 					       CLKCFG_CANCLK_MASK);

+		/* quirk for CM-iTC board */
+		if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+			pch_phub_read_modify_write_reg(chip,
+						(unsigned int)CLKCFG_REG_OFFSET,
+						CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV |
+						CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL,
+						CLKCFG_UART_MASK);
+
 		/* set the prefech value */
 		iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
 		/* set the interrupt delay value */
diff -Nru linux-next-20110310.orig/drivers/tty/serial/pch_uart.c linux-next-20110310/drivers/tty/serial/pch_uart.c
--- linux-next-20110310.orig/drivers/tty/serial/pch_uart.c	2011-03-10 08:31:30.000000000 +0200
+++ linux-next-20110310/drivers/tty/serial/pch_uart.c	2011-03-10 14:45:46.123478166 +0200
@@ -20,6 +20,7 @@
 #include <linux/serial_core.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/dmi.h>

 #include <linux/dmaengine.h>
 #include <linux/pch_dma.h>
@@ -1403,14 +1404,18 @@
 	if (!rxbuf)
 		goto init_port_free_txbuf;

+	base_baud = 1843200; /* 1.8432MHz */
+
+	/* quirk for CM-iTC board */
+	if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
+		base_baud = 192000000; /* 192.0MHz */
+
 	switch (port_type) {
 	case PORT_UNKNOWN:
 		fifosize = 256; /* EG20T/ML7213: UART0 */
-		base_baud = 1843200; /* 1.8432MHz */
 		break;
 	case PORT_8250:
 		fifosize = 64; /* EG20T:UART1~3  ML7213: UART1~2*/
-		base_baud = 1843200; /* 1.8432MHz */
 		break;
 	default:
 		dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type);

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3] pch_uart: reference clock on CM-iTC
  2011-03-10 13:14       ` [PATCH v3] " Denis Turischev
@ 2011-03-11 22:25         ` Greg KH
  2011-03-13 13:48           ` Denis Turischev
  0 siblings, 1 reply; 8+ messages in thread
From: Greg KH @ 2011-03-11 22:25 UTC (permalink / raw)
  To: Denis Turischev; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

On Thu, Mar 10, 2011 at 03:14:00PM +0200, Denis Turischev wrote:
> Default clock source for UARTs on Topcliff is external UART_CLK.
> On CM-iTC USB_48MHz is used instead. After VCO2PLL and DIV
> manipulations UARTs will receive 192 MHz.
> Clock manipulations on Topcliff are controlled in pch_phub.c
> 
> v2: redone against the linux-next tree
> v3: redone against linux/kernel/git/next/linux-next.git snapshot
> 
> Signed-off-by: Denis Turischev <denis@compulab.co.il>
> ---
> diff -Nru linux-next-20110310.orig/drivers/misc/pch_phub.c linux-next-20110310/drivers/misc/pch_phub.c
> --- linux-next-20110310.orig/drivers/misc/pch_phub.c	2011-03-10 08:31:30.000000000 +0200
> +++ linux-next-20110310/drivers/misc/pch_phub.c	2011-03-10 14:42:05.110978473 +0200
> @@ -618,6 +626,14 @@
>  					       CLKCFG_CAN_50MHZ,
>  					       CLKCFG_CANCLK_MASK);
> 
> +		/* quirk for CM-iTC board */
> +		if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
> +			pch_phub_read_modify_write_reg(chip,
> +						(unsigned int)CLKCFG_REG_OFFSET,
> +						CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV |
> +						CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL,
> +						CLKCFG_UART_MASK);
> +

This is the chunk that is causing problems.  I guess someone else
modified this file in the linux-next tree, and I can't apply it in mine.
Any ideas who did this change?  Can you look at the linux-next tree and
see what caused this merge issue?

thanks,

greg k-h

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3] pch_uart: reference clock on CM-iTC
  2011-03-11 22:25         ` Greg KH
@ 2011-03-13 13:48           ` Denis Turischev
  2011-03-14 23:25             ` Greg KH
  0 siblings, 1 reply; 8+ messages in thread
From: Denis Turischev @ 2011-03-13 13:48 UTC (permalink / raw)
  To: Greg KH; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

Hi Greg,

There is a patch to pch_phub.c that is absent in your linux/kernel/git/gregkh/tty-2.6.git
pch_phub: add new device ML7213
http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=commit;h=c47dda7d179dde17697c3f839f150fecaf6770cb

>From which repository you want my patch to be based?

On 03/12/2011 12:25 AM, Greg KH wrote:
> On Thu, Mar 10, 2011 at 03:14:00PM +0200, Denis Turischev wrote:
>> Default clock source for UARTs on Topcliff is external UART_CLK.
>> On CM-iTC USB_48MHz is used instead. After VCO2PLL and DIV
>> manipulations UARTs will receive 192 MHz.
>> Clock manipulations on Topcliff are controlled in pch_phub.c
>>
>> v2: redone against the linux-next tree
>> v3: redone against linux/kernel/git/next/linux-next.git snapshot
>>
>> Signed-off-by: Denis Turischev <denis@compulab.co.il>
>> ---
>> diff -Nru linux-next-20110310.orig/drivers/misc/pch_phub.c linux-next-20110310/drivers/misc/pch_phub.c
>> --- linux-next-20110310.orig/drivers/misc/pch_phub.c	2011-03-10 08:31:30.000000000 +0200
>> +++ linux-next-20110310/drivers/misc/pch_phub.c	2011-03-10 14:42:05.110978473 +0200
>> @@ -618,6 +626,14 @@
>>  					       CLKCFG_CAN_50MHZ,
>>  					       CLKCFG_CANCLK_MASK);
>>
>> +		/* quirk for CM-iTC board */
>> +		if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC"))
>> +			pch_phub_read_modify_write_reg(chip,
>> +						(unsigned int)CLKCFG_REG_OFFSET,
>> +						CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV |
>> +						CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL,
>> +						CLKCFG_UART_MASK);
>> +
> 
> This is the chunk that is causing problems.  I guess someone else
> modified this file in the linux-next tree, and I can't apply it in mine.
> Any ideas who did this change?  Can you look at the linux-next tree and
> see what caused this merge issue?
> 
> thanks,
> 
> greg k-h


-- 
Denis

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3] pch_uart: reference clock on CM-iTC
  2011-03-13 13:48           ` Denis Turischev
@ 2011-03-14 23:25             ` Greg KH
  0 siblings, 0 replies; 8+ messages in thread
From: Greg KH @ 2011-03-14 23:25 UTC (permalink / raw)
  To: Denis Turischev; +Cc: Greg Kroah-Hartman, linux-kernel, Tomoya MORINAGA

On Sun, Mar 13, 2011 at 03:48:00PM +0200, Denis Turischev wrote:
> Hi Greg,
> 
> There is a patch to pch_phub.c that is absent in your linux/kernel/git/gregkh/tty-2.6.git
> pch_phub: add new device ML7213
> http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=commit;h=c47dda7d179dde17697c3f839f150fecaf6770cb
> 
> >From which repository you want my patch to be based?

Ok, sorry, that was from one of my other trees (the driver-core one).
I've now cherry picked that patch into my tty one and taken yours as
well.

Sorry for the mess, it was my fault.

greg k-h

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2011-03-14 23:47 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-03-07  9:31 pch_uart: reference clock on CM-iTC Denis Turischev
2011-03-07 20:07 ` Greg KH
2011-03-08 12:22   ` [PATCH v2] " Denis Turischev
2011-03-09 23:42     ` Greg KH
2011-03-10 13:14       ` [PATCH v3] " Denis Turischev
2011-03-11 22:25         ` Greg KH
2011-03-13 13:48           ` Denis Turischev
2011-03-14 23:25             ` Greg KH

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