From: Burt Triplett <burt@pbjtriplett.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>,
linux-kernel@vger.kernel.org
Subject: Re: BITS handling of CPU microcode updates
Date: Fri, 25 Mar 2011 00:05:53 -0700 [thread overview]
Message-ID: <4D8C3ED1.5000704@pbjtriplett.org> (raw)
In-Reply-To: <m2ipv8kx8y.fsf@firstfloor.org>
On 3/24/2011 2:46 PM, Andi Kleen wrote:
> Henrique de Moraes Holschuh<hmh@hmh.eng.br> writes:
>>
>> Very well, I will send patches to fix that behaviour, as well as some
>> other stuff I noticed that was not updated to match the recommended
>> actions documented by the SDM and some Intel application notes.
>
> I don't think you can easily -- there's no kernel interface
> to distingush the "explicit user action" case from automatic loading.
Correct, but the microcode module can still implement the "automatic
loading" case, as Henrique's patch does.
> I suppose all the test labs have learned by now how to disable
> automatic updates ...
The microcode driver's current unsigned revision checking happens to
treat negative revisions as large positive revisions, so it happened to
work OK in the test lab environments, though not by design. :)
- Burt Triplett
next prev parent reply other threads:[~2011-03-25 7:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-24 5:36 [announce] Intel BIOS Implementation Test Suite (BITS) Burt Triplett
2011-03-12 2:30 ` BITS handling of CPU microcode updates Henrique de Moraes Holschuh
2011-03-21 23:44 ` Burt Triplett
2011-03-24 0:14 ` Henrique de Moraes Holschuh
2011-03-24 20:53 ` Burt Triplett
2011-03-25 0:57 ` Henrique de Moraes Holschuh
2011-03-24 21:46 ` Andi Kleen
2011-03-25 7:05 ` Burt Triplett [this message]
2011-03-25 2:09 ` x86/microcode: intel: correctly handle negative revisions Henrique de Moraes Holschuh
2011-03-25 7:14 ` Burt Triplett
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