Re: [PATCH 2/3] perf, x86: Use GO/HO bits in perf-ctr

[Avi Kivity <avi@redhat.com>]

On 05/10/2011 06:04 PM, Roedel, Joerg wrote:
> On Tue, May 10, 2011 at 10:48:20AM -0400, Peter Zijlstra wrote:
> >  On Tue, 2011-05-10 at 16:35 +0200, Joerg Roedel wrote:
> >  >  The AMD perf-counters support counting in guest or host-mode
> >  >  only. Make use of that feature when user-space specified
> >  >  guest/host-mode only counting.
> >
> >  Subject mentions x86, does Intel have anything similar so you can make
> >  it work for them too?
>
> Intel does not support guest or host-only counting in the hardware (at
> least according to my documentation). If wanted it could be approximated by
> enabling/disabling the counters in the guest-entry path.

vmx has support for atomically swapping MSRs during guest entry and exit 
(you can load guest MSRs on entry, save guest MSRs on exit, and load 
host MSRs on exit, but you can't save host MSRs on entry, so host-only 
counters cannot be 100% accurate).  We'd need some kvm/perf hooks to 
program these MSR swaps, and to manually save the counters that cannot 
be done automatically.

btw, your patchset can be further improved by integrating 
exclude_guest/exclude_host into the constraints.  For example if we have 
three general purpose counters, two generic perf_events in user, one 
exclude_guest perf_event, and one exclude_host perf_event, we can 
schedule them all at all times, swapping the exclude_guest and 
exclude_host events during guest entry/exit.

-- 
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