From: Nicolas Ferre <nicolas.ferre@atmel.com>
To: Mark Brown <broonie@opensource.wolfsonmicro.com>,
alsa-devel@alsa-project.org
Cc: lrg@ti.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Subject: Re: [PATCH 1/5] ASoC: wm8731: rework power management
Date: Thu, 30 Jun 2011 15:57:12 +0200 [thread overview]
Message-ID: <4E0C80B8.7030006@atmel.com> (raw)
In-Reply-To: <20110629171148.GB10798@opensource.wolfsonmicro.com>
Le 29/06/2011 19:11, Mark Brown :
> On Wed, Jun 29, 2011 at 08:00:15PM +0200, Nicolas Ferre wrote:
>
> Don't mix multiple changes into a single patch! There's no perceptible
> code overlap between these so I don't understand why you've merged them,
> it just makes review harder and the changelog less descriptive.
Ok.
>> - preserve crystal oscillator across suspend/resume sequence:
>> enabled by default, it should be kept enabled on resume.
>
> This isn't what your code does...
>
>> snd_soc_write(codec, WM8731_ACTIVE, 0x0);
>> - snd_soc_write(codec, WM8731_PWR, 0xffff);
>> + /* standby: keep crystal oscillator enabled */
>> + snd_soc_write(codec, WM8731_PWR, 0x00df);
>
> This doesn't keep the crystal oscillator enabled, this forces it on in
> suspend (and without looking at the datasheet it also changes way more
> than the one register bit I'd expect to be changed). If the system
> isn't using the oscillator then that's not good.
>
> I'd expect to see a change to using snd_soc_update_bits() based on your
> description, or more likely something more involved.
First of all, I experienced issues while not having OSC enabled during suspend/resume cycle. Am I right supposing that, if using oscillator to clock the codec, I have to keep it running during a suspend/resume cycle?
Is something like this sounds like an acceptable option or we need something more sophisticated?
@@ -481,7 +481,10 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
break;
case SND_SOC_BIAS_OFF:
snd_soc_write(codec, WM8731_ACTIVE, 0x0);
- snd_soc_write(codec, WM8731_PWR, 0xffff);
+ reg = 0xdf;
+ if (wm8731->sysclk_type == WM8731_SYSCLK_XTAL)
+ reg |= 1 << 0x5;
+ snd_soc_update_bits(codec, WM8731_PWR, 0x00ff, reg);
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
wm8731->supplies);
break;
And, yes, there is only 8 bits dedicated to power down control in this register.
Best regards,
--
Nicolas Ferre
next prev parent reply other threads:[~2011-06-30 13:58 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-29 18:00 use dmaengine for atmel ssc/pcm dai drivers Nicolas Ferre
2011-06-29 18:00 ` [PATCH 1/5] ASoC: wm8731: rework power management Nicolas Ferre
2011-06-29 17:11 ` Mark Brown
2011-06-30 13:57 ` Nicolas Ferre [this message]
2011-06-30 15:04 ` [alsa-devel] " Nicolas Ferre
2011-06-30 15:22 ` Mark Brown
2011-07-01 9:31 ` Nicolas Ferre
2011-06-29 18:00 ` [PATCH 2/5] ASoC: atmel-ssc: add phybase in device structure Nicolas Ferre
2011-06-29 17:48 ` Mark Brown
2011-07-01 14:46 ` [PATCH V2 " Nicolas Ferre
2011-06-29 18:00 ` [PATCH 3/5] ASoC: atmel-ssc: dmaengine usage switch depending on cpu Nicolas Ferre
2011-06-29 18:00 ` [PATCH 4/5] ASoC: atmel_ssc_dai/atmel-pcm: adapt to dmaengine usage Nicolas Ferre
2011-06-29 17:59 ` Mark Brown
2011-06-30 0:54 ` Koul, Vinod
2011-06-29 18:00 ` [PATCH 5/5] ASoC: atmel_ssc_dai: PM: actually stopping clock on suspend/resume Nicolas Ferre
2011-07-01 10:43 ` [PATCH] ASoC: wm8731: set the ACTIVE bit if bias ON entered Nicolas Ferre
2011-07-01 14:18 ` Liam Girdwood
2011-07-01 16:15 ` Mark Brown
2011-07-04 9:46 ` Nicolas Ferre
2011-07-04 17:29 ` Mark Brown
2011-07-04 17:34 ` Liam Girdwood
2011-07-05 7:58 ` Nicolas Ferre
2011-07-05 20:27 ` [alsa-devel] " Mark Brown
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