From: "H. Peter Anvin" <hpa@linux.intel.com>
To: Christoph Lameter <cl@linux.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@elte.hu>,
linux-kernel@vger.kernel.org, Andi Kleen <ak@linux.intel.com>
Subject: Re: [x86] Fix prefetch instruction
Date: Fri, 05 Aug 2011 14:22:11 -0700 [thread overview]
Message-ID: <4E3C5F03.8090100@linux.intel.com> (raw)
In-Reply-To: <alpine.DEB.2.00.1108051608110.4821@router.home>
On 08/05/2011 02:10 PM, Christoph Lameter wrote:
>>
>> Have you done any performance analysis on this versus the null case? I
>> know there are some workloads where it helps, but if it hurts as many as
>> it helps...
>
> No I have not. prefetch IMHO means that the cacheline is fetched early so
> that the cacheline is fully available like any other to the code.
> prefetchnta does fetch the cacheline too but its not treated like the other cacheline but
> preferably thrown out again. Its a "streamfetch" designed for apps that
> scan over large amounts of memory and want to avoid cache pollution.
>
> This is surprising to the end user as far as I can tell.
>
Right. However, Linus has brought up the hypothesis that prefetch might
actually be a net loss on x86, because current x86 processors are
generally doing a good job with prefetching in hardware. Directed
prefetches can thus be a net minus.
-hpa
next prev parent reply other threads:[~2011-08-05 21:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-05 16:18 [x86] Fix prefetch instruction Christoph Lameter
2011-08-05 20:13 ` H. Peter Anvin
2011-08-05 21:10 ` Christoph Lameter
2011-08-05 21:22 ` H. Peter Anvin [this message]
2011-08-05 23:32 ` Christoph Lameter
2011-08-05 23:53 ` H. Peter Anvin
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