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From: Chen Gong <gong.chen@linux.intel.com>
To: "Luck, Tony" <tony.luck@intel.com>
Cc: linux-kernel@vger.kernel.org, Ingo Molnar <mingo@elte.hu>,
	Borislav Petkov <bp@amd64.org>,
	Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Subject: Re: [PATCH 2/5] mce: mask out undefined bits from MCi_ADDR
Date: Mon, 05 Sep 2011 17:19:23 +0800	[thread overview]
Message-ID: <4E64941B.2070708@linux.intel.com> (raw)
In-Reply-To: <4e5eb4e821049d6d79@agluck-desktop.sc.intel.com>

于 2011/9/1 6:25, Luck, Tony 写道:
> From: Tony Luck<tony.luck@intel.com>
>
> Move duplicate copies of the code that reads ADDR/MISC registers
> to a function. Add masking code for systems that have undefined
> low-order bits in the MCi_ADDR register.
>
> Based on original code by Andi Kleen
>
> Signed-off-by: Tony Luck<tony.luck@intel.com>
> ---
>
> Andi originally posted this as two patches - one to move the common
> code to the new function "mce_read_aux()", the second to add the
> masking.
> Seto-san objected to the masking on the grounds that the bits might
> contain something useful - but after some thought, I agree with Andi
> that it is better to drop undefined bits.
>
>   arch/x86/kernel/cpu/mcheck/mce.c |   31 +++++++++++++++++++++++--------
>   1 files changed, 23 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index 91bb983..1ce64c3 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -490,6 +490,27 @@ static void mce_report_event(struct pt_regs *regs)
>   	irq_work_queue(&__get_cpu_var(mce_irq_work));
>   }
>
> +/*
> + * Read ADDR and MISC registers.
> + */
> +static void mce_read_aux(struct mce *m, int i)
> +{
> +	if (m->status&  MCI_STATUS_MISCV)
> +		m->misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
> +	if (m->status&  MCI_STATUS_ADDRV) {
> +		m->addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
> +
> +		/*
> +		 * Mask the reported address by the reported granuality.
> +		 */
> +		if (mce_ser&&  (m->status&  MCI_STATUS_MISCV)) {
> +			u8 shift = m->misc&  0x1f;

According to SDM, here it should be "m->misc & 0x3f"


  reply	other threads:[~2011-09-05  9:19 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-31 22:21 [PATCH 0/5] Yet another pass at machine check recovery Luck, Tony
2011-08-31 22:25 ` [PATCH 1/5] x86, mce: rework use of TIF_MCE_NOTIFY Luck, Tony
2011-09-07  9:11   ` Borislav Petkov
2011-08-31 22:25 ` Luck, Tony
2011-09-09  2:23   ` huang ying
2011-08-31 22:25 ` [PATCH 2/5] mce: mask out undefined bits from MCi_ADDR Luck, Tony
2011-09-05  9:19   ` Chen Gong [this message]
2011-09-06 20:15     ` Luck, Tony
2011-08-31 22:25 ` Luck, Tony
2011-08-31 22:25 ` [PATCH 3/5] HWPOISON: Handle hwpoison in current process Luck, Tony
2011-09-07  5:47   ` Chen Gong
2011-08-31 22:26 ` Luck, Tony
2011-08-31 22:26 ` [PATCH 4/5] mce: remove TIF_MCE_NOTIFY Luck, Tony
2011-09-07  9:23   ` Borislav Petkov
2011-08-31 22:26 ` Luck, Tony
2011-08-31 22:26 ` [PATCH 5/5] mce: recover from "action required" errors reported in data path in usermode Luck, Tony
2011-09-07  6:05   ` Chen Gong
2011-09-07 13:25     ` Borislav Petkov
2011-09-07 13:50       ` Chen Gong
2011-09-08  3:05     ` Minskey Guo
2011-09-08  5:16       ` Luck, Tony
2011-09-08  9:25         ` Minskey Guo
2011-08-31 22:26 ` Luck, Tony
2011-08-31 22:41 ` [PATCH 0/5] Yet another pass at machine check recovery Valdis.Kletnieks
2011-08-31 22:54   ` Luck, Tony

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