Re: Problem with AMD chipsets. Was "Re: problems doing direct dma from a pci device to pci-e device"

[Mark Hounschell <dmarkh@cfl.rr.com>]

On 09/30/2011 04:46 AM, Clemens Ladisch wrote:
> Mark Hounschell wrote:
>> We have no problem with this same configuration using a MB with an
>> nvidia chipset. I suspect it might have something to do with the the MB
>> that usines the AMD chipset having an IOMMU, but I really don't know for
>> sure. I've also read something in the AMD chipset docs about some type
>> of restrictions on peer to peer transfers but again I really have no
>> idea if this is related to why I'm having this problem.
>
> According to the published RS780 docs, "P2P traffic could be only memory
> writes" (RPR 2.7).  In any case, check the P2P bits (MISC is described
> in BDG 2.4).
>
>

I wonder what they expect you to get out of "P2P traffic _could_ be only 
memory writes" Does that mean it _can_ be configured as "P2P traffic is 
enabled for only writes"? In any case I can do neither reads or writes.

As for the MISC bits described in the BDG, it appears that by default all 
the P2PDIS bits will be set to 0. Are there tools that would enable me to 
look at these bits and even change them if they are set. Would these bits 
normally be set/reset by the BIOS or the OS?

I previously asked about this problem on the AMD developers forum but got 
no response.

Thanks
Mark