* [PATCH] gpio: langwell: ensure alternate function is cleared
@ 2011-10-03 11:36 Adrian Hunter
2011-10-04 18:37 ` Grant Likely
2011-10-06 10:15 ` Grant Likely
0 siblings, 2 replies; 7+ messages in thread
From: Adrian Hunter @ 2011-10-03 11:36 UTC (permalink / raw)
To: grant.likely; +Cc: linux-kernel, Adrian Hunter, Alan Cox
Alternate function must be zero for the pin to act as
a GPIO.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
drivers/gpio/gpio-langwell.c | 27 +++++++++++++++++++++++++++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index d2eb57c..00692e8 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -59,6 +59,7 @@ enum GPIO_REG {
GRER, /* rising edge detect */
GFER, /* falling edge detect */
GEDR, /* edge detect result */
+ GAFR, /* alt function */
};
struct lnw_gpio {
@@ -81,6 +82,31 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
return ptr;
}
+static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset,
+ enum GPIO_REG reg_type)
+{
+ struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
+ unsigned nreg = chip->ngpio / 32;
+ u8 reg = offset / 16;
+ void __iomem *ptr;
+
+ ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4);
+ return ptr;
+}
+
+static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+ void __iomem *gafr = gpio_reg_2bit(chip, offset, GAFR);
+ u32 value = readl(gafr);
+ int shift = (offset % 16) << 1, af = (value >> shift) & 3;
+
+ if (af) {
+ value &= ~(3 << shift);
+ writel(value, gafr);
+ }
+ return 0;
+}
+
static int lnw_gpio_get(struct gpio_chip *chip, unsigned offset)
{
void __iomem *gplr = gpio_reg(chip, offset, GPLR);
@@ -321,6 +347,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
lnw->reg_base = base;
lnw->irq_base = irq_base;
lnw->chip.label = dev_name(&pdev->dev);
+ lnw->chip.request = lnw_gpio_request;
lnw->chip.direction_input = lnw_gpio_direction_input;
lnw->chip.direction_output = lnw_gpio_direction_output;
lnw->chip.get = lnw_gpio_get;
--
1.7.6
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] gpio: langwell: ensure alternate function is cleared
2011-10-03 11:36 [PATCH] gpio: langwell: ensure alternate function is cleared Adrian Hunter
@ 2011-10-04 18:37 ` Grant Likely
2011-10-05 7:52 ` Adrian Hunter
2011-10-06 10:15 ` Grant Likely
1 sibling, 1 reply; 7+ messages in thread
From: Grant Likely @ 2011-10-04 18:37 UTC (permalink / raw)
To: Adrian Hunter; +Cc: linux-kernel, Alan Cox
On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
> Alternate function must be zero for the pin to act as
> a GPIO.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> Signed-off-by: Alan Cox <alan@linux.intel.com>
> ---
> drivers/gpio/gpio-langwell.c | 27 +++++++++++++++++++++++++++
> 1 files changed, 27 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> index d2eb57c..00692e8 100644
> --- a/drivers/gpio/gpio-langwell.c
> +++ b/drivers/gpio/gpio-langwell.c
> @@ -59,6 +59,7 @@ enum GPIO_REG {
> GRER, /* rising edge detect */
> GFER, /* falling edge detect */
> GEDR, /* edge detect result */
> + GAFR, /* alt function */
> };
>
> struct lnw_gpio {
> @@ -81,6 +82,31 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
> return ptr;
> }
>
> +static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset,
> + enum GPIO_REG reg_type)
> +{
> + struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
> + unsigned nreg = chip->ngpio / 32;
> + u8 reg = offset / 16;
> + void __iomem *ptr;
> +
> + ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4);
This looks wrong. It looks to me like the __iomem annotation should
be added to ->reg_base.
Otherwise, the patch looks okay.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] gpio: langwell: ensure alternate function is cleared
2011-10-04 18:37 ` Grant Likely
@ 2011-10-05 7:52 ` Adrian Hunter
2011-10-05 16:58 ` Grant Likely
0 siblings, 1 reply; 7+ messages in thread
From: Adrian Hunter @ 2011-10-05 7:52 UTC (permalink / raw)
To: Grant Likely; +Cc: linux-kernel, Alan Cox
On 04/10/11 21:37, Grant Likely wrote:
> On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
>> Alternate function must be zero for the pin to act as
>> a GPIO.
>>
>> Signed-off-by: Adrian Hunter<adrian.hunter@intel.com>
>> Signed-off-by: Alan Cox<alan@linux.intel.com>
>> ---
>> drivers/gpio/gpio-langwell.c | 27 +++++++++++++++++++++++++++
>> 1 files changed, 27 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
>> index d2eb57c..00692e8 100644
>> --- a/drivers/gpio/gpio-langwell.c
>> +++ b/drivers/gpio/gpio-langwell.c
>> @@ -59,6 +59,7 @@ enum GPIO_REG {
>> GRER, /* rising edge detect */
>> GFER, /* falling edge detect */
>> GEDR, /* edge detect result */
>> + GAFR, /* alt function */
>> };
>>
>> struct lnw_gpio {
>> @@ -81,6 +82,31 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
>> return ptr;
>> }
>>
>> +static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset,
>> + enum GPIO_REG reg_type)
>> +{
>> + struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
>> + unsigned nreg = chip->ngpio / 32;
>> + u8 reg = offset / 16;
>> + void __iomem *ptr;
>> +
>> + ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4);
>
> This looks wrong. It looks to me like the __iomem annotation should
> be added to ->reg_base.
>
> Otherwise, the patch looks okay.
>
Deserves a separate patch...
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Wed, 5 Oct 2011 10:29:27 +0300
Subject: [PATCH] gpio: langwell: declare reg_base as __iomem
reg_base is __iomem so add that to the declaration
and fix up assignment casts and types.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
---
drivers/gpio/gpio-langwell.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index 00692e8..b7465e5 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -64,7 +64,7 @@ enum GPIO_REG {
struct lnw_gpio {
struct gpio_chip chip;
- void *reg_base;
+ void __iomem *reg_base;
spinlock_t lock;
unsigned irq_base;
struct pci_dev *pdev;
@@ -78,7 +78,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip,
unsigned offset,
u8 reg = offset / 32;
void __iomem *ptr;
- ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4);
+ ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
return ptr;
}
@@ -90,7 +90,7 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip
*chip, unsigned offset,
u8 reg = offset / 16;
void __iomem *ptr;
- ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4);
+ ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
return ptr;
}
@@ -299,7 +299,7 @@ static const struct dev_pm_ops lnw_gpio_pm_ops = {
static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
- void *base;
+ void __iomem *base;
int i;
resource_size_t start, len;
struct lnw_gpio *lnw;
@@ -324,8 +324,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev
*pdev,
dev_err(&pdev->dev, "error mapping bar1\n");
goto err3;
}
- irq_base = *(u32 *)base;
- gpio_base = *((u32 *)base + 1);
+ irq_base = *(__force u32 *)base;
+ gpio_base = *((__force u32 *)base + 1);
/* release the IO mapping, since we already get the info from bar1 */
iounmap(base);
/* get the register base from bar0 */
--
1.7.6
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] gpio: langwell: ensure alternate function is cleared
2011-10-05 7:52 ` Adrian Hunter
@ 2011-10-05 16:58 ` Grant Likely
2011-10-06 6:37 ` Adrian Hunter
0 siblings, 1 reply; 7+ messages in thread
From: Grant Likely @ 2011-10-05 16:58 UTC (permalink / raw)
To: Adrian Hunter; +Cc: linux-kernel, Alan Cox
On Wed, Oct 5, 2011 at 1:52 AM, Adrian Hunter <adrian.hunter@intel.com> wrote:
> On 04/10/11 21:37, Grant Likely wrote:
>>
>> On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
>>> + ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg
>>> * 4);
>>
>> This looks wrong. It looks to me like the __iomem annotation should
>> be added to ->reg_base.
>>
>> Otherwise, the patch looks okay.
>>
>
> Deserves a separate patch...
What order do they get applied in? </grant-being-lazy>
>
> From: Adrian Hunter <adrian.hunter@intel.com>
> Date: Wed, 5 Oct 2011 10:29:27 +0300
> Subject: [PATCH] gpio: langwell: declare reg_base as __iomem
>
> reg_base is __iomem so add that to the declaration
> and fix up assignment casts and types.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> drivers/gpio/gpio-langwell.c | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> index 00692e8..b7465e5 100644
> --- a/drivers/gpio/gpio-langwell.c
> +++ b/drivers/gpio/gpio-langwell.c
> @@ -64,7 +64,7 @@ enum GPIO_REG {
>
> struct lnw_gpio {
> struct gpio_chip chip;
> - void *reg_base;
> + void __iomem *reg_base;
> spinlock_t lock;
> unsigned irq_base;
> struct pci_dev *pdev;
> @@ -78,7 +78,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip,
> unsigned offset,
> u8 reg = offset / 32;
> void __iomem *ptr;
>
> - ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
> 4);
> + ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
> return ptr;
> }
>
> @@ -90,7 +90,7 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip *chip,
> unsigned offset,
> u8 reg = offset / 16;
> void __iomem *ptr;
>
> - ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
> 4);
> + ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
> return ptr;
> }
>
> @@ -299,7 +299,7 @@ static const struct dev_pm_ops lnw_gpio_pm_ops = {
> static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
> const struct pci_device_id *id)
> {
> - void *base;
> + void __iomem *base;
> int i;
> resource_size_t start, len;
> struct lnw_gpio *lnw;
> @@ -324,8 +324,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev
> *pdev,
> dev_err(&pdev->dev, "error mapping bar1\n");
> goto err3;
> }
> - irq_base = *(u32 *)base;
> - gpio_base = *((u32 *)base + 1);
> + irq_base = *(__force u32 *)base;
> + gpio_base = *((__force u32 *)base + 1);
> /* release the IO mapping, since we already get the info from bar1 */
> iounmap(base);
> /* get the register base from bar0 */
> --
> 1.7.6
>
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] gpio: langwell: ensure alternate function is cleared
2011-10-05 16:58 ` Grant Likely
@ 2011-10-06 6:37 ` Adrian Hunter
2011-10-06 10:19 ` Grant Likely
0 siblings, 1 reply; 7+ messages in thread
From: Adrian Hunter @ 2011-10-06 6:37 UTC (permalink / raw)
To: Grant Likely; +Cc: linux-kernel, Alan Cox
On 05/10/11 19:58, Grant Likely wrote:
> On Wed, Oct 5, 2011 at 1:52 AM, Adrian Hunter<adrian.hunter@intel.com> wrote:
>> On 04/10/11 21:37, Grant Likely wrote:
>>>
>>> On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
>>>> + ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg
>>>> * 4);
>>>
>>> This looks wrong. It looks to me like the __iomem annotation should
>>> be added to ->reg_base.
>>>
>>> Otherwise, the patch looks okay.
>>>
>>
>> Deserves a separate patch...
>
> What order do they get applied in?</grant-being-lazy>
First one first ;-)
i.e.
gpio: langwell: ensure alternate function is cleared
gpio: langwell: declare reg_base as __iomem
Since the absence of __iomem was present before the original
patch, there is no advantage to having the second one first,
but the original patch would need to be changed as well.
>
>>
>> From: Adrian Hunter<adrian.hunter@intel.com>
>> Date: Wed, 5 Oct 2011 10:29:27 +0300
>> Subject: [PATCH] gpio: langwell: declare reg_base as __iomem
>>
>> reg_base is __iomem so add that to the declaration
>> and fix up assignment casts and types.
>>
>> Signed-off-by: Adrian Hunter<adrian.hunter@intel.com>
>> ---
>> drivers/gpio/gpio-langwell.c | 12 ++++++------
>> 1 files changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
>> index 00692e8..b7465e5 100644
>> --- a/drivers/gpio/gpio-langwell.c
>> +++ b/drivers/gpio/gpio-langwell.c
>> @@ -64,7 +64,7 @@ enum GPIO_REG {
>>
>> struct lnw_gpio {
>> struct gpio_chip chip;
>> - void *reg_base;
>> + void __iomem *reg_base;
>> spinlock_t lock;
>> unsigned irq_base;
>> struct pci_dev *pdev;
>> @@ -78,7 +78,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip,
>> unsigned offset,
>> u8 reg = offset / 32;
>> void __iomem *ptr;
>>
>> - ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
>> 4);
>> + ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
>> return ptr;
>> }
>>
>> @@ -90,7 +90,7 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip *chip,
>> unsigned offset,
>> u8 reg = offset / 16;
>> void __iomem *ptr;
>>
>> - ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
>> 4);
>> + ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
>> return ptr;
>> }
>>
>> @@ -299,7 +299,7 @@ static const struct dev_pm_ops lnw_gpio_pm_ops = {
>> static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
>> const struct pci_device_id *id)
>> {
>> - void *base;
>> + void __iomem *base;
>> int i;
>> resource_size_t start, len;
>> struct lnw_gpio *lnw;
>> @@ -324,8 +324,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev
>> *pdev,
>> dev_err(&pdev->dev, "error mapping bar1\n");
>> goto err3;
>> }
>> - irq_base = *(u32 *)base;
>> - gpio_base = *((u32 *)base + 1);
>> + irq_base = *(__force u32 *)base;
>> + gpio_base = *((__force u32 *)base + 1);
>> /* release the IO mapping, since we already get the info from bar1 */
>> iounmap(base);
>> /* get the register base from bar0 */
>> --
>> 1.7.6
>>
>>
>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] gpio: langwell: ensure alternate function is cleared
2011-10-03 11:36 [PATCH] gpio: langwell: ensure alternate function is cleared Adrian Hunter
2011-10-04 18:37 ` Grant Likely
@ 2011-10-06 10:15 ` Grant Likely
1 sibling, 0 replies; 7+ messages in thread
From: Grant Likely @ 2011-10-06 10:15 UTC (permalink / raw)
To: Adrian Hunter; +Cc: linux-kernel, Alan Cox
On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
> Alternate function must be zero for the pin to act as
> a GPIO.
>
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> Signed-off-by: Alan Cox <alan@linux.intel.com>
Applied, thanks.
g.
> ---
> drivers/gpio/gpio-langwell.c | 27 +++++++++++++++++++++++++++
> 1 files changed, 27 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> index d2eb57c..00692e8 100644
> --- a/drivers/gpio/gpio-langwell.c
> +++ b/drivers/gpio/gpio-langwell.c
> @@ -59,6 +59,7 @@ enum GPIO_REG {
> GRER, /* rising edge detect */
> GFER, /* falling edge detect */
> GEDR, /* edge detect result */
> + GAFR, /* alt function */
> };
>
> struct lnw_gpio {
> @@ -81,6 +82,31 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
> return ptr;
> }
>
> +static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset,
> + enum GPIO_REG reg_type)
> +{
> + struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip);
> + unsigned nreg = chip->ngpio / 32;
> + u8 reg = offset / 16;
> + void __iomem *ptr;
> +
> + ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4);
> + return ptr;
> +}
> +
> +static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset)
> +{
> + void __iomem *gafr = gpio_reg_2bit(chip, offset, GAFR);
> + u32 value = readl(gafr);
> + int shift = (offset % 16) << 1, af = (value >> shift) & 3;
> +
> + if (af) {
> + value &= ~(3 << shift);
> + writel(value, gafr);
> + }
> + return 0;
> +}
> +
> static int lnw_gpio_get(struct gpio_chip *chip, unsigned offset)
> {
> void __iomem *gplr = gpio_reg(chip, offset, GPLR);
> @@ -321,6 +347,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
> lnw->reg_base = base;
> lnw->irq_base = irq_base;
> lnw->chip.label = dev_name(&pdev->dev);
> + lnw->chip.request = lnw_gpio_request;
> lnw->chip.direction_input = lnw_gpio_direction_input;
> lnw->chip.direction_output = lnw_gpio_direction_output;
> lnw->chip.get = lnw_gpio_get;
> --
> 1.7.6
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] gpio: langwell: ensure alternate function is cleared
2011-10-06 6:37 ` Adrian Hunter
@ 2011-10-06 10:19 ` Grant Likely
0 siblings, 0 replies; 7+ messages in thread
From: Grant Likely @ 2011-10-06 10:19 UTC (permalink / raw)
To: Adrian Hunter; +Cc: linux-kernel, Alan Cox
On Thu, Oct 06, 2011 at 09:37:21AM +0300, Adrian Hunter wrote:
> On 05/10/11 19:58, Grant Likely wrote:
> >On Wed, Oct 5, 2011 at 1:52 AM, Adrian Hunter<adrian.hunter@intel.com> wrote:
> >>On 04/10/11 21:37, Grant Likely wrote:
> >>>
> >>>On Mon, Oct 03, 2011 at 02:36:07PM +0300, Adrian Hunter wrote:
> >>>>+ ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg
> >>>>* 4);
> >>>
> >>>This looks wrong. It looks to me like the __iomem annotation should
> >>>be added to ->reg_base.
> >>>
> >>>Otherwise, the patch looks okay.
> >>>
> >>
> >>Deserves a separate patch...
> >
> >What order do they get applied in?</grant-being-lazy>
>
> First one first ;-)
Please repost the 2nd patch properly. The way it was copied in caused
whitespace corruption and forces me to manually apply the patch. It
adds a lot of extra work if I cannot use "git am" to apply from my
inbox.
Thanks,
g.
>
> i.e.
>
> gpio: langwell: ensure alternate function is cleared
> gpio: langwell: declare reg_base as __iomem
>
> Since the absence of __iomem was present before the original
> patch, there is no advantage to having the second one first,
> but the original patch would need to be changed as well.
>
> >
> >>
> >>From: Adrian Hunter<adrian.hunter@intel.com>
> >>Date: Wed, 5 Oct 2011 10:29:27 +0300
> >>Subject: [PATCH] gpio: langwell: declare reg_base as __iomem
> >>
> >>reg_base is __iomem so add that to the declaration
> >>and fix up assignment casts and types.
> >>
> >>Signed-off-by: Adrian Hunter<adrian.hunter@intel.com>
> >>---
> >> drivers/gpio/gpio-langwell.c | 12 ++++++------
> >> 1 files changed, 6 insertions(+), 6 deletions(-)
> >>
> >>diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
> >>index 00692e8..b7465e5 100644
> >>--- a/drivers/gpio/gpio-langwell.c
> >>+++ b/drivers/gpio/gpio-langwell.c
> >>@@ -64,7 +64,7 @@ enum GPIO_REG {
> >>
> >> struct lnw_gpio {
> >> struct gpio_chip chip;
> >>- void *reg_base;
> >>+ void __iomem *reg_base;
> >> spinlock_t lock;
> >> unsigned irq_base;
> >> struct pci_dev *pdev;
> >>@@ -78,7 +78,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip,
> >>unsigned offset,
> >> u8 reg = offset / 32;
> >> void __iomem *ptr;
> >>
> >>- ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
> >>4);
> >>+ ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
> >> return ptr;
> >> }
> >>
> >>@@ -90,7 +90,7 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip *chip,
> >>unsigned offset,
> >> u8 reg = offset / 16;
> >> void __iomem *ptr;
> >>
> >>- ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg *
> >>4);
> >>+ ptr = lnw->reg_base + reg_type * nreg * 4 + reg * 4;
> >> return ptr;
> >> }
> >>
> >>@@ -299,7 +299,7 @@ static const struct dev_pm_ops lnw_gpio_pm_ops = {
> >> static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
> >> const struct pci_device_id *id)
> >> {
> >>- void *base;
> >>+ void __iomem *base;
> >> int i;
> >> resource_size_t start, len;
> >> struct lnw_gpio *lnw;
> >>@@ -324,8 +324,8 @@ static int __devinit lnw_gpio_probe(struct pci_dev
> >>*pdev,
> >> dev_err(&pdev->dev, "error mapping bar1\n");
> >> goto err3;
> >> }
> >>- irq_base = *(u32 *)base;
> >>- gpio_base = *((u32 *)base + 1);
> >>+ irq_base = *(__force u32 *)base;
> >>+ gpio_base = *((__force u32 *)base + 1);
> >> /* release the IO mapping, since we already get the info from bar1 */
> >> iounmap(base);
> >> /* get the register base from bar0 */
> >>--
> >>1.7.6
> >>
> >>
> >
> >
> >
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2011-10-06 10:19 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-10-03 11:36 [PATCH] gpio: langwell: ensure alternate function is cleared Adrian Hunter
2011-10-04 18:37 ` Grant Likely
2011-10-05 7:52 ` Adrian Hunter
2011-10-05 16:58 ` Grant Likely
2011-10-06 6:37 ` Adrian Hunter
2011-10-06 10:19 ` Grant Likely
2011-10-06 10:15 ` Grant Likely
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox