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Message-ID: <4EC5BE16.9080205@freescale.com>
Date: Fri, 18 Nov 2011 10:08:22 +0800
From: LiuShuo <b35362@freescale.com>
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CC: <dwmw2@infradead.org>, <Artem.Bityutskiy@nokia.com>,
        <linux-mtd@lists.infradead.org>, <linuxppc-dev@lists.ozlabs.org>,
        <akpm@linux-foundation.org>, <linux-kernel@vger.kernel.org>,
        <leoli@freescale.com>, <scottwood@freescale.com>,
        Jerry Huang <Chang-Ming.Huang@freescale.com>,
        Tang Yuantian <b29983@freescale.com>
Subject: Re: [PATCH 2/3] mtd/nand : set Nand flash page address to FBAR and
 FPAR correctly
References: <1321349355-1639-1-git-send-email-b35362@freescale.com>	 <1321349355-1639-2-git-send-email-b35362@freescale.com> <1321568016.2272.29.camel@koala>
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Ok and I want to add another patch before 3/3.

-LiuShuo
> On Tue, 2011-11-15 at 17:29 +0800, b35362@freescale.com wrote:
>> From: Liu Shuo<b35362@freescale.com>
>>
>> If we use the Nand flash chip whose number of pages in a block is greater
>> than 64(for large page), we must treat the low bit of FBAR as being the
>> high bit of the page address due to the limitation of FCM, it simply uses
>> the low 6-bits (for large page) of the combined block/page address as the
>> FPAR component, rather than considering the actual block size.
> Looks like this patch depends on the previous white-space clean-up patch
> - could you please refactor it (and 3/3 too) and resend?
Ok and I am going to add another new patch before 3/3.

-LiuShuo
> Artem.
>
>