From: "H. Peter Anvin" <hpa@zytor.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: mingo@elte.hu, "eric.dumazet@gmail.com" <eric.dumazet@gmail.com>,
tglx@linutronix.de, luca@luca-barbieri.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] ix86: atomic64 assembly improvements
Date: Thu, 19 Jan 2012 06:44:37 -0800 [thread overview]
Message-ID: <4F182C55.7040305@zytor.com> (raw)
In-Reply-To: <4F17EDE9020000780006D97A@nat28.tlf.novell.com>
On 01/19/2012 01:18 AM, Jan Beulich wrote:
>
> But the code is supposed to be correct even when caches are disabled
> (in which case LOCK# will continue to be used even on modern CPUs),
> and this case clearly isn't covered by the current implementation. It
> may be a good idea to adjust the patch description accordingly, but I
> see no reason to change the patch itself.
>
It doesn't have anything to do with caches on or off.
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
next prev parent reply other threads:[~2012-01-19 14:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-18 14:24 [PATCH 2/2] ix86: atomic64 assembly improvements Jan Beulich
2012-01-18 16:36 ` H. Peter Anvin
2012-01-18 16:50 ` Jan Beulich
2012-01-18 17:47 ` H. Peter Anvin
2012-01-19 9:18 ` Jan Beulich
2012-01-19 14:44 ` H. Peter Anvin [this message]
2012-01-19 14:50 ` Jan Beulich
2012-01-19 14:55 ` H. Peter Anvin
2012-01-19 14:59 ` H. Peter Anvin
2012-01-19 15:11 ` Jan Beulich
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