From: "H. Peter Anvin" <hpa@linux.intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Maarten Lankhorst <m.b.lankhorst@gmail.com>,
x86@kernel.org, LKML <linux-kernel@vger.kernel.org>,
Stephane Eranian <eranian@google.com>
Subject: Re: perf, x86: Disable PEBS on SandyBridge chips
Date: Fri, 17 Feb 2012 13:40:01 -0800 [thread overview]
Message-ID: <4F3EC931.2080106@linux.intel.com> (raw)
In-Reply-To: <1329491549.2293.275.camel@twins>
On 02/17/2012 07:12 AM, Peter Zijlstra wrote:
> On Fri, 2012-02-17 at 13:39 +0100, Maarten Lankhorst wrote:
>> Hey Peter,
>>
>> Why is PEBS disabled? If I look at the intel_clovertown_quirks I can see
>> why it's disabled for that cpu, but the sandy bridge one lacks any kind
>> of clarification or information on why, or how I can learn more.
>
> hpa, could you get the official Intel answer on this?
*Where* is PEBS disabled?
-hpa
next prev parent reply other threads:[~2012-02-17 21:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-17 12:39 perf, x86: Disable PEBS on SandyBridge chips Maarten Lankhorst
2012-02-17 15:12 ` Peter Zijlstra
2012-02-17 21:40 ` H. Peter Anvin [this message]
2012-02-17 22:08 ` David Ahern
2012-02-17 22:12 ` H. Peter Anvin
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