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* [PATCH] tile_edac: Fix the memory controller ID
@ 2012-03-12 14:01 Mauro Carvalho Chehab
  2012-03-14 19:11 ` Chris Metcalf
  0 siblings, 1 reply; 3+ messages in thread
From: Mauro Carvalho Chehab @ 2012-03-12 14:01 UTC (permalink / raw)
  Cc: Mauro Carvalho Chehab, Linux Edac Mailing List,
	Linux Kernel Mailing List

Fix a regression introduced by changeset 7b03829a8ba4:

-       mci = edac_mc_alloc(sizeof(struct tile_edac_priv),
-               TILE_EDAC_NR_CSROWS, TILE_EDAC_NR_CHANS, pdev->id);
+       mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false,
+                           sizeof(struct tile_edac_priv));

The pdev->id is missing.

Compile-tested only. Btw, in order to compile it, I had to:

1) comment a header at arch/tile/include/asm/linkage.h:

	-#include <feedback.h>
	+//#include <feedback.h>

2) Use the ./arch/tile/configs/tilegx_defconfig . the tilepro_defconfig
   is broken;

3) manually enable the EDAC module on it.

Somebody has to fix it ;)

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
---
 drivers/edac/tile_edac.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c
index 9a91826..3e878bf 100644
--- a/drivers/edac/tile_edac.c
+++ b/drivers/edac/tile_edac.c
@@ -141,7 +141,7 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev)
 	layers[1].type = EDAC_MC_LAYER_CHANNEL;
 	layers[1].size = TILE_EDAC_NR_CHANS;
 	layers[1].is_csrow = false;
-	mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false,
+	mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers, false,
 			    sizeof(struct tile_edac_priv));
 	if (mci == NULL)
 		return -ENOMEM;
-- 
1.7.8


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] tile_edac: Fix the memory controller ID
  2012-03-12 14:01 [PATCH] tile_edac: Fix the memory controller ID Mauro Carvalho Chehab
@ 2012-03-14 19:11 ` Chris Metcalf
  2012-03-14 22:32   ` Mauro Carvalho Chehab
  0 siblings, 1 reply; 3+ messages in thread
From: Chris Metcalf @ 2012-03-14 19:11 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: Linux Edac Mailing List, Linux Kernel Mailing List

On 3/12/2012 10:02 AM, Mauro Carvalho Chehab wrote:
> Fix a regression introduced by changeset 7b03829a8ba4:
>
> -       mci = edac_mc_alloc(sizeof(struct tile_edac_priv),
> -               TILE_EDAC_NR_CSROWS, TILE_EDAC_NR_CHANS, pdev->id);
> +       mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false,
> +                           sizeof(struct tile_edac_priv));
>
> The pdev->id is missing.
>
> Compile-tested only. Btw, in order to compile it, I had to:
>
> 1) comment a header at arch/tile/include/asm/linkage.h:
>
> 	-#include <feedback.h>
> 	+//#include <feedback.h>
>
> 2) Use the ./arch/tile/configs/tilegx_defconfig . the tilepro_defconfig
>    is broken;
>
> 3) manually enable the EDAC module on it.
>
> Somebody has to fix it ;)
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

You might amend the commit message based on our conversation, but otherwise:

Acked-by: Chris Metcalf <cmetcalf@tilera.com>

Thanks for fixing up the tile EDAC driver, BTW :-)

-- 
Chris Metcalf, Tilera Corp.
http://www.tilera.com


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] tile_edac: Fix the memory controller ID
  2012-03-14 19:11 ` Chris Metcalf
@ 2012-03-14 22:32   ` Mauro Carvalho Chehab
  0 siblings, 0 replies; 3+ messages in thread
From: Mauro Carvalho Chehab @ 2012-03-14 22:32 UTC (permalink / raw)
  To: Chris Metcalf; +Cc: Linux Edac Mailing List, Linux Kernel Mailing List

Em 14-03-2012 16:11, Chris Metcalf escreveu:
> On 3/12/2012 10:02 AM, Mauro Carvalho Chehab wrote:
>> Fix a regression introduced by changeset 7b03829a8ba4:
>>
>> -       mci = edac_mc_alloc(sizeof(struct tile_edac_priv),
>> -               TILE_EDAC_NR_CSROWS, TILE_EDAC_NR_CHANS, pdev->id);
>> +       mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, false,
>> +                           sizeof(struct tile_edac_priv));
>>
>> The pdev->id is missing.
>>
>> Compile-tested only. Btw, in order to compile it, I had to:
>>
>> 1) comment a header at arch/tile/include/asm/linkage.h:
>>
>> 	-#include <feedback.h>
>> 	+//#include <feedback.h>
>>
>> 2) Use the ./arch/tile/configs/tilegx_defconfig . the tilepro_defconfig
>>    is broken;
>>
>> 3) manually enable the EDAC module on it.
>>
>> Somebody has to fix it ;)
>>
>> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
> 
> You might amend the commit message based on our conversation, but otherwise:
> 
> Acked-by: Chris Metcalf <cmetcalf@tilera.com>
> 
> Thanks for fixing up the tile EDAC driver, BTW :-)

Thanks for the ack!

Btw, I've introduced the bug, on this changeset:
	http://git.kernel.org/?p=linux/kernel/git/mchehab/linux-edac.git;a=commit;h=3b6909be050f03366322b0d5b45d38eedee77574

So, it is my moral duty to fix it ;)

Btw, I'd appreciate if you could test the EDAC driver on tile after that
series. It makes the edac core more flexible to represent the location of
the broken memory on the way the memory controller works, in order to
put its fingers at the Field Repleaceable Unit (FRU) - like a DIMM stick.
It should be easy (and it probably makes sense on embedded hardware) to
add there a way to report each DRAM memory is broken.

The entire series is at:
	git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac.git hw_events_v7

Thank you!
Mauro

Thanks,
Mauro
> 


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2012-03-14 22:32 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2012-03-12 14:01 [PATCH] tile_edac: Fix the memory controller ID Mauro Carvalho Chehab
2012-03-14 19:11 ` Chris Metcalf
2012-03-14 22:32   ` Mauro Carvalho Chehab

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