From: Yilu Mao <ylmao@marvell.com>
To: Lu Mao <ylmao@marvell.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"Baohua.Song@csr.com" <Baohua.Song@csr.com>,
"santosh.shilimkar@ti.com" <santosh.shilimkar@ti.com>,
"robherring2@gmail.com" <robherring2@gmail.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Ning Jiang <njiang1@marvell.com>
Subject: Re: [PATCH] ARM: cache-l2x0.c: save aux ctrl for resume in case that l2x0 is enabled before init
Date: Sat, 28 Apr 2012 14:24:28 +0800 [thread overview]
Message-ID: <4F9B8D1C.6090400@marvell.com> (raw)
In-Reply-To: <4F992B80.6040207@marvell.com>
On 04/26/2012 07:03 PM, Lu Mao wrote:
> On 04/26/2012 06:56 PM, Catalin Marinas wrote:
>> On Thu, Apr 26, 2012 at 11:48:18AM +0100, Yilu Mao wrote:
>>> On 04/26/2012 06:38 PM, Catalin Marinas wrote:
>>>> On Thu, Apr 26, 2012 at 11:35:39AM +0100, Yilu Mao wrote:
>>>>> On 04/26/2012 06:28 PM, Catalin Marinas wrote:
>>>>>> On Thu, Apr 26, 2012 at 11:09:26AM +0100, Yilu Mao wrote:
>>>>>>> On 04/26/2012 05:44 PM, Catalin Marinas wrote:
>>>>>>>> On Thu, Apr 26, 2012 at 10:25:31AM +0100, Yilu Mao wrote:
>>>>>>>>> On 04/26/2012 04:35 PM, Catalin Marinas wrote:
>>>>>>>>>> On Thu, Apr 26, 2012 at 06:00:09AM +0100, Yilu Mao wrote:
>>>>>>>>>>> On 04/24/2012 04:28 PM, Catalin Marinas wrote:
>>>>>>>>>>>> On Tue, Apr 24, 2012 at 03:41:20AM +0100, Yilu Mao wrote:
>>>>>>>>>>>>> + l2x0_saved_regs.aux_ctrl = aux;
>>>>>>>>>>>>> +
>>>>>>>>>>>>> aux&= aux_mask;
>>>>>>>>>>>>> aux |= aux_val;
>>>>>>>>>>>>
>>>>>>>>>>>> I think that's the wrong place to save it, it should be after the
>>>>>>>>>>>> masking was done.
>>>>>>>>>>>>
>>>>>>>>>>>> Anyway, if we cannot write this register in l2x0_init() because the L2
>>>>>>>>>>>> was enabled, do we expect the L2 to be disabled during resume?
>>>>>>>>>>>>
>>>>>>>>>>> Sorry, I don't think so.
>>>>>>>>>>> This is the right place to save it because we must make sure the saved
>>>>>>>>>>> aux_ctrl is the same as what it is set.
>>>>>>>>>>> If we save it after masking was done, the saved value will be different
>>>>>>>>>>> because we can't actually change the real setting.
>>>>>>>>>>
>>>>>>>>>> And since we can't actually change the real setting on the resume path,
>>>>>>>>>> why do we need to save it anyway. Is your L2 cache disabled on the
>>>>>>>>>> resume path but not on the cold boot one?
>>>>>>>>>
>>>>>>>>> We can't change L2 aux ctrl setting when do init because it has been
>>>>>>>>> enabled.
>>>>>>>>
>>>>>>>> This is normally for the case where the kernel running in non-secure
>>>>>>>> mode is not allowed to write the L2 aux ctrl register. Does this
>>>>>>>> permission change with core idle?
>>>>>>>>
>>>>>>> Yes, your understanding of previous mail is right. The L2 is enabled on
>>>>>>> code boot and it is disabled on the resume in our case.
>>>>>>
>>>>>> But the kernel either runs in secure mode or the non-secure access to
>>>>>> this register is allowed.
>>>>>>
>>>>>>> So if we don't have such patch, when core idle exit, L2 cache aux ctrl
>>>>>>> register will be set to 0x0 because l2x0_saved_regs.aux_ctrl is not
>>>>>>> initialized.
>>>>>>
>>>>>> You could still make sure that the mask passed doesn't affect the
>>>>>> original setting and save it after masking.
>>>>>>
>>>>> Do you mean the code is like this:
>>>>> aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
>>>>> aux&= aux_mask;
>>>>> l2x0_saved_regs.aux_ctrl = aux;
>>>>>
>>>>> Then the saved value is not the same as real setting. So the restored
>>>>> value after core idle will not the same as before... This is not what we
>>>>> expected.
>>>>
>>>> My point was that on your platform you pass an aux_mask that is meant to
>>>> change the already set aux_ctlr value. Why do you pass such mask to be
>>>> anything other than ~0UL in this case?
>>>>
>>> Sorry I still can't catch your point...
>>> In our platform, we actually use ~0UL as aux mask.
>>>
>>> Anyway, the two arguments, aux_value and aux_mask, are both for changing
>>> the original value set before kernel bootup. If L2 cache is enabled in
>>> cold boot, both two arguments are useless because we can't set the
>>> register. So we must make sure we can restore the original value after
>>> core idle.
>>
>> So if your platform passes aux_mask = ~0UL and aux_val = 0, there is no
>> change to the read aux_ctlr value.
>>
>> If for whatever reason (same binary running in different configuration)
>> you need to pass the aux_mask and aux_val different from the above, then
>> your argument makes sense. But I just want to be clear.
>>
> Actually, our arguments are aux_value = 0x30000000 and aux_mask = ~0UL.
> I think it is also ok with my patch.
> What do you think?
>
Hi Catalin,
Do you agree with this patch to be merged?
--
Thanks.
Best Wishes,
Yilu Mao
next prev parent reply other threads:[~2012-04-28 6:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-24 2:41 [PATCH] ARM: cache-l2x0.c: save aux ctrl for resume in case that l2x0 is enabled before init Yilu Mao
2012-04-24 8:28 ` Catalin Marinas
2012-04-26 5:00 ` Yilu Mao
2012-04-26 8:35 ` Catalin Marinas
2012-04-26 9:25 ` Yilu Mao
2012-04-26 9:44 ` Catalin Marinas
2012-04-26 10:09 ` Yilu Mao
2012-04-26 10:28 ` Catalin Marinas
2012-04-26 10:35 ` Yilu Mao
2012-04-26 10:38 ` Catalin Marinas
2012-04-26 10:48 ` Yilu Mao
2012-04-26 10:56 ` Catalin Marinas
2012-04-26 11:03 ` Yilu Mao
2012-04-28 6:24 ` Yilu Mao [this message]
2012-04-30 12:11 ` Catalin Marinas
2012-04-30 13:22 ` Yilu Mao
2012-04-26 5:09 ` Yilu Mao
-- strict thread matches above, loose matches on Subject: below --
2012-04-23 7:43 Yilu Mao
2012-04-23 11:19 ` Sergei Shtylyov
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