From: "H. Peter Anvin" <hpa@zytor.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: Alex Shi <alex.shi@intel.com>,
mgorman@suse.de, npiggin@gmail.com, tglx@linutronix.de,
mingo@redhat.com, arnd@arndb.de, rostedt@goodmis.org,
fweisbec@gmail.com, jeremy@goop.org, gregkh@linuxfoundation.org,
glommer@redhat.com, riel@redhat.com, luto@mit.edu,
avi@redhat.com, len.brown@intel.com, dhowells@redhat.com,
fenghua.yu@intel.com, borislav.petkov@amd.com,
yinghai@kernel.org, cpw@sgi.com, steiner@sgi.com,
akpm@linux-foundation.org, penberg@kernel.org, hughd@google.com,
rientjes@google.com, kosaki.motohiro@jp.fujitsu.com,
n-horiguchi@ah.jp.nec.com, paul.gortmaker@windriver.com,
trenn@suse.de, tj@kernel.org, oleg@redhat.com, axboe@kernel.dk,
a.p.zijlstra@chello.nl, kamezawa.hiroyu@jp.fujitsu.com,
viro@zeniv.linux.org.uk, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/7] x86/tlb: add tlb flush all factor for specific CPUs
Date: Tue, 08 May 2012 09:40:17 -0700 [thread overview]
Message-ID: <4FA94C71.7000402@zytor.com> (raw)
In-Reply-To: <4FA94239.2010503@linux.intel.com>
On 05/08/2012 08:56 AM, Andi Kleen wrote:
>
>> This seems a bit concerning from a forward compatibility point of view.
>> It would make more sense to assume that future processors would behave
>> more like the most recent (Sandy Bridge in your case) unless there is
>> evidence to the contrary.
> This would not work on new Atoms, which inter mix model numbers.
>
That is another problem, but there isn't much we (as the Linux
community) can do about that, so we can just do the optimistic thing...
> In the past I did a hack in other software to check the cache sizes to
> distinguish the two
> for unknown models It's not pretty however.
Ick.
-hpa
next prev parent reply other threads:[~2012-05-08 16:41 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-08 14:03 [PATCH v3] TLB flush optimization Alex Shi
2012-05-08 14:03 ` [PATCH v3 1/7] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-05-08 14:03 ` [PATCH v3 2/7] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-05-08 14:03 ` [PATCH v3 3/7] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
2012-05-08 14:03 ` [PATCH v3 4/7] x86/tlb: add tlb flush all factor for specific CPUs Alex Shi
2012-05-08 15:08 ` Peter Zijlstra
2012-05-09 2:03 ` Alex Shi
2012-05-08 15:12 ` H. Peter Anvin
2012-05-09 2:10 ` Alex Shi
2012-05-08 15:15 ` H. Peter Anvin
2012-05-08 15:56 ` Andi Kleen
2012-05-08 16:40 ` H. Peter Anvin [this message]
2012-05-08 15:18 ` H. Peter Anvin
2012-05-09 1:41 ` Alex Shi
2012-05-08 14:03 ` [PATCH v3 5/7] x86/tlb: remove comments for tlb_flush_range implement suggestion Alex Shi
2012-05-09 8:22 ` Nick Piggin
2012-05-08 14:03 ` [PATCH v3 6/7] x86/tlb: optimizing flush_tlb_mm Alex Shi
2012-05-08 15:09 ` Peter Zijlstra
2012-05-08 14:03 ` [PATCH v3 7/7] x86/tlb: add tlb_flushall_factor into sysfs for user change Alex Shi
2012-05-08 15:11 ` Peter Zijlstra
2012-05-08 15:20 ` H. Peter Anvin
2012-05-08 15:25 ` Borislav Petkov
2012-05-08 15:31 ` H. Peter Anvin
2012-05-08 15:41 ` Borislav Petkov
2012-05-08 15:48 ` H. Peter Anvin
2012-05-08 16:10 ` Greg KH
2012-05-08 16:28 ` Borislav Petkov
2012-05-09 5:03 ` Alex Shi
2012-05-08 15:01 ` [PATCH v3] TLB flush optimization Peter Zijlstra
2012-05-09 1:58 ` Alex Shi
2012-05-09 23:45 ` Andi Kleen
2012-05-10 5:06 ` Alex Shi
2012-05-10 7:49 ` HATAYAMA Daisuke
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