From: Clemens Ladisch <clemens@ladisch.de>
To: KwongYuan Wong <wong.kwongyuan@gmail.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: a volatile related bug in kernel/timer.c ?
Date: Fri, 18 May 2012 11:25:53 +0200 [thread overview]
Message-ID: <4FB615A1.1090203@ladisch.de> (raw)
In-Reply-To: <CA++uP6MrvbaaBg3iCZDwYFTQdujPHaKYhAC5FFt+r9M_J-AJ_Q@mail.gmail.com>
KwongYuan Wong wrote:
> in the function "del_timer" in kernel/timer.c, there is the following code
>
> 954 if (timer_pending(timer)) {
> 955 base = lock_timer_base(timer, &flags);
> 956 if (timer_pending(timer)) {
>
> suppose timer_pending(timer) check in line 954 is A, and in line 956 is B.
>
> because the timer_pending(timer) check is very simple, so the result
> may be saved in a register, and that register is reused
> by both A and B. While this should be wrong? the check at B should
> reload the value from memory instead of using previous
> result kept in register, because lock_timer_base may have side-effect
> which change the result of time_pending?
>
> so I guess a barrier() is needed, so that the code should be the following?
>
> if (timer_pending(timer)) {
> base = lock_timer_base(timer, &flags);
> barrier();
> if (timer_pending(timer)) {
The spin_lock_irqsave() in lock_timer_base() already implies a barrier.
(Well, if it's written correctly.)
> in my chip, the generated assembly is like the following:
> ( the function "lock_timer_base" in inlined also)
>
> 1035 __raw_local_irq_save $7
This is not the arch_spin_lock() code I see in my copy of
arch/mips/include/asm/spinlock.h.
Regards,
Clemens
next prev parent reply other threads:[~2012-05-18 9:26 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-17 15:28 a volatile related bug in kernel/timer.c ? KwongYuan Wong
2012-05-18 9:25 ` Clemens Ladisch [this message]
2012-05-18 9:28 ` WANG.Jiong
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