Re: a volatile related bug in kernel/timer.c ?

["WANG.Jiong" <wong.kwongyuan@gmail.com>]

On 05/18/2012 05:25 PM, Clemens Ladisch wrote:
> KwongYuan Wong wrote:
>>   in the function "del_timer" in kernel/timer.c, there is the following code
>>
>> 954  if (timer_pending(timer)) {
>> 955    base = lock_timer_base(timer, &flags);
>> 956    if (timer_pending(timer)) {
>>
>> suppose timer_pending(timer) check in line 954 is A, and in line 956 is B.
>>
>> because the timer_pending(timer) check is very simple, so the result
>> may be saved in a register, and that register is reused
>> by both A and B.  While this should be wrong? the check at B should
>> reload the value from memory instead of using previous
>> result kept in register,  because lock_timer_base may have side-effect
>> which change the result of time_pending?
>>
>> so I guess a barrier() is needed, so that the code should be the following?
>>
>> if (timer_pending(timer)) {
>>   base = lock_timer_base(timer, &flags);
>>   barrier();
>>   if (timer_pending(timer)) {
> The spin_lock_irqsave() in lock_timer_base() already implies a barrier.
> (Well, if it's written correctly.)
>
     Clemens,

         Yes,  our "spin_lock_irqsave" are implemented wrongly, it's
without the barrier, fixed

         Thanks very much
>> in my chip, the generated assembly is like the following:
>> ( the function "lock_timer_base" in inlined also)
>>
>> 1035         __raw_local_irq_save $7
> This is not the arch_spin_lock() code I see in my copy of
> arch/mips/include/asm/spinlock.h.
>
>
> Regards,
> Clemens