From: David Ahern <dsahern@gmail.com>
To: Stephane Eranian <eranian@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Subject: Re: git bisect and perf
Date: Tue, 05 Jun 2012 13:08:31 -0600 [thread overview]
Message-ID: <4FCE592F.80809@gmail.com> (raw)
In-Reply-To: <CABPqkBSR6VCypKXoArPpvKBEpkY0MaPUmLnL7J0tOqgi8WAYzw@mail.gmail.com>
On 6/5/12 1:04 PM, Stephane Eranian wrote:
>> I'm referring to cycles:p
>>
>> model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
> That's not as helpful as /proc/cpuinfo. I suspect this is a Westmere
> system, isn't it?
>
Yes:
processor : 15
vendor_id : GenuineIntel
cpu family : 6
model : 44
model name : Intel(R) Xeon(R) CPU E5620 @ 2.40GHz
stepping : 2
cpu MHz : 2394.133
cache size : 12288 KB
[ 0.146055] Performance Events: PEBS fmt1+, Westmere events, Intel
PMU driver.
[ 0.146645] ... version: 3
[ 0.146897] ... bit width: 48
[ 0.147150] ... generic registers: 4
[ 0.147404] ... value mask: 0000ffffffffffff
[ 0.147657] ... max period: 000000007fffffff
[ 0.147907] ... fixed-purpose events: 3
[ 0.148158] ... event mask: 000000070000000f
prev parent reply other threads:[~2012-06-05 19:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-05 15:29 git bisect and perf David Ahern
2012-06-05 15:51 ` Roland Dreier
2012-06-05 16:56 ` David Ahern
2012-06-05 16:00 ` Peter Zijlstra
2012-06-05 16:05 ` Peter Zijlstra
2012-06-05 17:12 ` David Ahern
2012-06-05 17:35 ` Peter Zijlstra
2012-06-05 23:48 ` David Ahern
2012-06-06 11:46 ` Stephane Eranian
2012-06-05 19:04 ` Stephane Eranian
2012-06-05 19:08 ` David Ahern [this message]
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