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Date: Wed, 13 Jun 2012 15:42:22 +0800
From: Alex Shi <alex.shi@intel.com>
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To: Alex Shi <alex.shi@intel.com>
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Subject: Re: [PATCH v8 0/8] x86 TLB flush range optimizing
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On 06/12/2012 05:06 PM, Alex Shi wrote:

> This version patches rebases on 3.5-rc2 kernel. It does some code clean up,
> change patches sequency to make it looks more logical.
> It also includes xen code change according to Jan Beulich's comments,
> includes comments update of tlb flushing IPI according to PeterZ's suggestions.
> 
> And Adding the flush_tlb_kernel_range support by invlpg.
> 
> Thanks for all comments! and appreciate for more. :) 


Any comments for this patch set. Specially on the 8th patch?

> 
> Alex Shi
> 
> [PATCH v8 1/8] x86/tlb_info: get last level TLB entry number of CPU
> [PATCH v8 2/8] x86/flush_tlb: try flush_tlb_single one by one in
> [PATCH v8 3/8] x86/tlb: fall back to flush all when meet a THP large
> [PATCH v8 4/8] x86/tlb: add tlb_flushall_shift for specific CPU
> [PATCH v8 5/8] x86/tlb: add tlb_flushall_shift knob into debugfs
> [PATCH v8 6/8] x86/tlb: enable tlb flush range support for generic
> [PATCH v8 7/8] x86/tlb: replace INVALIDATE_TLB_VECTOR by
> [PATCH v8 8/8] x86/tlb: do flush_tlb_kernel_range by 'invlpg'