From: Alex Shi <alex.shi@intel.com>
To: Andi Kleen <ak@linux.intel.com>,
linux-tegra@vger.kernel.org, linux-omap@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
arnd@arndb.de, rostedt@goodmis.org, fweisbec@gmail.com,
jeremy@goop.org, seto.hidetoshi@jp.fujitsu.com,
borislav.petkov@amd.com, tony.luck@intel.com, luto@mit.edu,
riel@redhat.com, avi@redhat.com, len.brown@intel.com,
tj@kernel.org, akpm@linux-foundation.org, cl@gentwo.org,
jbeulich@suse.com, eric.dumazet@gmail.com,
akinobu.mita@gmail.com, cpw@sgi.com, penberg@kernel.org,
steiner@sgi.com, viro@zeniv.linux.org.uk,
kamezawa.hiroyu@jp.fujitsu.com, aarcange@redhat.com,
rientjes@google.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 8/8] x86/tlb: do flush_tlb_kernel_range by 'invlpg'
Date: Thu, 14 Jun 2012 10:10:25 +0800 [thread overview]
Message-ID: <4FD94811.9060806@intel.com> (raw)
In-Reply-To: <4FD93DC7.8020501@intel.com>
On 06/14/2012 09:26 AM, Alex Shi wrote:
> On 06/14/2012 09:10 AM, Alex Shi wrote:
>
>> On 06/13/2012 10:56 PM, Andi Kleen wrote:
>>
>>> On Tue, Jun 12, 2012 at 05:06:45PM +0800, Alex Shi wrote:
>>>> This patch do flush_tlb_kernel_range by 'invlpg'. The performance pay
>>>> and gain was analysed in my patch (x86/flush_tlb: try flush_tlb_single
>>>> one by one in flush_tlb_range). Now we move this logical into kernel
>>>> part. The pay is multiple 'invlpg' execution cost, that is same. but
>>>> the gain(cost reducing of TLB entries refilling) is absolutely
>>>> increased.
>>>
>>> The subtle point is whether INVLPG flushes global pages or not.
>>> After some digging I found a sentence in the SDM that says it does.
>>> So it may be safe.
>>
>>
>> Many thanks for your time!
>>
>>>
>>> What does it improve?
>>
>>
>> I have not specific benchmark for this. partly due to the gain theory
>> was proved since it is same as previous user process's page table flush.
>>
>> The user of tlb kernel flush in kernel is vmalloc. and Android binder
>> IPC subsystem is using it(drivers/staging/android/binder.c)
>>
>> I am wondering if it can help Andriod on this?
>> So, add cc to android-kernel@googlegroups.com
>
>
> Sorry, Andriod reject posting without register, so cc to
> linux-omap@vger.kernel.org and linux-tegra@vger.kernel.org instead.
Ops, forget the architecture different again
This will help x86 android, not arm system. Forget above 2 mailing lists. :(
>
>>
>>> -Andi
>>
>>
>
>
next prev parent reply other threads:[~2012-06-14 2:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-12 9:06 [PATCH v8 0/8] x86 TLB flush range optimizing Alex Shi
2012-06-12 9:06 ` [PATCH v8 1/8] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-06-12 9:06 ` [PATCH v8 2/8] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-06-12 9:06 ` [PATCH v8 3/8] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
2012-06-12 9:06 ` [PATCH v8 4/8] x86/tlb: add tlb_flushall_shift for specific CPU Alex Shi
2012-06-12 9:06 ` [PATCH v8 5/8] x86/tlb: add tlb_flushall_shift knob into debugfs Alex Shi
2012-06-12 9:06 ` [PATCH v8 6/8] x86/tlb: enable tlb flush range support for generic mmu and x86 Alex Shi
2012-06-12 9:06 ` [PATCH v8 7/8] x86/tlb: replace INVALIDATE_TLB_VECTOR by CALL_FUNCTION_VECTOR Alex Shi
2012-06-12 9:06 ` [PATCH v8 8/8] x86/tlb: do flush_tlb_kernel_range by 'invlpg' Alex Shi
2012-06-13 14:56 ` Andi Kleen
2012-06-14 1:10 ` Alex Shi
2012-06-14 1:26 ` Alex Shi
2012-06-14 2:10 ` Alex Shi [this message]
2012-06-21 5:25 ` Alex Shi
2012-06-13 7:42 ` [PATCH v8 0/8] x86 TLB flush range optimizing Alex Shi
2012-06-21 5:27 ` Alex Shi
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