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From: "H. Peter Anvin" <hpa@zytor.com>
To: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: mingo@kernel.org, agordeev@redhat.com,
	linux-kernel@vger.kernel.org, yinghai@kernel.org,
	tglx@linutronix.de, linux-tip-commits@vger.kernel.org
Subject: Re: [tip:x86/apic] x86/apic: Try to spread IRQ vectors to different priority levels
Date: Wed, 20 Jun 2012 14:46:07 -0700	[thread overview]
Message-ID: <4FE2449F.8000700@zytor.com> (raw)
In-Reply-To: <1340228471.3696.62.camel@sbsiddha-desk.sc.intel.com>

On 06/20/2012 02:41 PM, Suresh Siddha wrote:
>>
>> OK, stupid question: WHY?
>>
>> In general, in Linux the random prioritization is actually a negative.
> 
> Thinking loud in the context of your e-mail. With the relatively recent
> changes like the commit mentioned below, window of higher priority class
> preempting the lower priority class is minimized to the point at which
> the cpu decides which interrupt to be serviced next. And in this case,
> it doesn't matter if the two vectors are in two different priority
> classes or the same class. Higher the vector number higher the priority
> for the cpu to service next.
>  
> commit e58aa3d2d0cc01ad8d6f7f640a0670433f794922
> Author: Ingo Molnar <mingo@elte.hu>
> Date:   Fri Mar 26 00:06:51 2010 +0000
> 
>     genirq: Run irq handlers with interrupts disabled
> 
> 
>> The only reason for the spreading by 8 is because of bugs/misfeatures in
>> old APIC implementations which made them handle more than two interrupts
>> per priority level rather inefficiently.
> 
> Peter, Is it just inefficiency or a functional bug in those old apic's?
> Just wondering if it is just inefficiency and given the above linux
> behavior does the inefficiency matter?
> 
> Anyways, these are old platforms that we probably don't want to mess
> with. Perhaps we should go back to '8' and add a comment with all this
> info, that the real intention is not to spread them across different
> priority class but to avoid running into some old apic bugs.
> 

I think it's just an inefficiency, in the sense that the interrupt will
be held at the IOAPIC until the LAPIC frees up a slot, but I could be
wrong.  xAPIC implementations can queue an interrupt per vector, and so
are unaffected; arguably we might not even want to do the "spread by 8"
at all on those implementations.

Overall, I think there is no real upside or downside, but the poster
seemed to assume that there would be an automatic upside, and I don't
think there is.

	-hpa


-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.


  reply	other threads:[~2012-06-20 21:46 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-05 11:23 [PATCH 4/8] x86: apic: Factor out default vector_allocation_domain() operations Alexander Gordeev
2012-06-06  8:22 ` Ingo Molnar
2012-06-06  8:42   ` Alexander Gordeev
2012-06-07 13:14   ` [PATCH 4/8] x86/apic: Factor out default vector_allocation_domain() operation Alexander Gordeev
2012-06-07 22:24     ` Suresh Siddha
2012-06-08 14:49     ` [tip:x86/apic] " tip-bot for Alexander Gordeev
2012-06-07 13:15   ` [PATCH 5/8] x86/apic: Try to spread IRQ vectors to different priority levels Alexander Gordeev
2012-06-07 22:26     ` Suresh Siddha
2012-06-08 14:50     ` [tip:x86/apic] " tip-bot for Alexander Gordeev
2012-06-20 17:23       ` H. Peter Anvin
2012-06-20 21:41         ` Suresh Siddha
2012-06-20 21:46           ` H. Peter Anvin [this message]
2012-06-07 13:15   ` [PATCH 6/8] x86/apic: Avoid useless scanning thru a cpumask in assign_irq_vector() Alexander Gordeev
2012-06-07 22:28     ` Suresh Siddha
2012-06-08 14:51     ` [tip:x86/apic] " tip-bot for Alexander Gordeev
2012-06-07 13:15   ` [PATCH 7/8] x86/apic: Make cpu_mask_to_apicid() operations return error code Alexander Gordeev
2012-06-07 22:24     ` Suresh Siddha
2012-06-08 15:15       ` Alexander Gordeev
2012-06-08 16:53       ` [PATCH] x86/apic: Eliminate cpu_mask_to_apicid() operation Alexander Gordeev
2012-06-08 18:24         ` Suresh Siddha
2012-06-08 22:36         ` Yinghai Lu
2012-06-11  8:22         ` Ingo Molnar
2012-06-11 10:51           ` Alexander Gordeev
2012-06-08 14:51     ` [tip:x86/apic] x86/apic: Make cpu_mask_to_apicid() operations return error code tip-bot for Alexander Gordeev
2012-06-07 13:16   ` [PATCH 8/8] x86/apic: Make cpu_mask_to_apicid() operations check cpu_online_mask Alexander Gordeev
2012-06-08 14:52     ` [tip:x86/apic] " tip-bot for Alexander Gordeev

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