From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756974Ab2GMJmb (ORCPT ); Fri, 13 Jul 2012 05:42:31 -0400 Received: from mail-bk0-f46.google.com ([209.85.214.46]:49677 "EHLO mail-bk0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756843Ab2GMJm3 (ORCPT ); Fri, 13 Jul 2012 05:42:29 -0400 Message-ID: <4FFFED7C.9050406@googlemail.com> Date: Fri, 13 Jul 2012 11:42:20 +0200 From: Sebastian Hesselbarh User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.24) Gecko/20111114 Icedove/3.1.16 MIME-Version: 1.0 To: Rob Herring CC: Grant Likely , Rob Landley , Mike Turquette , devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [RESEND PATCH 1/1] clk: add DT support for clock gating control References: <4FFE7979.4060000@googlemail.com> <4FFEBF8A.1020700@gmail.com> <4FFECC4E.4070001@googlemail.com> <4FFF93DC.30103@gmail.com> In-Reply-To: <4FFF93DC.30103@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/13/2012 05:19 AM, Rob Herring wrote: > What's implemented in Linux should not define the binding. The binding > should describe the hardware. > [...] > True, but not your problem to implement. A binding doesn't necessarily > mean there is a full Linux implementation. We just don't want to create > something only to find others need something completely different. Ok, what about a DT describing the following for a simple register-based clock gating controller and the corresponding gated-clock independent of the controller. I am sure there are a bunch of SoCs out there that control their clock gates by writing some bits to a register. If that DT description matches your expectations, I ll prepare patches with documentation and implementation for common clock framework. Sebastian -- /* Simple clock gating controller based on bitmasks and register */ cgc: clock-gating-control@f1000000 { compatible = "clock-gating-control-register"; reg = <0xf1000000 0x4>; /* Clock gating control with one bit at bit position 0 enable with (1<<0), disable with (0<<0) */ cgctrl_usb0: cgc_usb0 { clock-gating-control,shift = <0>; clock-gating-control,mask = <1>; clock-gating-control,enable = <1>; clock-gating-control,disable = <0>; }; /* Clock gating control with two bits at bit position 1-2 enable with (2<<1), disable with (0<<1) */ cgctrl_sata: cgc_sata { clock-gating-control,shift = <1>; clock-gating-control,mask = <3>; clock-gating-control,enable = <2>; clock-gating-control,disable = <0>; }; }; /* Generic clock gate description that can be used with any clock gating controller */ cg_usb0: clockgate@0 { compatible = "gated-clock"; #clock-cells = <0>; clocks = <&osc>; clock-gate-control = <&cgctrl_usb0>; };