From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755577AbdEFWkE (ORCPT ); Sat, 6 May 2017 18:40:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41124 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753442AbdEFWjw (ORCPT ); Sat, 6 May 2017 18:39:52 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 9FB9280B56 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=jcm@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 9FB9280B56 Subject: Re: [PATCH] ACPI: SPCR: Use access width to determine mmio usage To: Jon Mason , Rafael Wysocki , Len Brown , Robert Moore , Lv Zheng References: <1493910330-17913-1-git-send-email-jon.mason@broadcom.com> Cc: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devel@acpica.org, bcm-kernel-feedback-list@broadcom.com, Loc Ho From: Jon Masters Message-ID: <4e11bb2b-7cec-6a7b-ca2b-88be31a98b7d@redhat.com> Date: Sat, 6 May 2017 18:39:48 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.0 MIME-Version: 1.0 In-Reply-To: <1493910330-17913-1-git-send-email-jon.mason@broadcom.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Sat, 06 May 2017 22:39:52 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/04/2017 11:05 AM, Jon Mason wrote: > The current SPCR code does not check the access width of the mmio, and > uses a default of 8bit register accesses. This prevents devices that > only do 16 or 32bit register accesses from working. By simply checking > this field and setting the mmio string appropriately, this issue can be > corrected. To prevent any legacy issues, the code will default to 8bit > accesses if the value is anything but 16 or 32. Thanks for this. Just as an FYI I've a running discussion with Microsoft about defining additional UART subtypes in the DBG2 for special case UARTs. Specifically, I want to address AppliedMicro's special 8250 dw IP that also has a non-standard clock. At this time, there is general agreement to use the access width for some cases rather than defining yet more subtypes - so your patch is good. Loc/Applied: please track this thread, incorporate feedback, and also track the other general recent discussions of 8250 dw from this week. Jon. -- Computer Architect | Sent from my Fedora powered laptop