From: Mario Limonciello <mario.limonciello@amd.com>
To: Perry Yuan <perry.yuan@amd.com>,
rafael.j.wysocki@intel.com, viresh.kumar@linaro.org,
Ray.Huang@amd.com, gautham.shenoy@amd.com,
Borislav.Petkov@amd.com
Cc: Alexander.Deucher@amd.com, Xinmei.Huang@amd.com,
Xiaojian.Du@amd.com, Li.Meng@amd.com, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 11/11] cpufreq: amd-pstate: enable shared memory type CPPC by default
Date: Tue, 18 Jun 2024 14:25:16 -0500 [thread overview]
Message-ID: <4e84249b-2fa1-4d47-aa08-e8c429003714@amd.com> (raw)
In-Reply-To: <0700459b88b496963dd5914631eee753bcf0a560.1718606975.git.perry.yuan@amd.com>
On 6/17/2024 01:59, Perry Yuan wrote:
> The amd-pstate-epp driver has been implemented and resolves the
> performance drop issue seen in passive mode. Users who enable the
> active mode driver will not experience a performance drop compared
> to the passive mode driver. Therefore, the EPP driver should be
> loaded by default at system boot.
I think this commit message should specifically reference that it's
being enabled by default on shared memory designs as that's the net new.
The code change looks good, go ahead and add
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
on the next version as long as you've added a sentence about shared
memory designs to commit message.
>
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> ---
> drivers/cpufreq/amd-pstate.c | 13 +------------
> 1 file changed, 1 insertion(+), 12 deletions(-)
>
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index b48fd60cbc6d..eca2f7dcf7ce 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -96,15 +96,6 @@ enum amd_core_type {
> CPU_CORE_TYPE_UNDEFINED = 2,
> };
>
> -/*
> - * TODO: We need more time to fine tune processors with shared memory solution
> - * with community together.
> - *
> - * There are some performance drops on the CPU benchmarks which reports from
> - * Suse. We are co-working with them to fine tune the shared memory solution. So
> - * we disable it by default to go acpi-cpufreq on these processors and add a
> - * module parameter to be able to enable it manually for debugging.
> - */
> static struct cpufreq_driver *current_pstate_driver;
> static struct cpufreq_driver amd_pstate_driver;
> static struct cpufreq_driver amd_pstate_epp_driver;
> @@ -1867,11 +1858,9 @@ static int __init amd_pstate_init(void)
> /* Disable on the following configs by default:
> * 1. Undefined platforms
> * 2. Server platforms
> - * 3. Shared memory designs
> */
> if (amd_pstate_acpi_pm_profile_undefined() ||
> - amd_pstate_acpi_pm_profile_server() ||
> - !cpu_feature_enabled(X86_FEATURE_CPPC)) {
> + amd_pstate_acpi_pm_profile_server()) {
> pr_info("driver load is disabled, boot with specific mode to enable this\n");
> return -ENODEV;
> }
next prev parent reply other threads:[~2024-06-18 19:25 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-17 6:59 [PATCH v4 00/11] AMD Pstate Driver Fixes and Improvements Perry Yuan
2024-06-17 6:59 ` [PATCH v4 01/11] cpufreq: amd-pstate: optimize the initial frequency values verification Perry Yuan
2024-06-17 6:59 ` [PATCH v4 02/11] cpufreq: amd-pstate: remove unused variable nominal_freq Perry Yuan
2024-06-17 6:59 ` [PATCH v4 03/11] cpufreq: amd-pstate: show CPPC debug message if CPPC is not supported Perry Yuan
2024-06-17 6:59 ` [PATCH v4 04/11] cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS Perry Yuan
2024-06-18 19:25 ` Mario Limonciello
2024-06-17 6:59 ` [PATCH v4 05/11] Documentation: PM: amd-pstate: add debugging section for driver loading failure Perry Yuan
2024-06-18 19:24 ` Mario Limonciello
2024-06-17 6:59 ` [PATCH v4 06/11] Documentation: PM: amd-pstate: add guided mode to the Operation mode Perry Yuan
2024-06-17 6:59 ` [PATCH v4 07/11] cpufreq: amd-pstate: switch boot_cpu_has() to cpu_feature_enabled() Perry Yuan
2024-06-17 6:59 ` [PATCH v4 08/11] x86/cpufeatures: Add feature bits for AMD heterogeneous processor Perry Yuan
2024-06-17 8:39 ` Borislav Petkov
2024-06-19 3:40 ` Yuan, Perry
2024-06-17 6:59 ` [PATCH v4 09/11] cpufreq: amd-pstate: implement heterogeneous core topology for highest performance initialization Perry Yuan
2024-06-18 19:22 ` Mario Limonciello
2024-06-19 3:23 ` Yuan, Perry
2024-06-18 21:23 ` Borislav Petkov
2024-06-19 3:25 ` Yuan, Perry
2024-06-17 6:59 ` [PATCH v4 10/11] cpufreq: amd-pstate: auto-load pstate driver by default Perry Yuan
2024-06-18 19:25 ` Mario Limonciello
2024-06-19 3:08 ` Yuan, Perry
2024-06-17 6:59 ` [PATCH v4 11/11] cpufreq: amd-pstate: enable shared memory type CPPC " Perry Yuan
2024-06-18 19:25 ` Mario Limonciello [this message]
2024-06-19 3:06 ` Yuan, Perry
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4e84249b-2fa1-4d47-aa08-e8c429003714@amd.com \
--to=mario.limonciello@amd.com \
--cc=Alexander.Deucher@amd.com \
--cc=Borislav.Petkov@amd.com \
--cc=Li.Meng@amd.com \
--cc=Ray.Huang@amd.com \
--cc=Xiaojian.Du@amd.com \
--cc=Xinmei.Huang@amd.com \
--cc=gautham.shenoy@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=perry.yuan@amd.com \
--cc=rafael.j.wysocki@intel.com \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox