From: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
To: Steven Rostedt <rostedt@goodmis.org>
Cc: tglx@linutronix.de, mingo@kernel.org, paulmck@linux.vnet.ibm.com,
josh@joshtriplett.org, linux-kernel@vger.kernel.org
Subject: [PATCH] preempt/hardirq.h: Clarify PREEMPT_ACTIVE bit location
Date: Tue, 14 Aug 2012 13:58:09 +0530 [thread overview]
Message-ID: <502A0C19.6010007@linux.vnet.ibm.com> (raw)
In-Reply-To: <1343706583.27983.28.camel@gandalf.stny.rr.com>
By default, the PREEMPT_ACTIVE flag is bit 27, but different
architectures can override that. Update the comment to reflect
this fact.
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
---
include/linux/hardirq.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 305f23c..483aa60 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -20,10 +20,15 @@
* hardirq nesting. An arch may choose to give less than 10 bits.
* m68k expects it to be 8.
*
+ * By default, the bits are defined as shown below:
+ *
* - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
* - bit 26 is the NMI_MASK
* - bit 27 is the PREEMPT_ACTIVE flag
*
+ * However, different architectures may override them. (For example,
+ * x86 defines bit 28 as the PREEMPT_ACTIVE flag).
+ *
* PREEMPT_MASK: 0x000000ff
* SOFTIRQ_MASK: 0x0000ff00
* HARDIRQ_MASK: 0x03ff0000
next prev parent reply other threads:[~2012-08-14 8:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-20 19:24 [PATCH] preempt/hardirq.h: Fix comment about PREEMPT_ACTIVE bit location Srivatsa S. Bhat
2012-07-26 15:15 ` [tip:sched/urgent] sched: " tip-bot for Srivatsa S. Bhat
2012-07-31 3:49 ` [PATCH] preempt/hardirq.h: " Steven Rostedt
2012-08-14 8:26 ` Srivatsa S. Bhat
2012-08-14 8:28 ` Srivatsa S. Bhat [this message]
2012-08-14 10:18 ` [PATCH] preempt/hardirq.h: Clarify " Thomas Gleixner
2012-08-14 12:46 ` Steven Rostedt
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