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Message-ID: <502A7C3C.6080907@caviumnetworks.com>
Date: Tue, 14 Aug 2012 09:26:36 -0700
From: David Daney <ddaney@caviumnetworks.com>
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To: Huacai Chen <chenhuacai@gmail.com>
CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
        Ralf Baechle <ralf@linux-mips.org>, <linux-mips@linux-mips.org>,
        <linux-kernel@vger.kernel.org>, Fuxin Zhang <zhangfx@lemote.com>,
        Zhangjin Wu <wuzhangjin@gmail.com>, Hongliang Tao <taohl@lemote.com>,
        Hua Yan <yanh@lemote.com>
Subject: Re: [PATCH V5 09/18] MIPS: Loongson: Add swiotlb to support big memory
 (>4GB).
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On 08/13/2012 10:57 PM, Huacai Chen wrote:
> Hi, David,
>
> Seems like you are the original author of code in
> arch/mips/cavium-octeon/dma-octeon.c. Could you please tell me why we
> need mb() in alloc_coherent(), map_page(), map_sg()? It seems like
> because of cache coherency (CPU write some data, then map the page for
> a device, if without mb(), then device may read wrong data.) but I'm
> not sure.
>

That is essentially correct.

The DMA API requires certain memory barrier semantics.  These are 
achieved with the mb() in the OCTEON code.

> On Tue, Aug 14, 2012 at 1:54 AM, Konrad Rzeszutek Wilk
> <konrad.wilk@oracle.com>  wrote:
>>> +static void *loongson_dma_alloc_coherent(struct device *dev, size_t size,
>>> +                             dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs)

I know nothing about Loongson, so I cannot comment on what is required 
for it.

David Daney