[PATCH 2/2] dw_dmac: max_mem_width limits value for SRC/DST_TR_WID register

[Hein Tibosch <hein_tibosch@yahoo.es>]

The dw_dmac driver was earlier adapted to do 64-bit transfers
on the memory side (https://lkml.org/lkml/2012/1/18/52)
This works on ARM platforms but for AVR32 (AP700x) the maximum
allowed transfer size is 32-bits.
This patch allows the arch to set a new slave property
max_mem_width to limit the size.
Allowable values for dw_dma_slave::max_mem_width are:

0 : leave it up to dw_dmac (64 bits)
1 : 16-bits
2 : 32-bits

Signed-off-by: Hein Tibosch <hein_tibosch@yahoo.es>

---
 drivers/dma/dw_dmac.c   |    8 ++++++++
 include/linux/dw_dmac.h |    3 +++
 2 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 7212961..a4bdf1d 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -754,6 +754,10 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
 				mem_width = 1;
 			else
 				mem_width = 0;
+			/* Some controllers don't support 64-bits mem access */
+			if (dws->max_mem_width &&
+				mem_width > dws->max_mem_width)
+				mem_width = dws->max_mem_width;
 
 slave_sg_todev_fill_desc:
 			desc = dwc_desc_get(dwc);
@@ -821,6 +825,10 @@ slave_sg_todev_fill_desc:
 				mem_width = 1;
 			else
 				mem_width = 0;
+			/* Some controllers don't support 64-bits mem access */
+			if (dws->max_mem_width &&
+				mem_width > dws->max_mem_width)
+				mem_width = dws->max_mem_width;
 
 slave_sg_fromdev_fill_desc:
 			desc = dwc_desc_get(dwc);
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index 2412e02..60b01c3 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -51,6 +51,8 @@ enum dw_dma_msize {
  * @cfg_lo: Platform-specific initializer for the CFG_LO register
  * @src_master: src master for transfers on allocated channel.
  * @dst_master: dest master for transfers on allocated channel.
+ * @max_mem_width: max value for SRC/DST_TR_WIDTH register
+ *	default 0 means: leave it up to driver
  */
 struct dw_dma_slave {
 	struct device		*dma_dev;
@@ -58,6 +60,7 @@ struct dw_dma_slave {
 	u32			cfg_lo;
 	u8			src_master;
 	u8			dst_master;
+	u8			max_mem_width;
 };
 
 /* Platform-configurable bits in CFG_HI */
-- 
1.7.8.0