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From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	Peter Zijlstra <a.p.zijlstra@chello.nl>,
	"ak@linux.intel.com" <ak@linux.intel.com>
Subject: Re: [PATCH V2 6/7] perf, x86: Use LBR call stack to get user callchain
Date: Wed, 24 Oct 2012 19:23:02 +0800	[thread overview]
Message-ID: <5087CF96.7010406@intel.com> (raw)
In-Reply-To: <CABPqkBRzwsmzaGFKK9+zOed8HK=Q9T9++hMHW+tSKh4EF0cKjg@mail.gmail.com>

On 10/24/2012 04:57 PM, Stephane Eranian wrote:
> On Wed, Oct 24, 2012 at 7:59 AM, Yan, Zheng <zheng.z.yan@intel.com> wrote:
>> From: "Yan, Zheng" <zheng.z.yan@intel.com>
>>
>> Try enabling the LBR call stack feature if event request recording
>> callchain. Try utilizing the LBR call stack to get user callchain
>> in case of there is no frame pointer.
>>
>> Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
>> ---
>>  arch/x86/kernel/cpu/perf_event.c           | 126 +++++++++++++++++++++--------
>>  arch/x86/kernel/cpu/perf_event.h           |   7 ++
>>  arch/x86/kernel/cpu/perf_event_intel.c     |  20 ++---
>>  arch/x86/kernel/cpu/perf_event_intel_lbr.c |   3 +
>>  include/linux/perf_event.h                 |   6 ++
>>  kernel/events/core.c                       |  11 ++-
>>  6 files changed, 124 insertions(+), 49 deletions(-)
>>
>> diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
>> index 8ae8044..3bf2100 100644
>> --- a/arch/x86/kernel/cpu/perf_event.c
>> +++ b/arch/x86/kernel/cpu/perf_event.c
>> @@ -398,35 +398,46 @@ int x86_pmu_hw_config(struct perf_event *event)
>>
>>                 if (event->attr.precise_ip > precise)
>>                         return -EOPNOTSUPP;
>> -               /*
>> -                * check that PEBS LBR correction does not conflict with
>> -                * whatever the user is asking with attr->branch_sample_type
>> -                */
>> -               if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format < 2) {
>> -                       u64 *br_type = &event->attr.branch_sample_type;
>> -
>> -                       if (has_branch_stack(event)) {
>> -                               if (!precise_br_compat(event))
>> -                                       return -EOPNOTSUPP;
>> -
>> -                               /* branch_sample_type is compatible */
>> -
>> -                       } else {
>> -                               /*
>> -                                * user did not specify  branch_sample_type
>> -                                *
>> -                                * For PEBS fixups, we capture all
>> -                                * the branches at the priv level of the
>> -                                * event.
>> -                                */
>> -                               *br_type = PERF_SAMPLE_BRANCH_ANY;
>> -
>> -                               if (!event->attr.exclude_user)
>> -                                       *br_type |= PERF_SAMPLE_BRANCH_USER;
>> -
>> -                               if (!event->attr.exclude_kernel)
>> -                                       *br_type |= PERF_SAMPLE_BRANCH_KERNEL;
>> -                       }
>> +       }
>> +       /*
>> +        * check that PEBS LBR correction does not conflict with
>> +        * whatever the user is asking with attr->branch_sample_type
>> +        */
>> +       if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format < 2) {
>> +               u64 *br_type = &event->attr.branch_sample_type;
>> +
>> +               if (has_branch_stack(event)) {
>> +                       if (!precise_br_compat(event))
>> +                               return -EOPNOTSUPP;
>> +
>> +                       /* branch_sample_type is compatible */
>> +
>> +               } else {
>> +                       /*
>> +                        * user did not specify  branch_sample_type
>> +                        *
>> +                        * For PEBS fixups, we capture all
>> +                        * the branches at the priv level of the
>> +                        * event.
>> +                        */
>> +                       *br_type = PERF_SAMPLE_BRANCH_ANY;
>> +
>> +                       if (!event->attr.exclude_user)
>> +                               *br_type |= PERF_SAMPLE_BRANCH_USER;
>> +
>> +                       if (!event->attr.exclude_kernel)
>> +                               *br_type |= PERF_SAMPLE_BRANCH_KERNEL;
>> +               }
>> +       } else if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN) {
>> +               if (!has_branch_stack(event) && x86_pmu.attr_lbr_callstack) {
>> +                       /*
>> +                        * user did not specify branch_sample_type,
>> +                        * try using the LBR call stack facility to
>> +                        * record call chains in the user space.
>> +                        */
>> +                       event->attr.branch_sample_type =
>> +                               PERF_SAMPLE_BRANCH_USER |
>> +                               PERF_SAMPLE_BRANCH_CALL_STACK;
> 
> You are forcing user level here, but how do you know the user wanted
> ONLY user level
> callchains?
> 
> 

The LBR call stack is used only when the frame pointer approach doesn't work.
I think the kernel has frame pointer for the most cases. The second reason is
that the LBR call stack only has 16 entries. I think it's too small to record
both kernel and user call chains.

Regards
Yan, Zheng


  reply	other threads:[~2012-10-24 11:33 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-24  5:59 [PATCH V2 0/7] perf, x86: Haswell LBR call stack support Yan, Zheng
2012-10-24  5:59 ` [PATCH V2 1/7] perf, x86: Reduce lbr_sel_map size Yan, Zheng
2012-10-24  7:28   ` Stephane Eranian
2012-10-24  7:49     ` Yan, Zheng
2012-10-24  8:15       ` Stephane Eranian
2012-10-24  8:23         ` Yan, Zheng
2012-10-24  8:37           ` Yan, Zheng
2012-10-24  8:53             ` Stephane Eranian
2012-10-24  5:59 ` [PATCH V2 2/7] perf, x86: Basic Haswell LBR call stack support Yan, Zheng
2012-10-24  5:59 ` [PATCH V2 3/7] perf, x86: Introduce x86 special perf event context Yan, Zheng
2012-10-24  5:59 ` [PATCH V2 4/7] perf, x86: Save/resotre LBR stack during context switch Yan, Zheng
2012-10-24  5:59 ` [PATCH V2 5/7] perf, core: Pass perf_sample_data to perf_callchain() Yan, Zheng
2012-10-24  5:59 ` [PATCH V2 6/7] perf, x86: Use LBR call stack to get user callchain Yan, Zheng
2012-10-24  8:57   ` Stephane Eranian
2012-10-24 11:23     ` Yan, Zheng [this message]
2012-10-24 11:47       ` Stephane Eranian
2012-10-24 11:52         ` Yan, Zheng
2012-10-24 12:11           ` Stephane Eranian
2012-10-24 12:21             ` Stephane Eranian
2012-10-24 12:31               ` Andi Kleen
2012-10-24 12:36                 ` Stephane Eranian
2012-10-24 12:41                   ` Andi Kleen
2012-10-24 12:46                   ` Yan, Zheng
2012-10-24  5:59 ` [PATCH V2 7/7] perf, x86: Discard zero length call entries in LBR call stack Yan, Zheng
2012-10-25  9:12   ` Namhyung Kim
2012-10-24  8:49 ` [PATCH V2 0/7] perf, x86: Haswell LBR call stack support Stephane Eranian
  -- strict thread matches above, loose matches on Subject: below --
2013-07-01  7:23 [PATCH v2 " Yan, Zheng
2013-07-01  7:23 ` [PATCH v2 6/7] perf, x86: Use LBR call stack to get user callchain Yan, Zheng

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