[PATCH v2 2/2] therma: exynos: Supports thermal tripping

[PATCH v2 2/2] therma: exynos: Supports thermal tripping

[Jonghwan Choi]

TMU urgently sends active-high signal (thermal trip) to PMU,
and thermal tripping by hardware logic i.e PMU is performed.
Thermal tripping means that PMU cut off the whole power of SoC
by controlling external voltage regulator.

Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
---
 drivers/thermal/exynos_thermal.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index 6ce6667..5672e95 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -53,6 +53,7 @@
 #define EXYNOS_TMU_TRIM_TEMP_MASK      0xff
 #define EXYNOS_TMU_GAIN_SHIFT          8
 #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
+#define EXYNOS_TMU_TRIP_EN             BIT(12)
 #define EXYNOS_TMU_CORE_ON             1
 #define EXYNOS_TMU_CORE_OFF            0
 #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET     50
@@ -656,6 +657,9 @@ static void exynos_tmu_control(struct platform_device
*pdev, bool on)
        if (data->soc == SOC_ARCH_EXYNOS) {
                con |= pdata->noise_cancel_mode <<
EXYNOS_TMU_TRIP_MODE_SHIFT;
                con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
+
+               if (pdata->trigger_level3_en)
+                       con |= EXYNOS_TMU_TRIP_EN;
        }

        if (on) {
--
1.7.4.1

Re: [PATCH v2 2/2] therma: exynos: Supports thermal tripping

[jonghwa3.lee]

On 2012년 10월 31일 15:47, Jonghwan Choi wrote:
> TMU urgently sends active-high signal (thermal trip) to PMU,
> and thermal tripping by hardware logic i.e PMU is performed.
> Thermal tripping means that PMU cut off the whole power of SoC
> by controlling external voltage regulator.
>
> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
> ---
>  drivers/thermal/exynos_thermal.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/thermal/exynos_thermal.c
> b/drivers/thermal/exynos_thermal.c
> index 6ce6667..5672e95 100644
> --- a/drivers/thermal/exynos_thermal.c
> +++ b/drivers/thermal/exynos_thermal.c
> @@ -53,6 +53,7 @@
>  #define EXYNOS_TMU_TRIM_TEMP_MASK      0xff
>  #define EXYNOS_TMU_GAIN_SHIFT          8
>  #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
> +#define EXYNOS_TMU_TRIP_EN             BIT(12)
>  #define EXYNOS_TMU_CORE_ON             1
>  #define EXYNOS_TMU_CORE_OFF            0
>  #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET     50
> @@ -656,6 +657,9 @@ static void exynos_tmu_control(struct platform_device
> *pdev, bool on)
>         if (data->soc == SOC_ARCH_EXYNOS) {
>                 con |= pdata->noise_cancel_mode <<
> EXYNOS_TMU_TRIP_MODE_SHIFT;
>                 con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
> +
> +               if (pdata->trigger_level3_en)
> +                       con |= EXYNOS_TMU_TRIP_EN;
How do you think move this codes outside of parenthesis ? Then you can set trip enable bit depends
on soc type.

if (soc == exynos4210)
interrupt_en |= trigger_level3_en // this also has to be removed from if(on) part.
else /* for other SOCs */
con |= trigger_level3_en

>         }
>
>         if (on) {
> --
> 1.7.4.1
>
> --
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Re: [PATCH v2 2/2] therma: exynos: Supports thermal tripping

[Amit Kachhap]

On 31 October 2012 12:17, Jonghwan Choi <jhbird.choi@samsung.com> wrote:
> TMU urgently sends active-high signal (thermal trip) to PMU,
> and thermal tripping by hardware logic i.e PMU is performed.
> Thermal tripping means that PMU cut off the whole power of SoC
> by controlling external voltage regulator.
>
> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
> ---
>  drivers/thermal/exynos_thermal.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/thermal/exynos_thermal.c
> b/drivers/thermal/exynos_thermal.c
> index 6ce6667..5672e95 100644
> --- a/drivers/thermal/exynos_thermal.c
> +++ b/drivers/thermal/exynos_thermal.c
> @@ -53,6 +53,7 @@
>  #define EXYNOS_TMU_TRIM_TEMP_MASK      0xff
>  #define EXYNOS_TMU_GAIN_SHIFT          8
>  #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
> +#define EXYNOS_TMU_TRIP_EN             BIT(12)
>  #define EXYNOS_TMU_CORE_ON             1
>  #define EXYNOS_TMU_CORE_OFF            0
>  #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET     50
> @@ -656,6 +657,9 @@ static void exynos_tmu_control(struct platform_device
> *pdev, bool on)
>         if (data->soc == SOC_ARCH_EXYNOS) {
>                 con |= pdata->noise_cancel_mode <<
> EXYNOS_TMU_TRIP_MODE_SHIFT;
>                 con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
> +
> +               if (pdata->trigger_level3_en)
> +                       con |= EXYNOS_TMU_TRIP_EN;
Hi Jonghwan Choi,

IMO, Also you need to write 4th trigger level, Currently only 3
trigger levels are stored in register THD_TEMP_RISE.

Thanks,
Amit Daniel
>         }
>
>         if (on) {
> --
> 1.7.4.1
>