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From: Murali Karicheri <m-karicheri2@ti.com>
To: Sekhar Nori <nsekhar@ti.com>
Cc: <mturquette@linaro.org>, <arnd@arndb.de>,
	<akpm@linux-foundation.org>, <shawn.guo@linaro.org>,
	<rob.herring@calxeda.com>, <linus.walleij@linaro.org>,
	<viresh.linux@gmail.com>, <linux-kernel@vger.kernel.org>,
	<khilman@ti.com>, <linux@arm.linux.org.uk>,
	<sshtylyov@mvista.com>,
	<davinci-linux-open-source@linux.davincidsp.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-keystone@list.ti.com>
Subject: Re: [PATCH v3 04/11] clk: davinci - add pll divider clock driver
Date: Mon, 5 Nov 2012 10:10:18 -0500	[thread overview]
Message-ID: <5097D6DA.5050205@ti.com> (raw)
In-Reply-To: <50950820.3050505@ti.com>

On 11/03/2012 08:03 AM, Sekhar Nori wrote:
> On 11/2/2012 7:23 PM, Murali Karicheri wrote:
>> On 11/02/2012 07:33 AM, Sekhar Nori wrote:
>>> On 10/25/2012 9:41 PM, Murali Karicheri wrote:
>>>
>>>> pll dividers are present in the pll controller of DaVinci and Other
>>>> SoCs that re-uses the same hardware IP. This has a enable bit for
>>>> bypass the divider or enable the driver. This is a sub class of the
>>>> clk-divider clock checks the enable bit to calculare the rate and
>>>> invoke the recalculate() function of the clk-divider if enabled.
>>>>
>>>> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
>>>> ---
>>>> +/**
>>>> + * clk_register_davinci_plldiv - register function for DaVinci PLL
>>>> divider clk
>>>> + *
>>>> + * @dev: device ptr
>>>> + * @name: name of the clock
>>>> + * @parent_name: name of parent clock
>>>> + * @plldiv_data: ptr to pll divider data
>>>> + * @lock: ptr to spinlock passed to divider clock
>>>> + */
>>>> +struct clk *clk_register_davinci_plldiv(struct device *dev,
>>> Why do you need a dev pointer here and which device does it point to? In
>>> the only usage of this API in the series, you pass a NULL here. I should
>>> have probably asked this question on one of the earlier patches itself.
>>>
>> I did a grep in the drivers/clk directory. All of the platform drivers
>> are having the device ptr and all of them are called with NULL. I am not
>> sure what is the intent of this arg in the API.  As per documentation of
> I just took a look at the mxs example you referenced below and it does
> not take a dev pointer.
>
> struct clk *mxs_clk_div(const char *name, const char *parent_name,
>                          void __iomem *reg, u8 shift, u8 width, u8 busy)
> {
>
>> the clk_register() API, the device ptr points to the device that is
>> registering this clk. So if a specific device driver ever has to
>> register a PLL div clk, this will be non NULL. In  the normal use case,
>> clk is registered in a platform specific code and is always passed NULL.
>>
>> The platform/SoC specific clock initialization code will be using
>> davinci_plldiv_clk() that doesn't have a device ptr arg.
>> So this can be changed in future in sync with other drivers (assuming
>> this will get removed if unused), and changes
>> doesn't impact the platform code that initialize the clock. So IMO, we
>> should keep this arg so that it is in sync with other driver APIs.
> I think you should get rid of this unused arg and introduce it when you
> actually need it. That way we are clear about why we need it.
>
You are right. I will remove it and for other drivers.
>> +            const char *name, const char *parent_name,
>> +            struct clk_plldiv_data *plldiv_data,
>> +            spinlock_t *lock)
>> +{
>> +    struct clk_div *div;
>> +    struct clk *clk;
>> +    struct clk_init_data init;
>> +
>> +    div = kzalloc(sizeof(*div), GFP_KERNEL);
>> +    if (!div)
>> +        return ERR_PTR(-ENOMEM);
>> +
>> +    init.name = name;
>> +    init.ops = &clk_div_ops;
>> +    init.flags = plldiv_data->flags;
>> +    init.parent_names = (parent_name ? &parent_name : NULL);
>> +    init.num_parents = (parent_name ? 1 : 0);
>> +
>> +    div->reg = plldiv_data->reg;
>> +    div->en_id = plldiv_data->en_id;
>> +
>> +    div->divider.reg = plldiv_data->reg;
>> +    div->divider.shift = plldiv_data->shift;
>> +    div->divider.width = plldiv_data->width;
>> +    div->divider.flags = plldiv_data->divider_flags;
>> +    div->divider.lock = lock;
>> +    div->divider.hw.init = &init;
>> +    div->ops = &clk_divider_ops;
>> +
>> +    clk = clk_register(NULL, &div->divider.hw);
>>
>>> Shouldn't you be calling clk_register_divider() here which in turn will
>>> do clk_register()?
>> As stated in the top of the file, this is a subclass driver of clk-div
>> similar in line with mxs/clk-div.c. The
>> driver registers the clock instead of calling clk_register_divider() so
>> that it's ops function has a chance to do whatever it wants to do and
>> call the divider ops function after that.
> I see that now. I should have paid more attention.
>
> Regards,
> Sekhar
>


  reply	other threads:[~2012-11-05 15:10 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-25 16:11 [PATCH v3 00/11] common clk drivers migration for DaVinci SoCs Murali Karicheri
2012-10-25 16:11 ` [PATCH v3 01/11] clk: davinci - add main PLL clock driver Murali Karicheri
2012-10-28 19:18   ` Linus Walleij
2012-10-31 13:23     ` Murali Karicheri
2012-10-31 12:29   ` Sekhar Nori
2012-10-31 13:46     ` Murali Karicheri
2012-11-01 11:01       ` Sekhar Nori
2012-10-25 16:11 ` [PATCH v3 02/11] clk: davinci - add PSC " Murali Karicheri
2012-10-28 19:24   ` Linus Walleij
2012-10-31 13:23     ` Murali Karicheri
2013-03-19 10:57     ` Sekhar Nori
2012-11-03 12:07   ` Sekhar Nori
2012-11-05 15:10     ` Murali Karicheri
2012-11-10  2:22       ` Mike Turquette
2012-11-27 15:05         ` Sekhar Nori
     [not found]           ` <20121127172900.21126.89528@nucleus>
2012-11-27 20:38             ` Murali Karicheri
2012-11-28 13:22             ` Sekhar Nori
2013-03-22 11:20               ` Sekhar Nori
2013-03-22 20:37                 ` Mike Turquette
2013-03-25  6:50                   ` Sekhar Nori
2012-10-25 16:11 ` [PATCH v3 03/11] clk: davinci - common clk utilities to init clk driver Murali Karicheri
2012-10-28 19:25   ` Linus Walleij
2012-10-31 13:23     ` Murali Karicheri
2012-11-01 12:41   ` Sekhar Nori
2012-11-01 18:34     ` Murali Karicheri
2012-11-03 12:35   ` Sekhar Nori
2012-11-05 15:20     ` Murali Karicheri
2012-11-06  9:31       ` Sekhar Nori
2012-11-06 15:04         ` Murali Karicheri
2012-10-25 16:11 ` [PATCH v3 04/11] clk: davinci - add pll divider clock driver Murali Karicheri
2012-10-28 19:26   ` Linus Walleij
2012-10-31 13:22     ` Murali Karicheri
2012-11-02 11:33   ` Sekhar Nori
2012-11-02 13:53     ` Murali Karicheri
2012-11-03 12:03       ` Sekhar Nori
2012-11-05 15:10         ` Murali Karicheri [this message]
2012-10-25 16:11 ` [PATCH v3 05/11] clk: davinci - add dm644x clock initialization Murali Karicheri
2012-11-03 13:30   ` Sekhar Nori
2012-11-05 15:42     ` Murali Karicheri
2012-11-06 10:18       ` Sekhar Nori
2012-11-05 23:23     ` Murali Karicheri
2012-11-06  9:40       ` Sekhar Nori
2012-10-25 16:11 ` [PATCH v3 06/11] clk: davinci - add build infrastructure for DaVinci clock drivers Murali Karicheri
2012-11-04 13:34   ` Sekhar Nori
2012-11-05 16:17     ` Murali Karicheri
2012-11-06  9:48       ` Sekhar Nori
2012-10-25 16:11 ` [PATCH v3 07/11] ARM: davinci - restructure header files for common clock migration Murali Karicheri
2012-11-04 14:05   ` Sekhar Nori
2012-11-05 19:11     ` Murali Karicheri
2012-11-06 10:03       ` Sekhar Nori
2012-11-05 21:57     ` Murali Karicheri
2012-12-03 13:23       ` Sekhar Nori
2012-10-25 16:11 ` [PATCH v3 08/11] ARM: davinci - migrating to use common clock init code Murali Karicheri
2012-10-25 16:11 ` [PATCH v3 09/11] ARM: davinci - dm644x: update SoC code to remove the clock data Murali Karicheri
2012-10-25 16:11 ` [PATCH v3 10/11] ARM: davinci - migrate to common clock Murali Karicheri
2012-11-04 13:06   ` Sekhar Nori
2012-11-05 15:43     ` Murali Karicheri
2012-10-25 16:11 ` [PATCH v3 11/11] ARM: davinci - common clock migration: clean up the old code Murali Karicheri
2012-10-30 17:00 ` [PATCH v3 00/11] common clk drivers migration for DaVinci SoCs Karicheri, Muralidharan

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