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From: Laxman Dewangan <ldewangan@nvidia.com>
To: "Kim, Milo" <Milo.Kim@ti.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>,
	Mark Brown <broonie@opensource.wolfsonmicro.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] mfd: tps65910: fix wrong ack_base register
Date: Fri, 30 Nov 2012 00:54:54 +0530	[thread overview]
Message-ID: <50B7B686.4010700@nvidia.com> (raw)
In-Reply-To: <A874F61F95741C4A9BA573A70FE3998F6418F154@DQHE02.ent.ti.com>

On Thursday 29 November 2012 12:12 PM, Kim, Milo wrote:
>   The interrupt status registers of TPS65910/1 should be cleared
>   when the associated interrupt event occurs.
>   This work is done in the regmap irq thread - using 'ack_base' register.
>   The ACK registers should be fixed as status register, not mask registers.
>
>   This patch fixes the infinite interrupt event problem by clearing
>   interrupt status registers.
>
>   Tested on the AM3517 Craneboard.
>
> Signed-off-by: Milo(Woogyom) Kim<milo.kim@ti.com>
> ---

Aah,  I was debugging the onkey and I am also seeing continuous 
interrupt. This fix the issue.
Thanks,
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>


  reply	other threads:[~2012-11-29 19:25 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-29  6:42 [PATCH 3/3] mfd: tps65910: fix wrong ack_base register Kim, Milo
2012-11-29 19:24 ` Laxman Dewangan [this message]
2012-11-30 11:21 ` Samuel Ortiz

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