From: Prashant Gaikwad <pgaikwad@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>,
Stephen Warren <swarren@wwwdotorg.org>,
Russell King <linux@arm.linux.org.uk>,
Simon Glass <sjg@chromium.org>,
Mike Turquette <mturquette@linaro.org>,
Joseph Lo <josephl@nvidia.com>,
"devicetree-discuss@lists.ozlabs.org"
<devicetree-discuss@lists.ozlabs.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114
Date: Tue, 5 Feb 2013 11:06:08 +0530 [thread overview]
Message-ID: <51109A48.5000708@nvidia.com> (raw)
In-Reply-To: <20130204143401.GW2364@tbergstrom-lnx.Nvidia.com>
On Monday 04 February 2013 08:04 PM, Peter De Schrijver wrote:
> On Mon, Feb 04, 2013 at 08:08:55AM +0100, Prashant Gaikwad wrote:
>> On Friday 01 February 2013 03:48 PM, Peter De Schrijver wrote:
> ...
>
>>> + /* xusb_hs_src */
>>> + val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
>>> + val |= BIT(25); /* always select PLLU_60M */
>>> + writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC);
>>> +
>>> + clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0,
>>> + 1, 1);
>>> + clks[xusb_hs_src] = clk;
>>> +
>> With device tree we can directly use pll_u_60M, no need to register
>> clock with fixed factor 1.
>> Same comment for dis1-fixed, dsi2-fixed and mipi-cal-fast clocks.
>>
> Does it make sense to have separate DT IDs at all then?
We can use same DT ID.
> Cheers,
>
> Peter.
next prev parent reply other threads:[~2013-02-05 5:42 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-01 10:18 [PATCH v5 00/10] Tegra114 clockframework Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 01/10] clk: tegra: Refactor PLL programming code Peter De Schrijver
2013-02-04 6:06 ` Prashant Gaikwad
2013-02-04 14:32 ` Peter De Schrijver
2013-02-05 5:42 ` Prashant Gaikwad
2013-02-05 13:23 ` Peter De Schrijver
2013-02-06 12:32 ` Peter De Schrijver
2013-02-04 21:57 ` Stephen Warren
2013-02-01 10:18 ` [PATCH v5 02/10] clk: tegra: Add TEGRA_PLL_BYPASS flag Peter De Schrijver
2013-02-04 6:13 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 03/10] clk: tegra: Add PLL post divider table Peter De Schrijver
2013-02-04 6:28 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114 Peter De Schrijver
2013-02-01 19:40 ` Rhyland Klein
2013-02-04 6:35 ` Prashant Gaikwad
2013-02-04 10:37 ` Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 05/10] clk: tegra: Add flags to tegra_clk_periph() Peter De Schrijver
2013-02-04 6:33 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 06/10] clk: tegra: Workaround for Tegra114 MSENC problem Peter De Schrijver
2013-02-04 6:39 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 07/10] ARM: tegra: Define Tegra114 CAR binding Peter De Schrijver
2013-02-04 21:16 ` Stephen Warren
2013-02-01 10:18 ` [PATCH v5 08/10] ARM: dt: Add references to tegra_car clocks Peter De Schrijver
2013-02-04 6:45 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114 Peter De Schrijver
2013-02-04 7:08 ` Prashant Gaikwad
2013-02-04 10:45 ` Peter De Schrijver
2013-02-04 14:07 ` Peter De Schrijver
2013-02-04 21:01 ` Stephen Warren
2013-02-07 16:18 ` Peter De Schrijver
2013-02-04 14:34 ` Peter De Schrijver
2013-02-05 5:36 ` Prashant Gaikwad [this message]
2013-02-01 10:18 ` [PATCH v5 10/10] clk: tegra: devicetree match for nvidia,tegra114-car Peter De Schrijver
2013-02-04 7:10 ` Prashant Gaikwad
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