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Date: Thu, 14 Feb 2013 16:36:08 +0530
From: Laxman Dewangan <ldewangan@nvidia.com>
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To: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Subject: Re: [PATCH 2/2] regmap: irq: do not write mask register if it is
 not supported
References: <1360761290-15976-1-git-send-email-ldewangan@nvidia.com> <1360761290-15976-2-git-send-email-ldewangan@nvidia.com> <20130213142036.GJ5062@opensource.wolfsonmicro.com>
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On Wednesday 13 February 2013 07:50 PM, Mark Brown wrote:
> *
>
>>   	for (i = 0; i < d->chip->num_regs; i++) {
>> +		if (!d->chip->mask_base)
>> +			goto skip_mask_reg_update;
>> +
> Why is this inside the loop?
>
> I'd also expect us to return an error if a caller tries to enable or
> disable an interrupt, or possibly to give different ops to the IRQ
> subsystem, rather than just silently claim we did what we were asked.

I tried to use regmap-irq for the gpio submodule and it has two sets of 
register:
GPIOx_CNFG: bit[7:6] interrupt rising/falling.
GPIO_INT_STS where each bit shows the interrupt status whether it 
occured or not.
There is no mask register.

In regmap-irq_thread() we see the interrupt status and compare against 
mask enable buffer wther this is enabled or not and accordingly call the 
handler.

hence I am still require irq_mask()/irq_unmask() to reflect the mask 
with interrupt status and type for actually configuring the GPIOx_CNFG.

if I remove the mask_buf at all then how do we tell the int_sts register 
is corresponding to which gpio handler?