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From: Sumit Gupta <sumitg@nvidia.com>
To: Jon Hunter <jonathanh@nvidia.com>, <rafael@kernel.org>,
	<viresh.kumar@linaro.org>, <robh+dt@kernel.org>,
	<krzk+dt@kernel.org>, <treding@nvidia.com>,
	<linux-pm@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <ksitaraman@nvidia.com>, <sanjayc@nvidia.com>, <bbasu@nvidia.com>,
	"Sumit Gupta" <sumitg@nvidia.com>
Subject: Re: [Patch v2 2/4] dt-bindings: arm: tegra: Add bindins for nvidia,tegra-ccplex-cluster
Date: Thu, 31 Mar 2022 13:28:20 +0530	[thread overview]
Message-ID: <512f17bd-b252-462e-ec2f-32983d92356d@nvidia.com> (raw)
In-Reply-To: <cfc6a2ac-1489-e221-f262-aab0ad5b701c@nvidia.com>



On 31/03/22 12:30, Jon Hunter wrote:
> Please update the subject to be something like ...
> 
> "dt-bindings: Document Tegra CCPLEX Cluster"
Ok. will do the change and send v3.

> 
> On 30/03/2022 15:38, Sumit Gupta wrote:
>> The Tegra CCPLEX_CLUSTER area contains memory-mapped
> 
> Here you have CCPLEX_CLUSTER and ...
> 
>> registers that initiate CPU frequency/voltage transitions.
>>
>> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
>> ---
>>   .../tegra/nvidia,tegra-ccplex-cluster.yaml    | 52 +++++++++++++++++++
>>   1 file changed, 52 insertions(+)
>>   create mode 100644 
>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml 
>>
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml 
>> b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml 
>>
>> new file mode 100644
>> index 000000000000..74afa06f695e
>> --- /dev/null
>> +++ 
>> b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml 
>>
>> @@ -0,0 +1,52 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: 
>> "https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Farm%2Ftegra%2Fnvidia%2Ctegra-ccplex-cluster.yaml%23&amp;data=04%7C01%7Csumitg%40nvidia.com%7C15234587dd2e46ad722108da12e42b88%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637843068437808995%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=tDheliQYxde7WJ5hqLYUz7dsq4tsUnFe3gHlaTRa7i4%3D&amp;reserved=0" 
>>
>> +$schema: 
>> "https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Csumitg%40nvidia.com%7C15234587dd2e46ad722108da12e42b88%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637843068437808995%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=%2BWDvqJkJKdG0z85Bfn%2F3AMejwHVvi02cVLarmKbZ0iE%3D&amp;reserved=0" 
>>
>> +
>> +title: NVIDIA Tegra CPU_CLUSTER area device tree bindings
> 
> ... here we have "CPU_CLUSTER" and ...
> 
>> +
>> +maintainers:
>> +  - Sumit Gupta <sumitg@nvidia.com>
>> +  - Mikko Perttunen <mperttunen@nvidia.com>
>> +  - Jon Hunter <jonathanh@nvidia.com>
>> +  - Thierry Reding <thierry.reding@gmail.com>
>> +
>> +description: |+
>> +  The Tegra CCPLEX_CLUSTER area contains memory-mapped
> 
> .. then we have CCPLEX_CLUSTER again. Let's have a consistent name such 
> as 'CPU COMPLEX CLUSTER' (admittedly a mouthful but that is what is 
> means). I don't think we need the '_' in the name.
Sure. will update all places to 'CPU COMPLEX CLUSTER' in v3.

> 
>> +  registers that initiate CPU frequency/voltage transitions.
>> +
>> +properties:
>> +  $nodename:
>> +    pattern: "ccplex@([0-9a-f]+)$"
>> +
>> +  compatible:
>> +    enum:
>> +      - nvidia,tegra186-ccplex-cluster
>> +      - nvidia,tegra234-ccplex-cluster
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  nvidia,bpmp:
>> +    $ref: '/schemas/types.yaml#/definitions/phandle'
>> +    description: |
>> +      Specifies the bpmp node that needs to be queried to get
> 
> s/bpmp/BPMP
> 
>> +      operating point data for all CPUs.
>> +
>> +additionalProperties: true
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - nvidia,bpmp
>> +  - status
>> +
>> +examples:
>> +  - |
>> +    ccplex@e000000 {
>> +      compatible = "nvidia,tegra234-ccplex-cluster";
>> +      reg = <0x0 0x0e000000 0x0 0x5ffff>;
>> +      nvidia,bpmp = <&bpmp>;
>> +      status = "okay";
>> +    };
> 

  reply	other threads:[~2022-03-31  7:58 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-30 14:38 [Patch v2 0/4] Tegra234 cpufreq driver support Sumit Gupta
2022-03-30 14:38 ` [Patch v2 1/4] cpufreq: tegra194: add soc data to support multiple soc Sumit Gupta
2022-03-30 14:38 ` [Patch v2 2/4] dt-bindings: arm: tegra: Add bindins for nvidia,tegra-ccplex-cluster Sumit Gupta
2022-03-31  0:50   ` Rob Herring
2022-03-31  0:53   ` Rob Herring
2022-03-31  7:00   ` Jon Hunter
2022-03-31  7:58     ` Sumit Gupta [this message]
2022-03-30 14:38 ` [Patch v2 3/4] arm64: tegra: add node for tegra234 cpufreq Sumit Gupta
2022-03-30 14:38 ` [Patch v2 4/4] cpufreq: tegra194: Add support for Tegra234 Sumit Gupta

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