Re: [PATCH v13 0/8] pv event interface between host and guest

Gleb Natapov
2013-03-04T11:53:04Z

On Mon, Mar 04, 2013 at 12:35:08PM +0100, Paolo Bonzini wrote:
> Il 04/03/2013 12:20, Gleb Natapov ha scritto:
> > On Mon, Mar 04, 2013 at 12:10:58PM +0100, Paolo Bonzini wrote:
> >>> It is additional device that
> >>> may or may not be present depending on a command line. So what if
> >>> someone configures debugcon or debugexit to use this port?
> >>
> >> I haven't checked if debug{con,exit} will pass the _STA test, but if
> >> they do, the user will get a Ctrl-A or respectively an exit of QEMU when
> >> the guest panics.
> >>
> >> What if someone configures debugcon on port 0x3f8? Some guest will use
> >> it, some will not.
> >>
> > Qemu should fail to start since conflict will be detected during
> > initialization.
>
> Not if you _remove_ the serial port and place debugcon at 0x3f8.
>
That will no longer be PIIX chipset. And still, if user will not use
"buggy" guest that assumes that serial is at 0x3f8 or she configures
guest to not use serial, everything will be fine.

> Same here, you can remove the panic event port and add debugcon at
> 0x505. That's the problematic case. But if the user goes to that
> length, I think we can honestly say we don't care.
IMO there is a big difference between well know serial ISA ports and
PIO ports we allocate for our devices. Later have to be discoverable
without resorting to probing. On CPU level we do the same with CPUID
bits instead of relaying on MSRs #GP. On KVM API level we do the same
with capabilities instead of relying on ioctls returning errors. This
is not different.

--
Gleb.