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From: John Stultz <john.stultz@linaro.org>
To: Feng Tang <feng.tang@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@elte.hu>,
	"H. Peter Anvin" <hpa@linux.intel.com>,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	x86@kernel.org, Len Brown <lenb@kernel.org>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	linux-kernel@vger.kernel.org, gong.chen@linux.intel.com
Subject: Re: [PATCH v4 1/4] x86: Add cpu capability flag X86_FEATURE_NONSTOP_TSC_S3
Date: Tue, 12 Mar 2013 14:14:12 -0700	[thread overview]
Message-ID: <513F9AA4.10005@linaro.org> (raw)
In-Reply-To: <1363060608-22657-2-git-send-email-feng.tang@intel.com>

On 03/11/2013 08:56 PM, Feng Tang wrote:
> On some new Intel Atom processors (Penwell and Cloverview), there is
> a feature that the TSC won't stop in S3 state, say the TSC value
> won't be reset to 0 after resume. This feature makes TSC a more reliable
> clocksource and could benefit the timekeeping code during system
> suspend/resume cycle, so add a flag for it.
>
> Signed-off-by: Feng Tang <feng.tang@intel.com>
> ---
>   arch/x86/include/asm/cpufeature.h |    1 +
>   arch/x86/kernel/cpu/intel.c       |   12 ++++++++++++
>   2 files changed, 13 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 93fe929..a8466f2 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -100,6 +100,7 @@
>   #define X86_FEATURE_AMD_DCM     (3*32+27) /* multi-node processor */
>   #define X86_FEATURE_APERFMPERF	(3*32+28) /* APERFMPERF */
>   #define X86_FEATURE_EAGER_FPU	(3*32+29) /* "eagerfpu" Non lazy FPU restore */
> +#define X86_FEATURE_NONSTOP_TSC_S3 (3*32+30) /* TSC doesn't stop in S3 state */
>   
>   /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
>   #define X86_FEATURE_XMM3	(4*32+ 0) /* "pni" SSE-3 */
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index 1905ce9..fe57544 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -96,6 +96,18 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
>   			sched_clock_stable = 1;
>   	}
>   
> +	/* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
> +	if (c->x86 == 6) {
> +		switch (c->x86_model) {
> +		case 0x27:	/* Penwell */
> +		case 0x35:	/* Cloverview */
> +			set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
> +			break;
> +		default:
> +			;

Just FYI, checkpatch.sh complains that this should be
     default:
         break;

I've gone ahead and fixed that, but you might be sure to run checkpatch 
in the future before submitting.

thanks
-john


  reply	other threads:[~2013-03-12 21:14 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-12  3:56 [PATCH v4 0/4] Add support for S3 non-stop TSC support Feng Tang
2013-03-12  3:56 ` [PATCH v4 1/4] x86: Add cpu capability flag X86_FEATURE_NONSTOP_TSC_S3 Feng Tang
2013-03-12 21:14   ` John Stultz [this message]
2013-03-12  3:56 ` [PATCH v4 2/4] clocksource: Add new feature flag CLOCK_SOURCE_SUSPEND_NONSTOP Feng Tang
2013-03-12  3:56 ` [PATCH v4 3/4] x86: tsc: Add support for new S3_NONSTOP feature Feng Tang
2013-03-12  3:56 ` [PATCH v4 4/4] timekeeping: utilize the suspend-nonstop clocksource to count suspended time Feng Tang
2013-03-12 21:09   ` John Stultz
2013-03-12 23:09     ` Feng Tang
2013-03-13 19:17 ` [PATCH v4 0/4] Add support for S3 non-stop TSC support John Stultz

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