From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935739Ab3DHTct (ORCPT ); Mon, 8 Apr 2013 15:32:49 -0400 Received: from carbon.coolservecorp.net ([184.82.167.18]:34554 "EHLO carbon.coolservecorp.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935574Ab3DHTcs (ORCPT ); Mon, 8 Apr 2013 15:32:48 -0400 Message-ID: <51631B12.2010908@grapecom.com> Date: Mon, 08 Apr 2013 22:31:30 +0300 From: Elijah Ragozin Organization: Grapecom User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130307 Thunderbird/17.0.4 MIME-Version: 1.0 To: Russell King , Jason Gunthorpe , Jason Cooper , Andrew Lunn CC: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Fwd: [PATCH RESEND v2 1/1] ARM Feroceon: fix kexec by setting outer_cache.inv_all References: <5150A8FF.7010301@grapecom.com> In-Reply-To: <5150A8FF.7010301@grapecom.com> X-Forwarded-Message-Id: <5150A8FF.7010301@grapecom.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - carbon.coolservecorp.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - grapecom.com X-Get-Message-Sender-Via: carbon.coolservecorp.net: authenticated_id: illia.ragozin+grapecom.com/only user confirmed/virtual account not confirmed Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Feroceon the L2 cache becomes non-coherent with the CPU when the L1 caches are disabled. Thus the L2 needs to be invalidated after both L1 caches are disabled. On kexec before the starting the code for relocation the kernel, the L1 caches are disabled in cpu_froc_fin (cpu_v7_proc_fin for Feroceon), but after L2 cache is never invalidated, because inv_all is not set in cache-feroceon-l2.c. So kernel relocation and decompression may has (and usually has) errors. Setting the function enables L2 invalidation and fixes the issue. Signed-off-by: Illia Ragozin --- arch/arm/mm/cache-feroceon-l2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index e0b0e7a..09f8851 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -342,6 +342,7 @@ void __init feroceon_l2_init(int __l2_wt_override) outer_cache.inv_range = feroceon_l2_inv_range; outer_cache.clean_range = feroceon_l2_clean_range; outer_cache.flush_range = feroceon_l2_flush_range; + outer_cache.inv_all = l2_inv_all; enable_l2(); -- 1.8.1.4