From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: Daniel Tang <dt.tangr@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
John Stultz <john.stultz@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCHv2] Add TI-Nspire timer support
Date: Tue, 04 Jun 2013 13:24:35 +0200 [thread overview]
Message-ID: <51ADCE73.3060802@linaro.org> (raw)
In-Reply-To: <347F9A91-70C0-4CD4-B0F6-C5E1DB0C3784@gmail.com>
On 06/04/2013 11:37 AM, Daniel Tang wrote:
>
> On 04/06/2013, at 7:36 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
>
>> On Sat, Jun 1, 2013 at 8:02 AM, Daniel Tang <dt.tangr@gmail.com> wrote:
>>
>>> The interrupt acknowledgement mechanism is a little strange because the interrupt mask and acknowledge registers are located in another memory mapped I/O peripheral. The address of this register is passed to the driver through device tree bindings.
>>
>> I can't see any linebreaks there. This looks horrible in git log.
>>
>> But I guess Daniel can fix it up directly in his tree.
>>
>
> Apologies, I can fix it up if it needs be.
It is ok, I already fixed it.
Thanks
-- Daniel
--
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prev parent reply other threads:[~2013-06-04 11:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-01 6:02 [PATCHv2] Add TI-Nspire timer support Daniel Tang
2013-06-03 8:44 ` Daniel Lezcano
2013-06-03 10:51 ` Daniel Tang
2013-06-04 9:36 ` Linus Walleij
2013-06-04 9:37 ` Daniel Tang
2013-06-04 11:24 ` Daniel Lezcano [this message]
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