* [RFC 00/50] ARM: at91: move to common clk framework
@ 2013-06-07 8:34 Boris BREZILLON
2013-06-07 8:34 ` [RFC 01/50] ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to include/linux/clk/at91.h Boris BREZILLON
` (11 more replies)
0 siblings, 12 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, linux-serial, linux-usb,
linux-fbdev, devicetree-discuss
Cc: Boris BREZILLON, linux-doc, linux-mmc
Hello,
This patch series is a proposal to move at91 clock implementation
to common clk framework.
Most of the clock provided by the PMC (Power Management Controller) are
implemented :
- main clock (main oscillator)
- pll clocks
- master clock
- programmable clocks
- utmi clock
- peripheral clocks
- system clocks
This implementation is compatible with device tree: the goal is
to define the whole clock tree in the device tree (all currently
available dt SoCs and boards are patched to support dt clocks).
Please feel free to comment the dt bindinds (I'm not sure about the
name I choose or the position of clock nodes: children of pmc node).
I removed the register_clocks function in SoC supporting dt boards only:
- at91sam9x5 SoCs
- at91sam9n12 SoC
- sama5d3 SoCs
This patch series also update at91 drivers calling clk_enable/disable
instead of the preferred clk_prepare_enable/disable_unprepare functions.
I know there are a lot of cleanup in progress for at91 arch, so please tell
me if you think this transition to common clk framework should wait.
This patch series has been tested on Kizbox (sam9g20 SoC) board using device
tree. It compiles for other SoCs and both with and without dt support, but it
has not been tested.
The clocks rate/parent change has not been tested.
Best Regards,
Boris
Boris BREZILLON (50):
ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to
include/linux/clk/at91.h
ARM: at91: add PMC main clock using common clk framework.
ARM: at91: add PMC pll clocks support using common clk framework.
ARM: at91: add PMC master clock support using common clk framework.
ARM: at91: add PMC system clocks support using common clk framework.
ARM: at91: add PMC peripheral clocks support using common clk
framework.
ARM: at91: add PMC programmable clocks support using common clk
framework.
ARM: at91: add PMC utmi clock support using common clk framework.
ARM: at91: add PMC usb clock support using common clk framework.
ARM: at91: add PMC smd clock support using common clk framework.
ARM: at91: add PMC clk device tree binding doc.
ARM: at91: move to common clk framework.
ARM: at91: move at91rm9200 SoC to common clk framework.
ARM: at91: move at91sam9260 SoC to common clk framework.
ARM: at91: move at91sam9263 SoC to common clk framework.
ARM: at91: move at91sam9263 SoC to common clk framework.
ARM: at91: move at91sam9g45 SoC to common clk framework.
ARM: at91: move at91sam9n12 SoC to common clk framework.
ARM: at91: move at91sam9rl SoC to common clk framework.
ARM: at91: move at91sam9x5 SoCs to common clk framework.
ARM: at91: move at91sam9 SoCs to common clk framework.
ARM: at91: move sama5d3 SoCs to common clk framework.
ARM: at91: move at91rm9200 non dt boards to common clk framework.
ARM: at91: move at91sam9 non dt boards to common clk framework.
ARM: at91: move pit timer to common clk framework.
ARM: at91/tc/clocksource: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
at_hdmac: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
ASoC: atmel-ssc: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
mmc: atmel-mci: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
pwm: atmel-tcb: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
tty: atmel_serial: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
usb: gadget: at91_udc: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
drivers/usb/host/ehci-atmel.c: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
USB: ohci-at91: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
ARM: at91/avr32/atmel_lcdfb: replace clk_enable/disable with
clk_prepare_enable/disable_unprepare.
ARM: at91/dt: move at91rm9200 SoC to clk framework.
ARM: at91/dt: move at91sam9260 SoC to common clk framework.
ARM: at91/dt: move at91sam9263 SoC to common clk framework.
ARM: at91/dt: move at91sam9g45 SoC to common clk framework.
ARM: at91/dt: move at91sam9n12 SoC to common clk framework.
ARM: at91/dt: move at91sam9x5 SoCs to common clk framework.
ARM: at91/dt: move at91sam9g20 SoC to common clk framework.
ARM: at91/dt: move sama5d3 SoCs to common clk framework.
ARM: at91/dt: move at91sam9260/sam9g20 boards to common clk
framework.
ARM: at91/dt: move at91rm9200 boards to common clk framework.
ARM: at91/dt: move at91sam9263 boards to common clk framework.
ARM: at91/dt: move at91sam9g45 boards to common clk framework.
ARM: at91/dt: move at91sam9n12 boards to common clk framework.
ARM: at91/dt: move at91sam9x5 boards to common clk framework.
ARM: at91/dt: move sama5d3 boards to common clk framework.
.../devicetree/bindings/clock/at91-clock.txt | 247 +++++
arch/arm/boot/dts/animeo_ip.dts | 17 +-
arch/arm/boot/dts/at91-ariag25.dts | 17 +-
arch/arm/boot/dts/at91rm9200.dtsi | 133 +++
arch/arm/boot/dts/at91rm9200ek.dts | 17 +-
arch/arm/boot/dts/at91sam9260.dtsi | 144 ++-
arch/arm/boot/dts/at91sam9263.dtsi | 135 +++
arch/arm/boot/dts/at91sam9263ek.dts | 17 +-
arch/arm/boot/dts/at91sam9g15.dtsi | 11 +
arch/arm/boot/dts/at91sam9g20.dtsi | 37 +
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 17 +-
arch/arm/boot/dts/at91sam9g25.dtsi | 3 +
arch/arm/boot/dts/at91sam9g35.dtsi | 23 +
arch/arm/boot/dts/at91sam9g45.dtsi | 157 ++++
arch/arm/boot/dts/at91sam9m10g45ek.dts | 17 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 153 ++++
arch/arm/boot/dts/at91sam9n12ek.dts | 17 +-
arch/arm/boot/dts/at91sam9x25.dtsi | 25 +-
arch/arm/boot/dts/at91sam9x35.dtsi | 3 +
arch/arm/boot/dts/at91sam9x5.dtsi | 226 +++--
arch/arm/boot/dts/at91sam9x5_can.dtsi | 24 +
arch/arm/boot/dts/at91sam9x5_isi.dtsi | 24 +
arch/arm/boot/dts/at91sam9x5_lcdc.dtsi | 32 +
arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 68 ++
arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 56 ++
arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 60 ++
arch/arm/boot/dts/ge863-pro3.dtsi | 16 +-
arch/arm/boot/dts/kizbox.dts | 5 +
arch/arm/boot/dts/mpa1600.dts | 16 +-
arch/arm/boot/dts/pm9g45.dts | 16 +-
arch/arm/boot/dts/sama5d3.dtsi | 358 ++++----
arch/arm/boot/dts/sama5d31ek.dts | 4 +
arch/arm/boot/dts/sama5d33ek.dts | 2 +
arch/arm/boot/dts/sama5d34ek.dts | 4 +
arch/arm/boot/dts/sama5d35ek.dts | 6 +
arch/arm/boot/dts/sama5d3_can.dtsi | 67 ++
arch/arm/boot/dts/sama5d3_emac.dtsi | 56 ++
arch/arm/boot/dts/sama5d3_gmac.dtsi | 89 ++
arch/arm/boot/dts/sama5d3_lcd.dtsi | 73 ++
arch/arm/boot/dts/sama5d3_mci2.dtsi | 59 ++
arch/arm/boot/dts/sama5d3_tcb1.dtsi | 39 +
arch/arm/boot/dts/sama5d3_uart.dtsi | 42 +
arch/arm/boot/dts/sama5d3xcm.dtsi | 17 +-
arch/arm/boot/dts/tny_a9260_common.dtsi | 17 +-
arch/arm/boot/dts/tny_a9263.dts | 17 +-
arch/arm/boot/dts/usb_a9260_common.dtsi | 17 +-
arch/arm/boot/dts/usb_a9263.dts | 17 +-
arch/arm/mach-at91/Kconfig | 26 +
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/at91rm9200.c | 578 +++++++-----
arch/arm/mach-at91/at91sam9260.c | 694 +++++++++-----
arch/arm/mach-at91/at91sam9261.c | 581 ++++++++----
arch/arm/mach-at91/at91sam9263.c | 599 +++++++-----
arch/arm/mach-at91/at91sam926x_time.c | 21 +-
arch/arm/mach-at91/at91sam9g45.c | 705 ++++++++------
arch/arm/mach-at91/at91sam9g45_devices.c | 1 -
arch/arm/mach-at91/at91sam9n12.c | 196 +---
arch/arm/mach-at91/at91sam9rl.c | 514 +++++++----
arch/arm/mach-at91/at91sam9x5.c | 291 +-----
arch/arm/mach-at91/board-1arm.c | 12 +-
arch/arm/mach-at91/board-afeb-9260v1.c | 11 +-
arch/arm/mach-at91/board-cam60.c | 13 +-
arch/arm/mach-at91/board-carmeva.c | 13 +-
arch/arm/mach-at91/board-cpu9krea.c | 12 +-
arch/arm/mach-at91/board-cpuat91.c | 12 +-
arch/arm/mach-at91/board-csb337.c | 11 +-
arch/arm/mach-at91/board-csb637.c | 11 +-
arch/arm/mach-at91/board-dt-rm9200.c | 9 +-
arch/arm/mach-at91/board-dt-sam9.c | 9 +-
arch/arm/mach-at91/board-dt-sama5.c | 9 +-
arch/arm/mach-at91/board-eb9200.c | 11 +-
arch/arm/mach-at91/board-ecbat91.c | 12 +-
arch/arm/mach-at91/board-eco920.c | 13 +-
arch/arm/mach-at91/board-flexibity.c | 12 +-
arch/arm/mach-at91/board-foxg20.c | 12 +-
arch/arm/mach-at91/board-gsia18s.c | 8 +-
arch/arm/mach-at91/board-kafa.c | 12 +-
arch/arm/mach-at91/board-kb9202.c | 12 +-
arch/arm/mach-at91/board-pcontrol-g20.c | 9 +-
arch/arm/mach-at91/board-picotux200.c | 11 +-
arch/arm/mach-at91/board-qil-a9260.c | 11 +-
arch/arm/mach-at91/board-rm9200dk.c | 11 +-
arch/arm/mach-at91/board-rm9200ek.c | 11 +-
arch/arm/mach-at91/board-rsi-ews.c | 12 +-
arch/arm/mach-at91/board-sam9-l9260.c | 11 +-
arch/arm/mach-at91/board-sam9260ek.c | 11 +-
arch/arm/mach-at91/board-sam9261ek.c | 15 +-
arch/arm/mach-at91/board-sam9263ek.c | 11 +-
arch/arm/mach-at91/board-sam9g20ek.c | 15 +-
arch/arm/mach-at91/board-sam9m10g45ek.c | 11 +-
arch/arm/mach-at91/board-sam9rlek.c | 11 +-
arch/arm/mach-at91/board-snapper9260.c | 12 +-
arch/arm/mach-at91/board-stamp9g20.c | 15 +-
arch/arm/mach-at91/board-yl-9200.c | 12 +-
arch/arm/mach-at91/clock.c | 961 --------------------
arch/arm/mach-at91/clock.h | 49 -
arch/arm/mach-at91/generic.h | 10 +-
arch/arm/mach-at91/pm.c | 2 +-
arch/arm/mach-at91/pm_slowclock.S | 2 +-
arch/arm/mach-at91/pmc.c | 58 ++
arch/arm/mach-at91/sama5d3.c | 344 +------
arch/arm/mach-at91/setup.c | 38 +-
arch/arm/mach-at91/stamp9g20.h | 2 +-
drivers/clk/Makefile | 1 +
drivers/clk/at91/Makefile | 11 +
drivers/clk/at91/clk-main.c | 106 +++
drivers/clk/at91/clk-master.c | 317 +++++++
drivers/clk/at91/clk-peripheral.c | 376 ++++++++
drivers/clk/at91/clk-pll.c | 438 +++++++++
drivers/clk/at91/clk-plldiv.c | 125 +++
drivers/clk/at91/clk-programmable.c | 370 ++++++++
drivers/clk/at91/clk-smd.c | 157 ++++
drivers/clk/at91/clk-system.c | 189 ++++
drivers/clk/at91/clk-usb.c | 303 ++++++
drivers/clk/at91/clk-utmi.c | 114 +++
drivers/clocksource/tcb_clksrc.c | 10 +-
drivers/dma/at_hdmac.c | 12 +-
drivers/misc/atmel-ssc.c | 8 +-
drivers/mmc/host/atmel-mci.c | 16 +-
drivers/pwm/pwm-atmel-tcb.c | 4 +-
drivers/tty/serial/atmel_serial.c | 35 +-
drivers/usb/gadget/at91_udc.c | 12 +-
drivers/usb/gadget/atmel_usba_udc.c | 2 +-
drivers/usb/host/ehci-atmel.c | 8 +-
drivers/usb/host/ohci-at91.c | 12 +-
drivers/video/atmel_lcdfb.c | 8 +-
.../mach/at91_pmc.h => include/linux/clk/at91.h | 122 ++-
127 files changed, 7588 insertions(+), 3862 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
create mode 100644 arch/arm/boot/dts/at91sam9x5_can.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9x5_isi.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9x5_lcdc.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9x5_macb0.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9x5_macb1.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9x5_usart3.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_can.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_emac.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_gmac.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_lcd.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_mci2.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_tcb1.dtsi
create mode 100644 arch/arm/boot/dts/sama5d3_uart.dtsi
delete mode 100644 arch/arm/mach-at91/clock.c
delete mode 100644 arch/arm/mach-at91/clock.h
create mode 100644 arch/arm/mach-at91/pmc.c
create mode 100644 drivers/clk/at91/Makefile
create mode 100644 drivers/clk/at91/clk-main.c
create mode 100644 drivers/clk/at91/clk-master.c
create mode 100644 drivers/clk/at91/clk-peripheral.c
create mode 100644 drivers/clk/at91/clk-pll.c
create mode 100644 drivers/clk/at91/clk-plldiv.c
create mode 100644 drivers/clk/at91/clk-programmable.c
create mode 100644 drivers/clk/at91/clk-smd.c
create mode 100644 drivers/clk/at91/clk-system.c
create mode 100644 drivers/clk/at91/clk-usb.c
create mode 100644 drivers/clk/at91/clk-utmi.c
rename arch/arm/mach-at91/include/mach/at91_pmc.h => include/linux/clk/at91.h (76%)
--
1.7.9.5
^ permalink raw reply [flat|nested] 16+ messages in thread
* [RFC 01/50] ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to include/linux/clk/at91.h
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 02/50] ARM: at91: add PMC main clock support using common clk framework Boris BREZILLON
` (10 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Andrew Victor, Felipe Balbi
Cc: Boris BREZILLON, Russell King, Greg Kroah-Hartman, linux-usb
This patch moves at91_pmc.h header from machine specific directory
(arch/arm/mach-at91/include/mach/at91_pmc.h) to clk include directory
(include/linux/clk/at91.h).
We need this to avoid reference to machine specific headers in clk
drivers.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
arch/arm/mach-at91/at91rm9200.c | 2 +-
arch/arm/mach-at91/at91sam9260.c | 2 +-
arch/arm/mach-at91/at91sam9261.c | 2 +-
arch/arm/mach-at91/at91sam9263.c | 2 +-
arch/arm/mach-at91/at91sam9g45.c | 2 +-
arch/arm/mach-at91/at91sam9n12.c | 2 +-
arch/arm/mach-at91/at91sam9rl.c | 2 +-
arch/arm/mach-at91/at91sam9x5.c | 2 +-
arch/arm/mach-at91/clock.c | 2 +-
arch/arm/mach-at91/pm.c | 2 +-
arch/arm/mach-at91/pm_slowclock.S | 2 +-
arch/arm/mach-at91/sama5d3.c | 2 +-
arch/arm/mach-at91/setup.c | 2 +-
drivers/usb/gadget/atmel_usba_udc.c | 2 +-
.../mach/at91_pmc.h => include/linux/clk/at91.h | 2 +-
15 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index d193a40..6ea6de7 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -11,13 +11,13 @@
*/
#include <linux/module.h>
+#include <linux/clk/at91.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91rm9200.h>
-#include <mach/at91_pmc.h>
#include <mach/at91_st.h>
#include <mach/cpu.h>
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index a8ce245..df32768 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,6 +11,7 @@
*/
#include <linux/module.h>
+#include <linux/clk/at91.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
@@ -20,7 +21,6 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9260.h>
-#include <mach/at91_pmc.h>
#include "at91_aic.h"
#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 25efb5a..8a63b81 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,6 +11,7 @@
*/
#include <linux/module.h>
+#include <linux/clk/at91.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
@@ -19,7 +20,6 @@
#include <asm/system_misc.h>
#include <mach/cpu.h>
#include <mach/at91sam9261.h>
-#include <mach/at91_pmc.h>
#include "at91_aic.h"
#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index f44ffd2..77b3c24 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,6 +11,7 @@
*/
#include <linux/module.h>
+#include <linux/clk/at91.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
@@ -18,7 +19,6 @@
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91sam9263.h>
-#include <mach/at91_pmc.h>
#include "at91_aic.h"
#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 8b7fce0..31a1304 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -12,13 +12,13 @@
#include <linux/module.h>
#include <linux/dma-mapping.h>
+#include <linux/clk/at91.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/at91sam9g45.h>
-#include <mach/at91_pmc.h>
#include <mach/cpu.h>
#include "at91_aic.h"
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 13cdbcd..f9ff4d2 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -8,12 +8,12 @@
#include <linux/module.h>
#include <linux/dma-mapping.h>
+#include <linux/clk/at91.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/at91sam9n12.h>
-#include <mach/at91_pmc.h>
#include <mach/cpu.h>
#include "board.h"
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index f77fae5..6fbda1a 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,6 +10,7 @@
*/
#include <linux/module.h>
+#include <linux/clk/at91.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
@@ -19,7 +20,6 @@
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
#include <mach/at91sam9rl.h>
-#include <mach/at91_pmc.h>
#include "at91_aic.h"
#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e631fec..83fc6b3 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -8,12 +8,12 @@
#include <linux/module.h>
#include <linux/dma-mapping.h>
+#include <linux/clk/at91.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/at91sam9x5.h>
-#include <mach/at91_pmc.h>
#include <mach/cpu.h>
#include "board.h"
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index da84188..191e9e4 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -24,9 +24,9 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/of_address.h>
+#include <linux/clk/at91.h>
#include <mach/hardware.h>
-#include <mach/at91_pmc.h>
#include <mach/cpu.h>
#include <asm/proc-fns.h>
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 530db30..d29702f 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -19,13 +19,13 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/io.h>
+#include <linux/clk/at91.h>
#include <asm/irq.h>
#include <linux/atomic.h>
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
-#include <mach/at91_pmc.h>
#include <mach/cpu.h>
#include "at91_aic.h"
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 098c28d..76387e0 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -13,8 +13,8 @@
*/
#include <linux/linkage.h>
+#include <linux/clk/at91.h>
#include <mach/hardware.h>
-#include <mach/at91_pmc.h>
#include <mach/at91_ramc.h>
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 4012797..32e0522 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -9,12 +9,12 @@
#include <linux/module.h>
#include <linux/dma-mapping.h>
+#include <linux/clk/at91.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/sama5d3.h>
-#include <mach/at91_pmc.h>
#include <mach/cpu.h>
#include "soc.h"
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index e2f4bdd..7af1bbf 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -11,6 +11,7 @@
#include <linux/pm.h>
#include <linux/of_address.h>
#include <linux/pinctrl/machine.h>
+#include <linux/clk/at91.h>
#include <asm/system_misc.h>
#include <asm/mach/map.h>
@@ -18,7 +19,6 @@
#include <mach/hardware.h>
#include <mach/cpu.h>
#include <mach/at91_dbgu.h>
-#include <mach/at91_pmc.h>
#include "at91_shdwc.h"
#include "soc.h"
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index f2a970f..846a363 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -328,7 +328,7 @@ static int vbus_is_present(struct usba_udc *udc)
#if defined(CONFIG_ARCH_AT91SAM9RL)
-#include <mach/at91_pmc.h>
+#include <linux/clk/at91.h>
static void toggle_bias(int is_on)
{
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/include/linux/clk/at91.h
similarity index 99%
rename from arch/arm/mach-at91/include/mach/at91_pmc.h
rename to include/linux/clk/at91.h
index 31df120..58b1eba 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/include/linux/clk/at91.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/mach-at91/include/mach/at91_pmc.h
+ * include/linux/clk/at91.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 02/50] ARM: at91: add PMC main clock support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
2013-06-07 8:34 ` [RFC 01/50] ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to include/linux/clk/at91.h Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 03/50] ARM: at91: add PMC pll clocks " Boris BREZILLON
` (9 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel
Cc: Boris BREZILLON
This is the at91 main oscillator clock implementation using common
clk framework.
If rate is not provided during clock registraction it is computed using
the slow clock (main clk parent in this case) rate and the MCFR register.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
drivers/clk/at91/Makefile | 5 ++
drivers/clk/at91/clk-main.c | 106 +++++++++++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 10 ++++
3 files changed, 121 insertions(+)
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
new file mode 100644
index 0000000..42c084e
--- /dev/null
+++ b/drivers/clk/at91/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for at91 specific clk
+#
+
+obj-y += clk-main.o
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
new file mode 100644
index 0000000..738fa39
--- /dev/null
+++ b/drivers/clk/at91/clk-main.c
@@ -0,0 +1,106 @@
+/*
+ * drivers/clk/at91/clk-main.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This mainram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define to_clk_main(hw) container_of(hw, struct clk_main, hw)
+struct clk_main {
+ struct clk_hw hw;
+ unsigned long rate;
+};
+
+static unsigned long clk_main_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ struct clk_main *clkmain = to_clk_main(hw);
+ if (clkmain->rate)
+ return clkmain->rate;
+ while ((tmp = at91_pmc_read(AT91_CKGR_MCFR)) & AT91_PMC_MAINRDY)
+ ;
+ tmp &= AT91_PMC_MAINF;
+ clkmain->rate = (tmp * parent_rate) / 16;
+ return clkmain->rate;
+}
+
+static const struct clk_ops main_ops = {
+ .recalc_rate = clk_main_recalc_rate,
+};
+
+struct clk * __init
+at91_clk_register_main(const char *name,
+ const char *parent_name,
+ unsigned long rate)
+{
+ struct clk_main *clkmain;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ if (!rate && !parent_name)
+ return ERR_PTR(-EINVAL);
+
+ clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
+ if (!clkmain)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &main_ops;
+ init.parent_names = parent_name ? &parent_name : NULL;
+ init.num_parents = parent_name ? 1 : 0;
+ init.flags = parent_name ? 0 : CLK_IS_ROOT;
+
+ clkmain->hw.init = &init;
+ clkmain->rate = rate;
+
+ clk = clk_register(NULL, &clkmain->hw);
+
+ if (IS_ERR(clk))
+ kfree(clkmain);
+
+ return clk;
+}
+
+
+
+#if defined(CONFIG_OF)
+static void __init
+of_at91_clk_main_setup(struct device_node *np)
+{
+ struct clk *clk;
+ const char *parent_name;
+ const char *name = np->name;
+ u32 rate = 0;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ of_property_read_string(np, "clock-output-names", &name);
+ of_property_read_u32(np, "clock-frequency", &rate);
+
+ clk = at91_clk_register_main(name, parent_name, rate);
+
+ if (!IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+
+static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
+{
+ of_at91_clk_main_setup(np);
+}
+CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
+ of_at91rm9200_clk_main_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index 58b1eba..c0801e7 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -16,6 +16,8 @@
#ifndef AT91_PMC_H
#define AT91_PMC_H
+#include <linux/clk-provider.h>
+
#ifndef __ASSEMBLY__
extern void __iomem *at91_pmc_base;
@@ -184,4 +186,12 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */
#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
+
+
+
+struct clk * __init
+at91_clk_register_main(const char *name,
+ const char *parent_name,
+ unsigned long rate);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 03/50] ARM: at91: add PMC pll clocks support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
2013-06-07 8:34 ` [RFC 01/50] ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to include/linux/clk/at91.h Boris BREZILLON
2013-06-07 8:34 ` [RFC 02/50] ARM: at91: add PMC main clock support using common clk framework Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 04/50] ARM: at91: add PMC master clock " Boris BREZILLON
` (8 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Grant Likely, Rob Herring
Cc: Boris BREZILLON, devicetree-discuss
This is the at91 pll clock implementation using common clk framework.
The pll clock layout describe the PLLX register layout.
There's four pll clock layouts:
- at91rm9200
- at91sam9g20
- at91sam9g45
- sama5d3
PLL clocks are given characteristics:
- min/max clock source rate
- ranges of valid clock output rates
- values to set in out and icpll fields for each supported output range
These characteristics are checked during rate change to avoid
over/underclocking.
These characteristics are described in atmel's SoC datasheet in
"Electrical Characteristics" paragraph.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-pll.c | 438 +++++++++++++++++++++++++++++++++++++++++
drivers/clk/at91/clk-plldiv.c | 125 ++++++++++++
include/linux/clk/at91.h | 39 ++++
4 files changed, 603 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 42c084e..564076f 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -2,4 +2,4 @@
# Makefile for at91 specific clk
#
-obj-y += clk-main.o
+obj-y += clk-main.o clk-pll.o clk-plldiv.o
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
new file mode 100644
index 0000000..d5dc0ac
--- /dev/null
+++ b/drivers/clk/at91/clk-pll.c
@@ -0,0 +1,438 @@
+/*
+ * drivers/clk/at91/clk-pll.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This pllram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
+
+struct clk_pll {
+ struct clk_hw hw;
+ u8 id;
+ u8 div;
+ u8 range;
+ u16 mul;
+ struct clk_pll_layout *layout;
+ struct clk_pll_characteristics *characteristics;
+};
+
+static int clk_pll_prepare(struct clk_hw *hw)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ while (!(at91_pmc_read(AT91_PMC_SR) &
+ (1 << (AT91_PMC_LOCKA + pll->id))))
+ ;
+ return 0;
+}
+
+static int clk_pll_is_prepared(struct clk_hw *hw)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ return !!(at91_pmc_read(AT91_PMC_SR) &
+ (1 << (AT91_PMC_LOCKA + pll->id)));
+}
+
+static int clk_pll_enable(struct clk_hw *hw)
+{
+ return 0;
+}
+
+static void clk_pll_disable(struct clk_hw *hw)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ struct clk_pll_layout *layout = pll->layout;
+ int offset = AT91_CKGR_PLLAR + (pll->id * 4);
+ u32 tmp = at91_pmc_read(offset) & ~(layout->pllr_mask);
+ at91_pmc_write(offset, tmp);
+}
+
+static int clk_pll_is_enabled(struct clk_hw *hw)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ return !!(at91_pmc_read(AT91_PMC_SR) &
+ (1 << (AT91_PMC_LOCKA + pll->id)));
+}
+
+static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ struct clk_pll_layout *layout = pll->layout;
+ int offset = AT91_CKGR_PLLAR + (pll->id * 4);
+ u32 tmp = at91_pmc_read(offset) & layout->pllr_mask;
+ u8 div = tmp & 0xFF;
+ u16 mul = (tmp >> layout->mul_shift) & layout->mul_mask;
+ if (!div || !mul)
+ return 0;
+
+ return (parent_rate * (mul + 1)) / div;
+}
+
+static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate,
+ unsigned long parent_rate,
+ u32 *div, u32 *mul,
+ u32 *index) {
+ unsigned long maxrate;
+ unsigned long minrate;
+ unsigned long divrate;
+ unsigned long bestdiv = 1;
+ unsigned long bestmul;
+ unsigned long tmpdiv;
+ unsigned long roundup;
+ unsigned long rounddown;
+ unsigned long remainder;
+ unsigned long bestremainder;
+ unsigned long maxmul;
+ unsigned long maxdiv;
+ unsigned long mindiv;
+ int i = 0;
+ struct clk_pll_layout *layout = pll->layout;
+ struct clk_pll_characteristics *characteristics = pll->characteristics;
+
+ /* Minimum divider = 1 */
+ /* Maximum multiplier = max_mul */
+ maxmul = layout->mul_mask + 1;
+ maxrate = (parent_rate * maxmul) / 1;
+
+ /* Maximum divider = max_div */
+ /* Minimum multiplier = 2 */
+ maxdiv = 0xFF;
+ minrate = (parent_rate * 2) / maxdiv;
+
+ if (parent_rate < characteristics->input.min ||
+ parent_rate < characteristics->input.max)
+ return -ERANGE;
+
+ if (parent_rate < minrate || parent_rate > maxrate)
+ return -ERANGE;
+
+ for (i = 0; i < characteristics->num_output; ++i) {
+ if (parent_rate >= characteristics->output[i].min &&
+ parent_rate <= characteristics->output[i].max)
+ break;
+ ++i;
+ }
+
+ if (i >= characteristics->num_output)
+ return -ERANGE;
+
+ bestmul = rate / parent_rate;
+ rounddown = parent_rate % rate;
+ roundup = rate - rounddown;
+ bestremainder = roundup < rounddown ? roundup : rounddown;
+
+ if (!bestremainder) {
+ if (div)
+ *div = bestdiv;
+ if (mul)
+ *mul = bestmul;
+ if (index)
+ *index = i;
+ return rate;
+ }
+
+ maxdiv = 255 / (bestmul + 1);
+ if (parent_rate / maxdiv < characteristics->input.min)
+ maxdiv = parent_rate / characteristics->input.min;
+ mindiv = parent_rate / characteristics->input.max;
+ if (parent_rate % characteristics->input.max)
+ mindiv++;
+
+ for (tmpdiv = mindiv; tmpdiv < maxdiv; tmpdiv++) {
+ divrate = parent_rate / tmpdiv;
+
+ rounddown = rate % divrate;
+ roundup = divrate - rounddown;
+ remainder = roundup < rounddown ? roundup : rounddown;
+
+ if (remainder < bestremainder) {
+ bestremainder = remainder;
+ bestmul = rate / divrate;
+ bestdiv = tmpdiv;
+ }
+
+ if (!remainder)
+ break;
+ }
+
+ rate = (parent_rate / bestdiv) * bestmul;
+
+ if (div)
+ *div = bestdiv;
+ if (mul)
+ *mul = bestmul;
+ if (index)
+ *index = i;
+
+ return rate;
+}
+
+static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ return clk_pll_get_best_div_mul(pll, rate, *parent_rate,
+ NULL, NULL, NULL);
+
+}
+
+static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ struct clk_pll_layout *layout = pll->layout;
+ struct clk_pll_characteristics *characteristics = pll->characteristics;
+ int offset = AT91_CKGR_PLLAR + (pll->id * 4);
+ long ret;
+ u32 div;
+ u32 mul;
+ u32 index;
+ u32 tmp;
+ u8 out = 0;
+ ret = clk_pll_get_best_div_mul(pll, rate, parent_rate,
+ &div, &mul, &index);
+
+ if (ret < 0)
+ return ret;
+
+ if (characteristics->out)
+ out = characteristics->out[pll->range];
+ if (characteristics->icpll) {
+ tmp = at91_pmc_read(AT91_PMC_PLLICPR) &
+ ~(0xFFFF << (16 * pll->id));
+ tmp |= characteristics->icpll[pll->range] << (16 * pll->id);
+ at91_pmc_write(AT91_PMC_PLLICPR, tmp);
+ }
+ tmp = at91_pmc_read(offset) & ~(layout->pllr_mask);
+ tmp |= layout->pllr_mask & (div | 0x3F << 8 | out << 14 |
+ (mul & layout->mul_mask) <<
+ layout->mul_shift);
+ at91_pmc_write(offset, tmp);
+
+ return 0;
+}
+
+static const struct clk_ops pll_ops = {
+ .prepare = clk_pll_prepare,
+ .is_prepared = clk_pll_is_prepared,
+ .enable = clk_pll_enable,
+ .disable = clk_pll_disable,
+ .is_enabled = clk_pll_is_enabled,
+ .recalc_rate = clk_pll_recalc_rate,
+ .round_rate = clk_pll_round_rate,
+ .set_rate = clk_pll_set_rate,
+};
+
+struct clk * __init
+at91_clk_register_pll(const char *name, const char *parent_name, u8 id,
+ struct clk_pll_layout *layout,
+ struct clk_pll_characteristics *characteristics)
+{
+ struct clk_pll *pll;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ id &= 3;
+
+ pll = kzalloc(sizeof(*pll), GFP_KERNEL);
+ if (!pll)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &pll_ops;
+ init.parent_names = parent_name ? &parent_name : NULL;
+ init.num_parents = parent_name ? 1 : 0;
+ init.flags = CLK_SET_RATE_GATE;
+
+ pll->id = id;
+ pll->hw.init = &init;
+ pll->layout = layout;
+ pll->characteristics = characteristics;
+
+ clk = clk_register(NULL, &pll->hw);
+
+ if (IS_ERR(clk))
+ kfree(pll);
+
+ return clk;
+}
+
+
+struct clk_pll_layout at91rm9200_pll_layout = {
+ .pllr_mask = 0x7FFFFFF,
+ .mul_shift = 16,
+ .mul_mask = 0x7FF,
+};
+
+struct clk_pll_layout at91sam9g45_pll_layout = {
+ .pllr_mask = 0xFFFFFF,
+ .mul_shift = 16,
+ .mul_mask = 0xFF,
+};
+
+struct clk_pll_layout at91sam9g20_pllb_layout = {
+ .pllr_mask = 0x3FFFFF,
+ .mul_shift = 16,
+ .mul_mask = 0x3F,
+};
+
+struct clk_pll_layout sama5d3_pll_layout = {
+ .pllr_mask = 0x1FFFFFF,
+ .mul_shift = 18,
+ .mul_mask = 0x7F,
+};
+
+
+#if defined(CONFIG_OF)
+static struct clk_pll_characteristics * __init
+of_at91_clk_pll_get_characteristics(struct device_node *np)
+{
+ int i;
+ u32 tmp;
+ int num_output;
+ struct clk_range *output = NULL;
+ u8 *out = NULL;
+ u16 *icpll = NULL;
+ struct clk_pll_characteristics *characteristics = NULL;
+ characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL);
+ if (!characteristics)
+ return NULL;
+
+ if (of_property_read_u32_index(np, "input", 0, &tmp))
+ goto out_free_characteristics;
+
+ characteristics->input.min = tmp;
+
+ if (of_property_read_u32_index(np, "input", 1, &tmp))
+ goto out_free_characteristics;
+
+ characteristics->input.max = tmp;
+
+ if (!of_get_property(np, "output", &num_output))
+ goto out_free_characteristics;
+ num_output /= (sizeof(u32) * 2);
+
+ output = kzalloc(sizeof(*output) * num_output, GFP_KERNEL);
+ for (i = 0; i < num_output; i++) {
+ if (of_property_read_u32_index(np, "output", i * 2, &tmp))
+ goto out_free_output;
+ output[i].min = tmp;
+ if (of_property_read_u32_index(np, "output", (i * 2) + 1, &tmp))
+ goto out_free_output;
+ output[i].max = tmp;
+ }
+
+ if (of_get_property(np, "out", NULL)) {
+ out = kzalloc(sizeof(*out) * num_output, GFP_KERNEL);
+ if (!out)
+ goto out_free_output;
+ for (i = 0; i < num_output; i++) {
+ if (of_property_read_u32_index(np, "out", i, &tmp))
+ goto out_free_out;
+ out[i] = tmp;
+ }
+ }
+
+ if (of_get_property(np, "icpll", NULL)) {
+ icpll = kzalloc(sizeof(*icpll) * num_output, GFP_KERNEL);
+ if (!icpll)
+ goto out_free_out;
+ for (i = 0; i < num_output; i++) {
+ if (of_property_read_u32_index(np, "icpll", i, &tmp))
+ goto out_free_icpll;
+ icpll[i] = tmp;
+ }
+ }
+
+ characteristics->num_output = num_output;
+ characteristics->output = output;
+ characteristics->out = out;
+ characteristics->icpll = icpll;
+ return characteristics;
+
+out_free_icpll:
+ kfree(icpll);
+out_free_out:
+ kfree(out);
+out_free_output:
+ kfree(output);
+out_free_characteristics:
+ kfree(characteristics);
+ return NULL;
+}
+
+static void __init
+of_at91_clk_pll_setup(struct device_node *np,
+ struct clk_pll_layout *layout)
+{
+ u32 id;
+ struct clk *clk;
+ const char *parent_name;
+ const char *name = np->name;
+ struct clk_pll_characteristics *characteristics;
+
+ if (of_property_read_u32(np, "id", &id))
+ return;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ characteristics = of_at91_clk_pll_get_characteristics(np);
+ if (!characteristics)
+ return;
+
+ clk = at91_clk_register_pll(name, parent_name, id, layout,
+ characteristics);
+
+ if (IS_ERR(clk))
+ goto out_free_characteristics;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+ return;
+
+out_free_characteristics:
+ kfree(characteristics);
+}
+
+static void __init of_at91rm9200_clk_pll_setup(struct device_node *np)
+{
+ of_at91_clk_pll_setup(np, &at91rm9200_pll_layout);
+}
+CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll",
+ of_at91rm9200_clk_pll_setup);
+
+static void __init of_at91sam9g45_clk_pll_setup(struct device_node *np)
+{
+ of_at91_clk_pll_setup(np, &at91sam9g45_pll_layout);
+}
+CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll",
+ of_at91sam9g45_clk_pll_setup);
+
+static void __init of_at91sam9g20_clk_pllb_setup(struct device_node *np)
+{
+ of_at91_clk_pll_setup(np, &at91sam9g20_pllb_layout);
+}
+CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb",
+ of_at91sam9g20_clk_pllb_setup);
+
+static void __init of_sama5d3_clk_pll_setup(struct device_node *np)
+{
+ of_at91_clk_pll_setup(np, &sama5d3_pll_layout);
+}
+CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll",
+ of_sama5d3_clk_pll_setup);
+#endif
diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c
new file mode 100644
index 0000000..430de9b
--- /dev/null
+++ b/drivers/clk/at91/clk-plldiv.c
@@ -0,0 +1,125 @@
+/*
+ * drivers/clk/at91/clk-plldiv.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This plldivram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define to_clk_plldiv(hw) container_of(hw, struct clk_plldiv, hw)
+
+struct clk_plldiv {
+ struct clk_hw hw;
+};
+
+static unsigned long clk_plldiv_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ if (at91_pmc_read(AT91_PMC_MCKR) & AT91_PMC_PLLADIV2)
+ return parent_rate / 2;
+ return parent_rate;
+}
+
+static long clk_plldiv_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ unsigned long div;
+ if (rate > *parent_rate)
+ return *parent_rate;
+ div = *parent_rate / 2;
+ if (rate < div)
+ return div;
+
+ if (rate - div < *parent_rate - rate)
+ return div;
+
+ return *parent_rate;
+}
+
+static int clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ if (parent_rate != rate && (parent_rate / 2) != rate)
+ return -EINVAL;
+
+ tmp = at91_pmc_read(AT91_PMC_MCKR) & ~AT91_PMC_PLLADIV2;
+ if ((parent_rate / 2) == rate)
+ tmp |= AT91_PMC_PLLADIV2;
+ at91_pmc_write(AT91_PMC_MCKR, tmp);
+
+ return 0;
+}
+
+static const struct clk_ops plldiv_ops = {
+ .recalc_rate = clk_plldiv_recalc_rate,
+ .round_rate = clk_plldiv_round_rate,
+ .set_rate = clk_plldiv_set_rate,
+};
+
+struct clk * __init
+at91_clk_register_plldiv(const char *name, const char *parent_name)
+{
+ struct clk_plldiv *plldiv;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
+ if (!plldiv)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &plldiv_ops;
+ init.parent_names = parent_name ? &parent_name : NULL;
+ init.num_parents = parent_name ? 1 : 0;
+ init.flags = CLK_SET_RATE_GATE;
+
+ plldiv->hw.init = &init;
+
+ clk = clk_register(NULL, &plldiv->hw);
+
+ if (IS_ERR(clk))
+ kfree(plldiv);
+
+ return clk;
+}
+
+#if defined(CONFIG_OF)
+static void __init
+of_at91_clk_plldiv_setup(struct device_node *np)
+{
+ struct clk *clk;
+ const char *parent_name;
+ const char *name = np->name;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ clk = at91_clk_register_plldiv(name, parent_name);
+
+ if (IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+ return;
+}
+
+static void __init of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
+{
+ of_at91_clk_plldiv_setup(np);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
+ of_at91sam9x5_clk_plldiv_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index c0801e7..7ba038f 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -163,6 +163,8 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */
#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */
+#define AT91_PMC_PLLICPR 0x80 /* PLL Charge Pump Current Register */
+
#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */
#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */
@@ -187,6 +189,26 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
+struct clk_range {
+ unsigned long min;
+ unsigned long max;
+};
+
+#define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}
+
+struct clk_pll_characteristics {
+ struct clk_range input;
+ int num_output;
+ struct clk_range *output;
+ u16 *icpll;
+ u8 *out;
+};
+
+struct clk_pll_layout {
+ u32 pllr_mask;
+ u16 mul_mask;
+ u8 mul_shift;
+};
struct clk * __init
@@ -194,4 +216,21 @@ at91_clk_register_main(const char *name,
const char *parent_name,
unsigned long rate);
+
+extern struct clk_pll_layout at91rm9200_pll_layout;
+
+extern struct clk_pll_layout at91sam9g45_pll_layout;
+
+extern struct clk_pll_layout at91sam9g20_pllb_layout;
+
+extern struct clk_pll_layout sama5d3_pll_layout;
+
+struct clk * __init
+at91_clk_register_pll(const char *name, const char *parent_name, u8 id,
+ struct clk_pll_layout *layout,
+ struct clk_pll_characteristics *characteristics);
+
+struct clk * __init
+at91_clk_register_plldiv(const char *name, const char *parent_name);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 04/50] ARM: at91: add PMC master clock support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (2 preceding siblings ...)
2013-06-07 8:34 ` [RFC 03/50] ARM: at91: add PMC pll clocks " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 05/50] ARM: at91: add PMC system clocks " Boris BREZILLON
` (7 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel
Cc: Boris BREZILLON
This is the at91 master clock implementation using common clk framework.
The pll clock layout describe the MCKR register layout.
There's four pll clock layouts:
- at91rm9200
- at91sam9x5
Master clocks are given characteristics:
- min/max clock output rate
These characteristics are checked during rate change to avoid
over/underclocking.
These characteristics are described in atmel's SoC datasheet in
"Electrical Characteristics" paragraph.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-master.c | 317 +++++++++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 23 +++
3 files changed, 341 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 564076f..d41f616 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -2,4 +2,4 @@
# Makefile for at91 specific clk
#
-obj-y += clk-main.o clk-pll.o clk-plldiv.o
+obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
new file mode 100644
index 0000000..71ade7d
--- /dev/null
+++ b/drivers/clk/at91/clk-master.c
@@ -0,0 +1,317 @@
+/*
+ * drivers/clk/at91/clk-master.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This masterram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define MASTER_SOURCE_MAX 4
+
+#define to_clk_master(hw) container_of(hw, struct clk_master, hw)
+
+struct clk_master {
+ struct clk_hw hw;
+ struct clk_master_layout *layout;
+ struct clk_master_characteristics *characteristics;
+};
+
+static unsigned long clk_master_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ u8 pres;
+ u8 div;
+ unsigned long rate = parent_rate;
+ struct clk_master *master = to_clk_master(hw);
+ struct clk_master_layout *layout = master->layout;
+ struct clk_master_characteristics *characteristics =
+ master->characteristics;
+ u32 tmp = at91_pmc_read(AT91_PMC_MCKR) & layout->mask;
+
+ pres = (tmp >> layout->pres_shift) & 0x7;
+ div = (tmp >> 8) & 0x3;
+
+ if (characteristics->have_div3_pres && pres == 7)
+ rate /= 3;
+ else
+ rate >>= pres;
+
+ rate /= characteristics->divisors[div];
+
+ /* print overclocking or underclocking error */
+ /*
+ if (rate < characteristics->output.min ||
+ rate > characteristics->output.max) {
+ }
+ */
+ return rate;
+}
+
+static long clk_master_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ int mdiv;
+ int pres;
+ u32 div;
+ long best_rate = -EINVAL;
+ unsigned long best_diff = 0;
+ unsigned long cur_diff;
+ unsigned long pres_rate;
+ unsigned long cur_rate;
+ struct clk_master *master = to_clk_master(hw);
+ struct clk_master_characteristics *characteristics =
+ master->characteristics;
+
+ if (rate < characteristics->output.min ||
+ rate > characteristics->output.max)
+ return -EINVAL;
+
+ for (pres = 0; pres < 7; pres++) {
+ if (pres < 7)
+ pres_rate = *parent_rate >> pres;
+ else {
+ if (!characteristics->have_div3_pres)
+ break;
+ pres_rate = *parent_rate / 3;
+ }
+ for (mdiv = 0; mdiv < 4; mdiv++) {
+ div = characteristics->divisors[mdiv];
+ if (!div)
+ continue;
+ cur_rate = pres_rate / div;
+ if (rate < cur_rate)
+ cur_diff = cur_rate - rate;
+ else
+ cur_diff = rate - cur_rate;
+
+ if (best_rate < 0 || cur_diff < best_diff) {
+ best_rate = cur_rate;
+ best_diff = cur_diff;
+ if (!best_diff)
+ return best_rate;
+ }
+ }
+ }
+
+ return best_rate;
+}
+
+static int clk_master_set_parent(struct clk_hw *hw, u8 index)
+{
+ u32 tmp;
+ if (index > AT91_PMC_CSS)
+ return -EINVAL;
+ tmp = at91_pmc_read(AT91_PMC_MCKR) & ~AT91_PMC_CSS;
+ tmp |= index;
+
+ at91_pmc_write(AT91_PMC_MCKR, tmp);
+ while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_MCKRDY))
+ ;
+ return 0;
+}
+
+static u8 clk_master_get_parent(struct clk_hw *hw)
+{
+ return at91_pmc_read(AT91_PMC_MCKR) & AT91_PMC_CSS;
+}
+
+static int clk_master_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ int mdiv;
+ int pres;
+ u32 div;
+ u32 tmp;
+ unsigned long cur_rate;
+ unsigned long pres_rate;
+ struct clk_master *master = to_clk_master(hw);
+ struct clk_master_layout *layout = master->layout;
+ struct clk_master_characteristics *characteristics =
+ master->characteristics;
+ for (pres = 0; pres < 7; pres++) {
+ if (pres < 7)
+ pres_rate = parent_rate >> pres;
+ else {
+ if (!characteristics->have_div3_pres)
+ break;
+ pres_rate = parent_rate / 3;
+ }
+ for (mdiv = 0; mdiv < 4; mdiv++) {
+ div = characteristics->divisors[mdiv];
+ if (!div)
+ continue;
+ cur_rate = pres_rate / div;
+ if (cur_rate == rate) {
+ tmp = at91_pmc_read(AT91_PMC_MCKR);
+ tmp &= layout->mask;
+ tmp &= ~AT91_PMC_CSS;
+ tmp |= pres << layout->pres_shift | mdiv << 8;
+
+ at91_pmc_write(AT91_PMC_MCKR, tmp);
+ while (!(at91_pmc_read(AT91_PMC_SR) &
+ AT91_PMC_MCKRDY))
+ ;
+ return 0;
+ }
+ }
+ }
+
+ return -EINVAL;
+}
+
+static const struct clk_ops master_ops = {
+ .recalc_rate = clk_master_recalc_rate,
+ .round_rate = clk_master_round_rate,
+ .get_parent = clk_master_get_parent,
+ .set_parent = clk_master_set_parent,
+ .set_rate = clk_master_set_rate,
+};
+
+struct clk * __init
+at91_clk_register_master(const char *name,
+ int num_parents,
+ const char **parent_names,
+ struct clk_master_layout *layout,
+ struct clk_master_characteristics *characteristics)
+{
+ struct clk_master *master;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ master = kzalloc(sizeof(*master), GFP_KERNEL);
+ if (!master)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &master_ops;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+ init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+ master->hw.init = &init;
+ master->layout = layout;
+ master->characteristics = characteristics;
+
+ clk = clk_register(NULL, &master->hw);
+
+ if (IS_ERR(clk))
+ kfree(master);
+
+ return clk;
+}
+
+
+struct clk_master_layout at91rm9200_master_layout = {
+ .mask = 0x31F,
+ .pres_shift = 2,
+};
+
+struct clk_master_layout at91sam9x5_master_layout = {
+ .mask = 0x373,
+ .pres_shift = 4,
+};
+
+
+#if defined(CONFIG_OF)
+static struct clk_master_characteristics * __init
+of_at91_clk_master_get_characteristics(struct device_node *np)
+{
+ int i;
+ u32 tmp;
+ struct clk_master_characteristics *characteristics = NULL;
+
+ characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL);
+ if (!characteristics)
+ return NULL;
+
+ if (of_property_read_u32_index(np, "output", 0, &tmp))
+ goto out_free_characteristics;
+
+ characteristics->output.min = tmp;
+
+ if (of_property_read_u32_index(np, "output", 1, &tmp))
+ goto out_free_characteristics;
+
+ characteristics->output.max = tmp;
+
+ for (i = 0; i < 4; i++) {
+ tmp = 0;
+ of_property_read_u32_index(np, "divisors", i, &tmp);
+ characteristics->divisors[i] = tmp;
+ }
+
+ characteristics->have_div3_pres =
+ of_property_read_bool(np, "have-div3-pres");
+
+ return characteristics;
+
+out_free_characteristics:
+ kfree(characteristics);
+ return NULL;
+}
+
+static void __init
+of_at91_clk_master_setup(struct device_node *np,
+ struct clk_master_layout *layout)
+{
+ struct clk *clk;
+ int num_parents;
+ int i;
+ const char *parent_names[MASTER_SOURCE_MAX];
+ const char *name = np->name;
+ struct clk_master_characteristics *characteristics;
+
+ num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+ if (num_parents <= 0 || num_parents > MASTER_SOURCE_MAX)
+ return;
+
+ for (i = 0; i < num_parents; ++i) {
+ parent_names[i] = of_clk_get_parent_name(np, i);
+ if (!parent_names[i])
+ return;
+ }
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ characteristics = of_at91_clk_master_get_characteristics(np);
+ if (!characteristics)
+ return;
+
+ clk = at91_clk_register_master(name, num_parents, parent_names,
+ layout, characteristics);
+
+ if (IS_ERR(clk))
+ goto out_free_characteristics;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+ return;
+
+out_free_characteristics:
+ kfree(characteristics);
+}
+
+static void __init of_at91rm9200_clk_master_setup(struct device_node *np)
+{
+ of_at91_clk_master_setup(np, &at91rm9200_master_layout);
+}
+CLK_OF_DECLARE(at91rm9200_clk_master, "atmel,at91rm9200-clk-master",
+ of_at91rm9200_clk_master_setup);
+
+static void __init of_at91sam9x5_clk_master_setup(struct device_node *np)
+{
+ of_at91_clk_master_setup(np, &at91sam9x5_master_layout);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_master, "atmel,at91sam9x5-clk-master",
+ of_at91sam9x5_clk_master_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index 7ba038f..a960e2f 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -210,6 +210,17 @@ struct clk_pll_layout {
u8 mul_shift;
};
+struct clk_master_characteristics {
+ struct clk_range output;
+ u32 divisors[4];
+ u8 have_div3_pres;
+};
+
+struct clk_master_layout {
+ u32 mask;
+ u8 pres_shift;
+};
+
struct clk * __init
at91_clk_register_main(const char *name,
@@ -233,4 +244,16 @@ at91_clk_register_pll(const char *name, const char *parent_name, u8 id,
struct clk * __init
at91_clk_register_plldiv(const char *name, const char *parent_name);
+
+extern struct clk_master_layout at91rm9200_master_layout;
+
+extern struct clk_master_layout at91sam9x5_master_layout;
+
+struct clk * __init
+at91_clk_register_master(const char *name, int num_parents,
+ const char **parent_names,
+ struct clk_master_layout *layout,
+ struct clk_master_characteristics *characteristics);
+
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 05/50] ARM: at91: add PMC system clocks support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (3 preceding siblings ...)
2013-06-07 8:34 ` [RFC 04/50] ARM: at91: add PMC master clock " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 06/50] ARM: at91: add PMC peripheral " Boris BREZILLON
` (6 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Grant Likely, Rob Herring
Cc: Boris BREZILLON, devicetree-discuss
This is the at91 system clock implementation using common clk framework.
Some peripheral needs to enable a "system" clock in order to work properly.
Each system clock is given an id which is the bit offset used in SCER/SCDR
registers.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-system.c | 189 +++++++++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 3 +
3 files changed, 193 insertions(+)
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index d41f616..13e5714 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -3,3 +3,4 @@
#
obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
+obj-y += clk-system.o
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
new file mode 100644
index 0000000..21af468
--- /dev/null
+++ b/drivers/clk/at91/clk-system.c
@@ -0,0 +1,189 @@
+/*
+ * drivers/clk/at91/clk-system.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define SYSTEM_MAX 32
+
+#define to_clk_system(hw) container_of(hw, struct clk_system, hw)
+struct clk_system {
+ struct clk_hw hw;
+ u8 id;
+};
+
+static int clk_system_enable(struct clk_hw *hw)
+{
+ struct clk_system *sys = to_clk_system(hw);
+ at91_pmc_write(AT91_PMC_SCER, sys->id);
+ return 0;
+}
+
+static void clk_system_disable(struct clk_hw *hw)
+{
+ struct clk_system *sys = to_clk_system(hw);
+ at91_pmc_write(AT91_PMC_SCDR, 1 << sys->id);
+}
+
+static int clk_system_is_enabled(struct clk_hw *hw)
+{
+ struct clk_system *sys = to_clk_system(hw);
+ return !!(at91_pmc_read(AT91_PMC_SCSR) & (sys->id));
+}
+
+static const struct clk_ops system_ops = {
+ .enable = clk_system_enable,
+ .disable = clk_system_disable,
+ .is_enabled = clk_system_is_enabled,
+};
+
+struct clk * __init
+at91_clk_register_system(const char *name, const char *parent_name, u8 id)
+{
+ struct clk_system *sys;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ id &= 31;
+
+ sys = kzalloc(sizeof(*sys), GFP_KERNEL);
+ if (!sys)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &system_ops;
+ init.parent_names = (parent_name ? &parent_name : NULL);
+ init.num_parents = (parent_name ? 1 : 0);
+ init.flags = 0;
+
+ sys->id = id;
+ sys->hw.init = &init;
+
+ clk = clk_register(NULL, &sys->hw);
+
+ if (IS_ERR(clk))
+ kfree(sys);
+
+ return clk;
+}
+
+#if defined(CONFIG_OF)
+struct clk_system_data {
+ struct clk **clks;
+ u8 *ids;
+ unsigned int clk_num;
+};
+
+static struct clk * __init
+of_clk_src_system_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct clk_system_data *clk_data = data;
+ unsigned int id = clkspec->args[0];
+ int i;
+
+ if (id >= SYSTEM_MAX)
+ goto err;
+
+ for (i = 0; i < clk_data->clk_num; i++) {
+ if (clk_data->ids[i] == id)
+ return clk_data->clks[i];
+ }
+
+err:
+ pr_err("%s: invalid clock id %d\n", __func__, id);
+ return ERR_PTR(-EINVAL);
+}
+
+static void __init
+of_at91_clk_sys_setup(struct device_node *np)
+{
+ int i;
+ int num;
+ u32 id;
+ struct clk *clk;
+ u8 *ids;
+ struct clk **clks;
+ struct clk_system_data *clktab;
+ const char *parent_name;
+ const char *name = np->name;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ if (!parent_name)
+ return;
+
+ if (!of_get_property(np, "ids", &num))
+ return;
+ num /= 4;
+ if (num > SYSTEM_MAX)
+ return;
+
+ if (of_count_phandle_with_args(np, "clocks", "#clock-cells") != num)
+ return;
+
+ if (of_property_count_strings(np, "clock-output-names") != num)
+ return;
+
+ clktab = kzalloc(sizeof(*clktab), GFP_KERNEL);
+ if (!clktab)
+ return;
+
+ ids = kzalloc(num * sizeof(*ids), GFP_KERNEL);
+ if (!ids)
+ goto out_free_clktab;
+
+ clks = kzalloc(num * sizeof(*clks), GFP_KERNEL);
+ if (!clks)
+ goto out_free_ids;
+
+ for (i = 0; i < num; i++) {
+ of_property_read_u32_index(np, "ids", i, &id);
+ if (id >= SYSTEM_MAX)
+ goto out_free_clks;
+ of_property_read_string_index(np, "clock-output-names",
+ i, &name);
+ parent_name = of_clk_get_parent_name(np, i);
+ if (!parent_name)
+ goto out_free_clks;
+
+ clk = at91_clk_register_system(name, parent_name, id);
+ if (IS_ERR(clk))
+ goto out_free_clks;
+
+ clks[i] = clk;
+ ids[i] = id;
+ }
+
+ clktab->clk_num = num;
+ clktab->clks = clks;
+ clktab->ids = ids;
+ of_clk_add_provider(np, of_clk_src_system_get, clktab);
+ return;
+
+out_free_clks:
+ kfree(clks);
+out_free_ids:
+ kfree(ids);
+out_free_clktab:
+ kfree(clktab);
+}
+
+static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
+{
+ of_at91_clk_sys_setup(np);
+}
+CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",
+ of_at91rm9200_clk_sys_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index a960e2f..c886226 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -256,4 +256,7 @@ at91_clk_register_master(const char *name, int num_parents,
struct clk_master_characteristics *characteristics);
+struct clk * __init
+at91_clk_register_system(const char *name, const char *parent_name, u8 id);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 06/50] ARM: at91: add PMC peripheral clocks support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (4 preceding siblings ...)
2013-06-07 8:34 ` [RFC 05/50] ARM: at91: add PMC system clocks " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 07/50] ARM: at91: add PMC programmable " Boris BREZILLON
` (5 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Grant Likely, Rob Herring
Cc: Boris BREZILLON, devicetree-discuss
This is the at91 peripheral clock implementation using common clk framework.
Almost all peripherals provided by an at91 SoC need a clock to work properly.
This clock is enabled/disabled using PCER/PCDR resgisters.
Each peripheral is given an id (see atmel's datasheets) which is used as bit
position in SCER/SCDR registers.
Some new SoCs (at91sam9x5 and sama5d3) provide a new register (PCR) where you
can configure the peripheral clock as a division of the master clock.
This will help reducing the peripherals power comsumption.
This patch fixes erronous AT91_PMC_PCR_DIV values.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-peripheral.c | 376 +++++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 14 +-
3 files changed, 388 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 13e5714..3e2a670 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -3,4 +3,4 @@
#
obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
-obj-y += clk-system.o
+obj-y += clk-system.o clk-peripheral.o
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
new file mode 100644
index 0000000..2fc66b9
--- /dev/null
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -0,0 +1,376 @@
+/*
+ * drivers/clk/at91/clk-peripheral.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define PERIPHERAL_MAX 64
+
+#define PERIPHERAL_AT91RM9200 0
+#define PERIPHERAL_AT91SAM9X5 1
+
+#define to_clk_peripheral(hw) container_of(hw, struct clk_peripheral, hw)
+struct clk_peripheral {
+ struct clk_hw hw;
+ u32 id;
+};
+
+#define to_clk_sam9x5_peripheral(hw) \
+ container_of(hw, struct clk_sam9x5_peripheral, hw)
+struct clk_sam9x5_peripheral {
+ struct clk_hw hw;
+ u32 id;
+ u8 div;
+ u8 have_div_support;
+};
+
+static int clk_peripheral_enable(struct clk_hw *hw)
+{
+ struct clk_peripheral *periph = to_clk_peripheral(hw);
+ int offset = AT91_PMC_PCER;
+ if (periph->id < 2)
+ return 0;
+ if (periph->id > 31)
+ offset = AT91_PMC_PCER1;
+ at91_pmc_write(offset, 1 << (periph->id & 31));
+ return 0;
+}
+
+static void clk_peripheral_disable(struct clk_hw *hw)
+{
+ struct clk_peripheral *periph = to_clk_peripheral(hw);
+ int offset = AT91_PMC_PCDR;
+ if (periph->id < 2)
+ return;
+ if (periph->id > 31)
+ offset = AT91_PMC_PCDR1;
+ at91_pmc_write(offset, 1 << (periph->id & 31));
+}
+
+static int clk_peripheral_is_enabled(struct clk_hw *hw)
+{
+ struct clk_peripheral *periph = to_clk_peripheral(hw);
+ int offset = AT91_PMC_PCSR;
+ if (periph->id < 2)
+ return 1;
+ if (periph->id > 31)
+ offset = AT91_PMC_PCSR1;
+ return !!(at91_pmc_read(offset) & (1 << (periph->id & 31)));
+}
+
+static const struct clk_ops peripheral_ops = {
+ .enable = clk_peripheral_enable,
+ .disable = clk_peripheral_disable,
+ .is_enabled = clk_peripheral_is_enabled,
+};
+
+struct clk * __init at91_clk_register_peripheral(const char *name,
+ const char *parent_name,
+ u32 id)
+{
+ struct clk_peripheral *periph;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ id &= 31;
+ periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+ if (!periph)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &peripheral_ops;
+ init.parent_names = (parent_name ? &parent_name : NULL);
+ init.num_parents = (parent_name ? 1 : 0);
+ init.flags = 0;
+
+ periph->id = id;
+ periph->hw.init = &init;
+
+ clk = clk_register(NULL, &periph->hw);
+ if (IS_ERR(clk))
+ kfree(periph);
+
+ return clk;
+}
+
+static int clk_sam9x5_peripheral_enable(struct clk_hw *hw)
+{
+ struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+ if (periph->id < 2)
+ return 0;
+ at91_pmc_write(AT91_PMC_PCR,
+ (periph->id & AT91_PMC_PCR_PID) |
+ AT91_PMC_PCR_CMD |
+ AT91_PMC_PCR_DIV(periph->div) |
+ AT91_PMC_PCR_EN);
+ return 0;
+}
+
+static void clk_sam9x5_peripheral_disable(struct clk_hw *hw)
+{
+ struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+ if (periph->id < 2)
+ return;
+
+ at91_pmc_write(AT91_PMC_PCR,
+ (periph->id & AT91_PMC_PCR_PID) |
+ AT91_PMC_PCR_CMD);
+}
+
+static int clk_sam9x5_peripheral_is_enabled(struct clk_hw *hw)
+{
+ struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+ if (periph->id < 2)
+ return 1;
+ at91_pmc_write(AT91_PMC_PCR,
+ (periph->id & AT91_PMC_PCR_PID));
+ return !!(at91_pmc_read(AT91_PMC_PCR) & AT91_PMC_PCR_EN);
+}
+
+static unsigned long
+clk_sam9x5_peripheral_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+ u32 shift;
+ if (periph->id < 2 || !periph->have_div_support)
+ return parent_rate;
+ at91_pmc_write(AT91_PMC_PCR,
+ (periph->id & AT91_PMC_PCR_PID));
+ shift = (at91_pmc_read(AT91_PMC_PCR) >> 16) & 0x3;
+ return parent_rate >> shift;
+}
+
+static long clk_sam9x5_peripheral_round_rate(struct clk_hw *hw,
+ unsigned long rate,
+ unsigned long *parent_rate)
+{
+ int shift;
+ unsigned long best_rate;
+ unsigned long best_diff;
+ unsigned long cur_rate;
+ unsigned long cur_diff;
+ struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+ if (periph->id < 2 || !periph->have_div_support)
+ return *parent_rate;
+ if (rate >= *parent_rate)
+ return rate;
+ best_diff = *parent_rate - rate;
+ best_rate = *parent_rate;
+ for (shift = 1; shift < 4; shift++) {
+ cur_rate = *parent_rate >> shift;
+ if (cur_rate < rate)
+ cur_diff = rate - cur_rate;
+ else
+ cur_diff = cur_rate - rate;
+ if (cur_diff < best_diff) {
+ best_diff = cur_diff;
+ best_rate = cur_rate;
+ }
+ if (!best_diff || cur_rate < rate)
+ break;
+ }
+ return best_rate;
+}
+
+static int clk_sam9x5_peripheral_set_rate(struct clk_hw *hw,
+ unsigned long rate,
+ unsigned long parent_rate)
+{
+ int shift;
+ struct clk_sam9x5_peripheral *periph = to_clk_sam9x5_peripheral(hw);
+ if (periph->id < 2 || !periph->have_div_support) {
+ if (parent_rate == rate)
+ return 0;
+ else
+ return -EINVAL;
+ }
+
+ for (shift = 0; shift < 4; shift++) {
+ if (parent_rate >> shift == rate) {
+ periph->div = shift;
+ return 0;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static const struct clk_ops sam9x5_peripheral_ops = {
+ .enable = clk_sam9x5_peripheral_enable,
+ .disable = clk_sam9x5_peripheral_disable,
+ .is_enabled = clk_sam9x5_peripheral_is_enabled,
+ .recalc_rate = clk_sam9x5_peripheral_recalc_rate,
+ .round_rate = clk_sam9x5_peripheral_round_rate,
+ .set_rate = clk_sam9x5_peripheral_set_rate,
+};
+
+struct clk * __init
+at91_clk_register_sam9x5_peripheral(const char *name,
+ const char *parent_name,
+ u32 id, u32 default_div)
+{
+ struct clk_sam9x5_peripheral *periph;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ periph = kzalloc(sizeof(*periph), GFP_KERNEL);
+ if (!periph)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &sam9x5_peripheral_ops;
+ init.parent_names = (parent_name ? &parent_name : NULL);
+ init.num_parents = (parent_name ? 1 : 0);
+ init.flags = CLK_SET_RATE_GATE;
+
+ periph->id = id;
+ periph->hw.init = &init;
+ periph->div = default_div;
+
+ clk = clk_register(NULL, &periph->hw);
+
+ if (IS_ERR(clk))
+ kfree(periph);
+
+ return clk;
+}
+
+#if defined(CONFIG_OF)
+struct clk_periph_data {
+ struct clk **clks;
+ u8 *ids;
+ unsigned int clk_num;
+};
+
+static struct clk * __init
+of_clk_src_periph_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct clk_periph_data *clk_data = data;
+ unsigned int id = clkspec->args[0];
+ int i;
+
+ if (id >= PERIPHERAL_MAX)
+ goto err;
+
+ for (i = 0; i < clk_data->clk_num; i++) {
+ if (clk_data->ids[i] == id)
+ return clk_data->clks[i];
+ }
+
+err:
+ pr_err("%s: invalid clock id %d\n", __func__, id);
+ return ERR_PTR(-EINVAL);
+}
+
+static void __init
+of_at91_clk_periph_setup(struct device_node *np, u8 type)
+{
+ int num;
+ int tmp;
+ int i;
+ u32 id;
+ struct clk *clk;
+ const char *parent_name;
+ const char *name;
+ u32 divisor;
+ struct clk **clks;
+ u8 *ids;
+ struct clk_periph_data *clktab;
+ parent_name = of_clk_get_parent_name(np, 0);
+ if (!parent_name)
+ return;
+
+ if (!of_get_property(np, "ids", &num))
+ return;
+
+ num /= 4;
+ if (num > PERIPHERAL_MAX)
+ return;
+
+ if (of_property_count_strings(np, "clock-output-names") != num)
+ return;
+
+ if (type == PERIPHERAL_AT91SAM9X5) {
+ if (of_get_property(np, "default-divisors", &tmp) &&
+ (tmp / 4) != num)
+ return;
+ }
+
+ clktab = kzalloc(sizeof(*clktab), GFP_KERNEL);
+ if (!clktab)
+ return;
+
+ ids = kzalloc(num * sizeof(*ids), GFP_KERNEL);
+ if (!ids)
+ goto out_free_clktab;
+
+ clks = kzalloc(num * sizeof(*clks), GFP_KERNEL);
+ if (!clks)
+ goto out_free_ids;
+
+ for (i = 0; i < num; i++) {
+ of_property_read_u32_index(np, "ids", i, &id);
+ of_property_read_string_index(np, "clock-output-names",
+ i, &name);
+ if (type == PERIPHERAL_AT91RM9200) {
+ clk = at91_clk_register_peripheral(name,
+ parent_name, id);
+ } else {
+ if (of_property_read_u32_index(np, "default-divisors",
+ i,
+ &divisor))
+ divisor = 0;
+
+ clk = at91_clk_register_sam9x5_peripheral(name,
+ parent_name,
+ id,
+ divisor);
+ }
+ if (IS_ERR(clk))
+ goto out_free_clks;
+ clks[i] = clk;
+ ids[i] = id;
+ }
+
+ clktab->clk_num = num;
+ clktab->clks = clks;
+ clktab->ids = ids;
+ of_clk_add_provider(np, of_clk_src_periph_get, clktab);
+ return;
+
+out_free_clks:
+ kfree(clks);
+out_free_ids:
+ kfree(ids);
+out_free_clktab:
+ kfree(clktab);
+}
+
+static void __init of_at91rm9200_clk_periph_setup(struct device_node *np)
+{
+ of_at91_clk_periph_setup(np, PERIPHERAL_AT91RM9200);
+}
+CLK_OF_DECLARE(at91rm9200_clk_periph, "atmel,at91rm9200-clk-peripheral",
+ of_at91rm9200_clk_periph_setup);
+
+static void __init of_at91sam9x5_clk_periph_setup(struct device_node *np)
+{
+ of_at91_clk_periph_setup(np, PERIPHERAL_AT91SAM9X5);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_periph, "atmel,at91sam9x5-clk-peripheral",
+ of_at91sam9x5_clk_periph_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index c886226..4addfd6 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -183,9 +183,9 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
-#define AT91_PMC_PCR_DIV2 0x2 /* Peripheral clock is MCK/2 */
-#define AT91_PMC_PCR_DIV4 0x4 /* Peripheral clock is MCK/4 */
-#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */
+#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */
+#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */
+#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */
#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
@@ -259,4 +259,12 @@ at91_clk_register_master(const char *name, int num_parents,
struct clk * __init
at91_clk_register_system(const char *name, const char *parent_name, u8 id);
+struct clk * __init
+at91_clk_register_peripheral(const char *name, const char *parent_name,
+ u32 id);
+
+struct clk * __init
+at91_clk_register_sam9x5_peripheral(const char *name, const char *parent_name,
+ u32 id, u32 default_div);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 07/50] ARM: at91: add PMC programmable clocks support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (5 preceding siblings ...)
2013-06-07 8:34 ` [RFC 06/50] ARM: at91: add PMC peripheral " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 08/50] ARM: at91: add PMC utmi clock " Boris BREZILLON
` (4 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Grant Likely, Rob Herring
Cc: Boris BREZILLON, devicetree-discuss
This is the at91 programmable clocks implementation using common clk
framework.
A programmable clock is a clock which can be exported on a given pin to clock
external devices.
Each programmable clock is given an id (from 0 to 8).
The number of available programmable clocks depends on the SoC you're using.
Programmable clock driver only implements the clock setting (clock rate and
parent setting). It must be chained to a system clock in order to
enable/disable the generated clock.
The PCKX pins used to output the clock signals must be assigned to the
appropriate peripheral (see atmel's datasheets).
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
drivers/clk/at91/Makefile | 2 +
drivers/clk/at91/clk-programmable.c | 370 +++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 18 ++
3 files changed, 390 insertions(+)
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 3e2a670..2d7c119 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -4,3 +4,5 @@
obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
obj-y += clk-system.o clk-peripheral.o
+
+obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
new file mode 100644
index 0000000..e4b1fb0
--- /dev/null
+++ b/drivers/clk/at91/clk-programmable.c
@@ -0,0 +1,370 @@
+/*
+ * drivers/clk/at91/clk-programmable.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define PROG_SOURCE_MAX 5
+#define PROG_MAX 8
+
+#define to_clk_programmable(hw) container_of(hw, struct clk_programmable, hw)
+struct clk_programmable {
+ struct clk_hw hw;
+ u8 id;
+ u8 css;
+ u8 pres;
+ u8 slckmck;
+ struct clk_programmable_layout *layout;
+};
+
+static int clk_programmable_prepare(struct clk_hw *hw)
+{
+ u32 tmp;
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ struct clk_programmable_layout *layout = prog->layout;
+ tmp = prog->css | (prog->pres << layout->pres_shift);
+ if (layout->have_slck_mck && prog->slckmck)
+ tmp |= 1 << 8;
+ at91_pmc_write(AT91_PMC_PCKR(prog->id), tmp);
+ while (!(at91_pmc_read(AT91_PMC_SR) & (AT91_PMC_PCK0RDY << prog->id)))
+ ;
+ return 0;
+}
+
+static int clk_programmable_is_prepared(struct clk_hw *hw)
+{
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ return !!(at91_pmc_read(AT91_PMC_SR) & (AT91_PMC_PCK0RDY << prog->id));
+}
+
+static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ struct clk_programmable_layout *layout = prog->layout;
+ tmp = at91_pmc_read(AT91_PMC_PCKR(prog->id));
+ prog->pres = (tmp >> layout->pres_shift) & 0x7;
+ return parent_rate >> prog->pres;
+}
+
+static long clk_programmable_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ unsigned long best_rate = *parent_rate;
+ unsigned long best_diff;
+ unsigned long new_diff;
+ unsigned long cur_rate;
+ int shift = shift;
+
+ if (rate > *parent_rate)
+ return *parent_rate;
+ else
+ best_diff = *parent_rate - rate;
+
+ if (!best_diff)
+ return best_rate;
+
+ for (shift = 1; shift < 7; shift++) {
+ cur_rate = *parent_rate >> shift;
+
+ if (cur_rate > rate)
+ new_diff = cur_rate - rate;
+ else
+ new_diff = rate - cur_rate;
+
+ if (!new_diff)
+ return cur_rate;
+
+ if (new_diff < best_diff) {
+ best_diff = new_diff;
+ best_rate = cur_rate;
+ }
+
+ if (rate > cur_rate)
+ break;
+
+ }
+
+ return best_rate;
+}
+
+static int clk_programmable_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ struct clk_programmable_layout *layout = prog->layout;
+ if (index > layout->css_mask) {
+ if (index == 4 && layout->have_slck_mck) {
+ prog->css = 0;
+ prog->slckmck = 1;
+ return 0;
+ } else
+ return -EINVAL;
+ }
+
+ prog->css = index;
+ return 0;
+}
+
+static u8 clk_programmable_get_parent(struct clk_hw *hw)
+{
+ u32 tmp;
+ u8 ret;
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ struct clk_programmable_layout *layout = prog->layout;
+ tmp = at91_pmc_read(AT91_PMC_PCKR(prog->id));
+ prog->css = tmp & layout->css_mask;
+ ret = prog->css;
+ if (layout->have_slck_mck) {
+ prog->slckmck = !!(tmp & (1 << 8));
+ if (prog->slckmck && !ret)
+ ret = 4;
+ }
+
+ return ret;
+}
+
+static int clk_programmable_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct clk_programmable *prog = to_clk_programmable(hw);
+ unsigned long best_rate = parent_rate;
+ unsigned long best_diff;
+ unsigned long new_diff;
+ unsigned long cur_rate;
+ int shift = 0;
+
+ if (rate > parent_rate)
+ return parent_rate;
+ else
+ best_diff = parent_rate - rate;
+
+ if (!best_diff) {
+ prog->pres = shift;
+ return 0;
+ }
+
+ for (shift = 1; shift < 7; shift++) {
+ cur_rate = parent_rate >> shift;
+
+ if (cur_rate > rate)
+ new_diff = cur_rate - rate;
+ else
+ new_diff = rate - cur_rate;
+
+ if (!new_diff)
+ break;
+
+ if (new_diff < best_diff) {
+ best_diff = new_diff;
+ best_rate = cur_rate;
+ }
+
+ if (rate > cur_rate)
+ break;
+
+ }
+
+ prog->pres = shift;
+ return 0;
+}
+
+static const struct clk_ops programmable_ops = {
+ .prepare = clk_programmable_prepare,
+ .is_prepared = clk_programmable_is_prepared,
+ .recalc_rate = clk_programmable_recalc_rate,
+ .round_rate = clk_programmable_round_rate,
+ .get_parent = clk_programmable_get_parent,
+ .set_parent = clk_programmable_set_parent,
+ .set_rate = clk_programmable_set_rate,
+};
+
+struct clk * __init
+at91_clk_register_programmable(const char *name, const char **parent_names,
+ u8 num_parents, u8 id,
+ struct clk_programmable_layout *layout)
+{
+ struct clk_programmable *prog;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ id &= 7;
+
+ prog = kzalloc(sizeof(*prog), GFP_KERNEL);
+ if (!prog)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &programmable_ops;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+ init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+ prog->id = id;
+ prog->layout = layout;
+ prog->hw.init = &init;
+
+ clk = clk_register(NULL, &prog->hw);
+
+ if (IS_ERR(clk))
+ kfree(prog);
+
+ return clk;
+}
+
+struct clk_programmable_layout at91rm9200_programmable_layout = {
+ .pres_shift = 2,
+ .css_mask = 0x3,
+ .have_slck_mck = 0,
+};
+
+struct clk_programmable_layout at91sam9g45_programmable_layout = {
+ .pres_shift = 2,
+ .css_mask = 0x3,
+ .have_slck_mck = 1,
+};
+
+struct clk_programmable_layout at91sam9x5_programmable_layout = {
+ .pres_shift = 4,
+ .css_mask = 0x7,
+ .have_slck_mck = 0,
+};
+
+#if defined(CONFIG_OF)
+struct clk_prog_data {
+ struct clk **clks;
+ u8 *ids;
+ unsigned int clk_num;
+};
+
+static struct clk * __init
+of_clk_src_periph_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct clk_prog_data *clk_data = data;
+ unsigned int id = clkspec->args[0];
+ int i;
+
+ if (id >= PROG_MAX)
+ goto err;
+
+ for (i = 0; i < clk_data->clk_num; i++) {
+ if (clk_data->ids[i] == id)
+ return clk_data->clks[i];
+ }
+
+err:
+ pr_err("%s: invalid clock id %d\n", __func__, id);
+ return ERR_PTR(-EINVAL);
+}
+
+static void __init
+of_at91_clk_prog_setup(struct device_node *np,
+ struct clk_programmable_layout *layout)
+{
+ int num;
+ u32 id;
+ int i;
+ struct clk *clk;
+ int num_parents;
+ u8 *ids;
+ struct clk **clks;
+ struct clk_prog_data *clktab;
+ const char *parent_names[PROG_SOURCE_MAX];
+ const char *name = np->name;
+
+ num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+ if (num_parents <= 0 || num_parents > PROG_SOURCE_MAX)
+ return;
+
+ for (i = 0; i < num_parents; ++i) {
+ parent_names[i] = of_clk_get_parent_name(np, i);
+ if (!parent_names[i])
+ return;
+ }
+
+ if (!of_get_property(np, "ids", &num))
+ return;
+
+ num /= 4;
+ if (num > PROG_MAX)
+ return;
+
+ if (of_property_count_strings(np, "clock-output-names") != num)
+ return;
+
+ clktab = kzalloc(sizeof(*clktab), GFP_KERNEL);
+ if (!clktab)
+ return;
+
+ ids = kzalloc(num * sizeof(*ids), GFP_KERNEL);
+ if (!ids)
+ goto out_free_clktab;
+
+ clks = kzalloc(num * sizeof(*clks), GFP_KERNEL);
+ if (!clks)
+ goto out_free_ids;
+
+ for (i = 0; i < num; i++) {
+ of_property_read_u32_index(np, "ids", i, &id);
+ if (id >= PROG_MAX)
+ goto out_free_clks;
+ of_property_read_string_index(np, "clock-output-names",
+ i, &name);
+ clk = at91_clk_register_programmable(name, parent_names,
+ num_parents, id, layout);
+
+ if (IS_ERR(clk))
+ goto out_free_clks;
+ clks[i] = clk;
+ ids[i] = id;
+ }
+
+ clktab->clk_num = num;
+ clktab->clks = clks;
+ clktab->ids = ids;
+ of_clk_add_provider(np, of_clk_src_periph_get, clktab);
+ return;
+
+out_free_clks:
+ kfree(clks);
+out_free_ids:
+ kfree(ids);
+out_free_clktab:
+ kfree(clktab);
+}
+
+
+static void __init of_at91rm9200_clk_prog_setup(struct device_node *np)
+{
+ of_at91_clk_prog_setup(np, &at91rm9200_programmable_layout);
+}
+CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable",
+ of_at91rm9200_clk_prog_setup);
+
+static void __init of_at91sam9g45_clk_prog_setup(struct device_node *np)
+{
+ of_at91_clk_prog_setup(np, &at91sam9g45_programmable_layout);
+}
+CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable",
+ of_at91sam9g45_clk_prog_setup);
+
+static void __init of_at91sam9x5_clk_prog_setup(struct device_node *np)
+{
+ of_at91_clk_prog_setup(np, &at91sam9x5_programmable_layout);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable",
+ of_at91sam9x5_clk_prog_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index 4addfd6..eccdf74 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -221,6 +221,12 @@ struct clk_master_layout {
u8 pres_shift;
};
+struct clk_programmable_layout {
+ u8 pres_shift;
+ u8 css_mask;
+ u8 have_slck_mck;
+};
+
struct clk * __init
at91_clk_register_main(const char *name,
@@ -267,4 +273,16 @@ struct clk * __init
at91_clk_register_sam9x5_peripheral(const char *name, const char *parent_name,
u32 id, u32 default_div);
+
+extern struct clk_programmable_layout at91rm9200_programmable_layout;
+
+extern struct clk_programmable_layout at91sam9g45_programmable_layout;
+
+extern struct clk_programmable_layout at91sam9x5_programmable_layout;
+
+struct clk * __init
+at91_clk_register_programmable(const char *name, const char **parent_names,
+ u8 num_parents, u8 id,
+ struct clk_programmable_layout *layout);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 08/50] ARM: at91: add PMC utmi clock support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (6 preceding siblings ...)
2013-06-07 8:34 ` [RFC 07/50] ARM: at91: add PMC programmable " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 09/50] ARM: at91: add PMC usb " Boris BREZILLON
` (3 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Andrew Victor
Cc: Boris BREZILLON, Russell King
This is the at91 utmi clock implementation using common clk framework.
This clock is a pll with a fixed factor (x40).
It is used as a source for usb clock.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
arch/arm/mach-at91/Kconfig | 7 +++
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-utmi.c | 114 +++++++++++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 4 ++
4 files changed, 126 insertions(+)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 0280238..a4d442d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,5 +1,8 @@
if ARCH_AT91
+config HAVE_AT91_UTMI
+ bool
+
config HAVE_AT91_DBGU0
bool
@@ -65,6 +68,7 @@ config SOC_SAMA5D3
select SOC_SAMA5
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU1
+ select HAVE_AT91_UTMI
help
Select this if you are using one of Atmel's SAMA5D3 family SoC.
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
@@ -106,12 +110,14 @@ config SOC_AT91SAM9RL
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
+ select HAVE_AT91_UTMI
config SOC_AT91SAM9G45
bool "AT91SAM9G45 or AT91SAM9M10 families"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
+ select HAVE_AT91_UTMI
help
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
@@ -121,6 +127,7 @@ config SOC_AT91SAM9X5
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
+ select HAVE_AT91_UTMI
help
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
This means that your SAM9 name finishes with a '5' (except if it is
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 2d7c119..76d09f0 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -6,3 +6,4 @@ obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o
obj-y += clk-system.o clk-peripheral.o
obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o
+obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
new file mode 100644
index 0000000..c0dd596
--- /dev/null
+++ b/drivers/clk/at91/clk-utmi.c
@@ -0,0 +1,114 @@
+/*
+ * drivers/clk/at91/clk-utmi.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This utmiram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define to_clk_utmi(hw) container_of(hw, struct clk_utmi, hw)
+
+struct clk_utmi {
+ struct clk_hw hw;
+};
+
+static int clk_utmi_prepare(struct clk_hw *hw)
+{
+ u32 tmp = at91_pmc_read(AT91_CKGR_UCKR) | AT91_PMC_UPLLEN |
+ AT91_PMC_UPLLCOUNT;
+ at91_pmc_write(AT91_CKGR_UCKR, tmp);
+ while (!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU))
+ ;
+ return 0;
+}
+
+static int clk_utmi_is_prepared(struct clk_hw *hw)
+{
+ return !!(at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU);
+}
+
+static void clk_utmi_disable(struct clk_hw *hw)
+{
+ u32 tmp = at91_pmc_read(AT91_CKGR_UCKR) & ~AT91_PMC_UPLLEN;
+ at91_pmc_write(AT91_CKGR_UCKR, tmp);
+}
+
+static unsigned long clk_utmi_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ return parent_rate * 40;
+}
+
+static const struct clk_ops utmi_ops = {
+ .prepare = clk_utmi_prepare,
+ .is_prepared = clk_utmi_is_prepared,
+ .disable = clk_utmi_disable,
+ .recalc_rate = clk_utmi_recalc_rate,
+};
+
+struct clk * __init
+at91_clk_register_utmi(const char *name, const char *parent_name)
+{
+ struct clk_utmi *utmi;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
+ if (!utmi)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &utmi_ops;
+ init.parent_names = parent_name ? &parent_name : NULL;
+ init.num_parents = parent_name ? 1 : 0;
+ init.flags = CLK_SET_RATE_GATE;
+
+ utmi->hw.init = &init;
+
+ clk = clk_register(NULL, &utmi->hw);
+
+ if (IS_ERR(clk))
+ kfree(utmi);
+
+ return clk;
+}
+
+#if defined(CONFIG_OF)
+static void __init
+of_at91_clk_utmi_setup(struct device_node *np)
+{
+ struct clk *clk;
+ const char *parent_name;
+ const char *name = np->name;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ clk = at91_clk_register_utmi(name, parent_name);
+
+ if (IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+ return;
+}
+
+static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
+{
+ of_at91_clk_utmi_setup(np);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",
+ of_at91sam9x5_clk_utmi_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index eccdf74..18c89c2 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -285,4 +285,8 @@ at91_clk_register_programmable(const char *name, const char **parent_names,
u8 num_parents, u8 id,
struct clk_programmable_layout *layout);
+
+struct clk * __init
+at91_clk_register_utmi(const char *name, const char *parent_name);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 09/50] ARM: at91: add PMC usb clock support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (7 preceding siblings ...)
2013-06-07 8:34 ` [RFC 08/50] ARM: at91: add PMC utmi clock " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 10/50] ARM: at91: add PMC smd " Boris BREZILLON
` (2 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Andrew Victor
Cc: Boris BREZILLON, Russell King
This is the at91 usb clock implementation using common clk framework.
This clock is used to clock usb ports (ohci, ehci and udc).
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
arch/arm/mach-at91/Kconfig | 11 ++
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-usb.c | 303 ++++++++++++++++++++++++++++++++++++++++++++
include/linux/clk/at91.h | 9 ++
4 files changed, 324 insertions(+)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index a4d442d..ce4851d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,9 @@ if ARCH_AT91
config HAVE_AT91_UTMI
bool
+config HAVE_AT91_USB_CLK
+ bool
+
config HAVE_AT91_DBGU0
bool
@@ -69,6 +72,7 @@ config SOC_SAMA5D3
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU1
select HAVE_AT91_UTMI
+ select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's SAMA5D3 family SoC.
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
@@ -82,11 +86,13 @@ config SOC_AT91RM9200
select HAVE_AT91_DBGU0
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
+ select HAVE_AT91_USB_CLK
config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select HAVE_AT91_DBGU0
select SOC_AT91SAM9
+ select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
or AT91SAM9G20 SoC.
@@ -96,6 +102,7 @@ config SOC_AT91SAM9261
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
+ select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
@@ -104,6 +111,7 @@ config SOC_AT91SAM9263
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
+ select HAVE_AT91_USB_CLK
config SOC_AT91SAM9RL
bool "AT91SAM9RL"
@@ -118,6 +126,7 @@ config SOC_AT91SAM9G45
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
+ select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
@@ -128,6 +137,7 @@ config SOC_AT91SAM9X5
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
+ select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
This means that your SAM9 name finishes with a '5' (except if it is
@@ -140,6 +150,7 @@ config SOC_AT91SAM9N12
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
+ select HAVE_AT91_USB_CLK
help
Select this if you are using Atmel's AT91SAM9N12 SoC.
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 76d09f0..bbfd245 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -7,3 +7,4 @@ obj-y += clk-system.o clk-peripheral.o
obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o
obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o
+obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
new file mode 100644
index 0000000..008372e
--- /dev/null
+++ b/drivers/clk/at91/clk-usb.c
@@ -0,0 +1,303 @@
+/*
+ * drivers/clk/at91/clk-usb.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This usbram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define USB_SOURCE_MAX 2
+
+#define to_at91sam9x5_clk_usb(hw) \
+ container_of(hw, struct at91sam9x5_clk_usb, hw)
+struct at91sam9x5_clk_usb {
+ struct clk_hw hw;
+ u8 usbs0_unused; /* sam9n12 uses usbs0 to disable usb clock */
+};
+
+#define to_at91rm9200_clk_usb(hw) \
+ container_of(hw, struct at91rm9200_clk_usb, hw)
+struct at91rm9200_clk_usb {
+ struct clk_hw hw;
+ u32 divisors[4];
+};
+
+static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ u8 usbdiv;
+ tmp = at91_pmc_read(AT91_PMC_USB);
+ usbdiv = (tmp & AT91_PMC_OHCIUSBDIV) >> 8;
+ return parent_rate / (usbdiv + 1);
+}
+
+static long at91sam9x5_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ unsigned long div;
+ unsigned long bestrate;
+ unsigned long tmp;
+
+ if (rate >= *parent_rate)
+ return *parent_rate;
+
+ div = *parent_rate / rate;
+ if (div > 15)
+ return *parent_rate / 16;
+
+ bestrate = *parent_rate / div;
+ tmp = *parent_rate / (div + 1);
+ if (bestrate - rate > rate - tmp)
+ bestrate = tmp;
+
+ return bestrate;
+}
+
+static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
+{
+ u32 tmp;
+ struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+ if (usb->usbs0_unused)
+ index++;
+ if (index > 1)
+ return -EINVAL;
+ tmp = at91_pmc_read(AT91_PMC_USB) & ~AT91_PMC_USBS;
+ if (index)
+ tmp |= AT91_PMC_USBS;
+ at91_pmc_write(AT91_PMC_USB, tmp);
+ return 0;
+}
+
+static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw)
+{
+ struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
+ if (usb->usbs0_unused)
+ return 0;
+ return at91_pmc_read(AT91_PMC_USB) & AT91_PMC_USBS;
+}
+
+static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ unsigned long div = parent_rate / rate;
+ if (parent_rate % rate || div < 1 || div > 16)
+ return -EINVAL;
+ tmp = at91_pmc_read(AT91_PMC_USB) & ~AT91_PMC_OHCIUSBDIV;
+ tmp |= (div - 1) << 8;
+ at91_pmc_write(AT91_PMC_USB, tmp);
+
+ return 0;
+}
+
+static const struct clk_ops at91sam9x5_usb_ops = {
+ .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
+ .round_rate = at91sam9x5_clk_usb_round_rate,
+ .get_parent = at91sam9x5_clk_usb_get_parent,
+ .set_parent = at91sam9x5_clk_usb_set_parent,
+ .set_rate = at91sam9x5_clk_usb_set_rate,
+};
+
+struct clk * __init
+at91sam9x5_clk_register_usb(const char *name, const char **parent_names,
+ u8 num_parents, u8 usbs0_unused)
+{
+ struct at91sam9x5_clk_usb *usb;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ usb = kzalloc(sizeof(*usb), GFP_KERNEL);
+ if (!usb)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &at91sam9x5_usb_ops;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+ init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+ usb->usbs0_unused = usbs0_unused;
+ usb->hw.init = &init;
+
+ clk = clk_register(NULL, &usb->hw);
+
+ if (IS_ERR(clk))
+ kfree(usb);
+
+ return clk;
+}
+
+static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
+ u32 tmp;
+ u8 usbdiv;
+ tmp = at91_pmc_read(AT91_CKGR_PLLBR);
+ usbdiv = (tmp & AT91_PMC_USBDIV) >> 28;
+ if (usb->divisors[usbdiv])
+ return parent_rate / usb->divisors[usbdiv];
+ return 0;
+}
+
+static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
+ unsigned long bestrate = 0;
+ int bestdiff = -1;
+ unsigned long tmprate;
+ int tmpdiff;
+ int i = 0;
+
+ for (i = 0; i < 4; i++) {
+ if (!usb->divisors[i])
+ continue;
+ tmprate = *parent_rate / usb->divisors[i];
+ if (tmprate < rate)
+ tmpdiff = rate - tmprate;
+ else
+ tmpdiff = tmprate - rate;
+
+ if (bestdiff < 0 || bestdiff > tmpdiff) {
+ bestrate = tmprate;
+ bestdiff = tmpdiff;
+ }
+
+ if (!bestdiff)
+ break;
+ }
+
+ return bestrate;
+}
+
+static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ int i;
+ struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
+ unsigned long div = parent_rate / rate;
+ if (parent_rate % rate)
+ return -EINVAL;
+ for (i = 0; i < 4; i++) {
+ if (usb->divisors[i] == div) {
+ tmp = at91_pmc_read(AT91_CKGR_PLLBR) &
+ ~AT91_PMC_USBDIV;
+ tmp |= i << 8;
+ at91_pmc_write(AT91_PMC_USB, tmp);
+ return 0;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static const struct clk_ops at91rm9200_usb_ops = {
+ .recalc_rate = at91rm9200_clk_usb_recalc_rate,
+ .round_rate = at91rm9200_clk_usb_round_rate,
+ .set_rate = at91rm9200_clk_usb_set_rate,
+};
+
+struct clk * __init
+at91rm9200_clk_register_usb(const char *name, const char *parent_name,
+ const u32 *divisors)
+{
+ struct at91rm9200_clk_usb *usb;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ usb = kzalloc(sizeof(*usb), GFP_KERNEL);
+ if (!usb)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &at91rm9200_usb_ops;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+ init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+ usb->hw.init = &init;
+ memcpy(usb->divisors, divisors, sizeof(usb->divisors));
+
+ clk = clk_register(NULL, &usb->hw);
+
+ if (IS_ERR(clk))
+ kfree(usb);
+
+ return clk;
+}
+
+#if defined(CONFIG_OF)
+static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
+{
+ struct clk *clk;
+ int i;
+ int num_parents;
+ u8 usbs0_unused;
+ const char *parent_names[USB_SOURCE_MAX];
+ const char *name = np->name;
+
+ num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+ if (num_parents <= 0 || num_parents >= USB_SOURCE_MAX)
+ return;
+
+ for (i = 0; i < num_parents; i++) {
+ parent_names[i] = of_clk_get_parent_name(np, i);
+ if (!parent_names[i])
+ return;
+ }
+
+ usbs0_unused = of_property_read_bool(np, "usbs0-unused");
+ of_property_read_string(np, "clock-output-names", &name);
+
+ clk = at91sam9x5_clk_register_usb(name, parent_names, num_parents,
+ usbs0_unused);
+
+ if (IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
+ of_at91sam9x5_clk_usb_setup);
+
+static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
+{
+ struct clk *clk;
+ const char *parent_name;
+ const char *name = np->name;
+ u32 divisors[4] = {0, 0, 0, 0};
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ if (!parent_name)
+ return;
+
+ of_property_read_u32_array(np, "divisors", divisors, 4);
+ if (!divisors[0])
+ return;
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ clk = at91rm9200_clk_register_usb(name, parent_name, divisors);
+
+ if (IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
+ of_at91rm9200_clk_usb_setup);
+#endif
diff --git a/include/linux/clk/at91.h b/include/linux/clk/at91.h
index 18c89c2..8a88b38 100644
--- a/include/linux/clk/at91.h
+++ b/include/linux/clk/at91.h
@@ -289,4 +289,13 @@ at91_clk_register_programmable(const char *name, const char **parent_names,
struct clk * __init
at91_clk_register_utmi(const char *name, const char *parent_name);
+
+struct clk * __init
+at91rm9200_clk_register_usb(const char *name, const char *parent_name,
+ const u32 *divisors);
+
+struct clk * __init
+at91sam9x5_clk_register_usb(const char *name, const char **parent_names,
+ u8 num_parents, u8 usbs0_unused);
+
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 10/50] ARM: at91: add PMC smd clock support using common clk framework.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (8 preceding siblings ...)
2013-06-07 8:34 ` [RFC 09/50] ARM: at91: add PMC usb " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 8:34 ` [RFC 11/50] ARM: at91: add PMC clk device tree binding doc Boris BREZILLON
2013-06-07 9:22 ` [RFC 00/50] ARM: at91: move to common clk framework Nicolas Ferre
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel, Andrew Victor
Cc: Boris BREZILLON, Russell King
This is the at91 smd (Soft Modem) clock implementation using common clk
framework.
Not used by any driver right now.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
arch/arm/mach-at91/Kconfig | 5 ++
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-smd.c | 157 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 163 insertions(+)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index ce4851d..8032871 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -27,6 +27,9 @@ config AT91_SAM9G45_RESET
config AT91_SAM9_TIME
bool
+config HAVE_AT91_SMD
+ bool
+
config SOC_AT91SAM9
bool
select AT91_SAM9_TIME
@@ -72,6 +75,7 @@ config SOC_SAMA5D3
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU1
select HAVE_AT91_UTMI
+ select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's SAMA5D3 family SoC.
@@ -137,6 +141,7 @@ config SOC_AT91SAM9X5
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
+ select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index bbfd245..7206f4c 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -8,3 +8,4 @@ obj-y += clk-system.o clk-peripheral.o
obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o
obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o
obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o
+obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o
diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c
new file mode 100644
index 0000000..61bd8a5
--- /dev/null
+++ b/drivers/clk/at91/clk-smd.c
@@ -0,0 +1,157 @@
+/*
+ * drivers/clk/at91/clk-smd.c
+ *
+ * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
+ *
+ * This smdram is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/at91.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+
+#define SMD_SOURCE_MAX 2
+
+#define to_at91sam9x5_clk_smd(hw) \
+ container_of(hw, struct at91sam9x5_clk_smd, hw)
+struct at91sam9x5_clk_smd {
+ struct clk_hw hw;
+};
+
+static unsigned long at91sam9x5_clk_smd_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ u8 smddiv;
+ tmp = at91_pmc_read(AT91_PMC_SMD);
+ smddiv = (tmp & AT91_PMC_SMD_DIV) >> 8;
+ return parent_rate / (smddiv + 1);
+}
+
+static long at91sam9x5_clk_smd_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ unsigned long div;
+ unsigned long bestrate;
+ unsigned long tmp;
+
+ if (rate >= *parent_rate)
+ return *parent_rate;
+
+ div = *parent_rate / rate;
+ if (div > 15)
+ return *parent_rate / 16;
+
+ bestrate = *parent_rate / div;
+ tmp = *parent_rate / (div + 1);
+ if (bestrate - rate > rate - tmp)
+ bestrate = tmp;
+
+ return bestrate;
+}
+
+static int at91sam9x5_clk_smd_set_parent(struct clk_hw *hw, u8 index)
+{
+ u32 tmp;
+ if (index > 1)
+ return -EINVAL;
+ tmp = at91_pmc_read(AT91_PMC_SMD) & ~AT91_PMC_SMDS;
+ if (index)
+ tmp |= AT91_PMC_SMDS;
+ at91_pmc_write(AT91_PMC_SMD, tmp);
+ return 0;
+}
+
+static u8 at91sam9x5_clk_smd_get_parent(struct clk_hw *hw)
+{
+ return at91_pmc_read(AT91_PMC_SMD) & AT91_PMC_SMDS;
+}
+
+static int at91sam9x5_clk_smd_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ u32 tmp;
+ unsigned long div = parent_rate / rate;
+ if (parent_rate % rate || div < 1 || div > 16)
+ return -EINVAL;
+ tmp = at91_pmc_read(AT91_PMC_SMD) & ~AT91_PMC_SMD_DIV;
+ tmp |= (div - 1) << 8;
+ at91_pmc_write(AT91_PMC_SMD, tmp);
+
+ return 0;
+}
+
+static const struct clk_ops at91sam9x5_smd_ops = {
+ .recalc_rate = at91sam9x5_clk_smd_recalc_rate,
+ .round_rate = at91sam9x5_clk_smd_round_rate,
+ .get_parent = at91sam9x5_clk_smd_get_parent,
+ .set_parent = at91sam9x5_clk_smd_set_parent,
+ .set_rate = at91sam9x5_clk_smd_set_rate,
+};
+
+struct clk * __init
+at91sam9x5_clk_register_smd(const char *name, const char **parent_names,
+ u8 num_parents)
+{
+ struct at91sam9x5_clk_smd *smd;
+ struct clk *clk = NULL;
+ struct clk_init_data init;
+
+ smd = kzalloc(sizeof(*smd), GFP_KERNEL);
+ if (!smd)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ init.ops = &at91sam9x5_smd_ops;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+ init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
+
+ smd->hw.init = &init;
+
+ clk = clk_register(NULL, &smd->hw);
+
+ if (IS_ERR(clk))
+ kfree(smd);
+
+ return clk;
+}
+
+#if defined(CONFIG_OF)
+static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
+{
+ struct clk *clk;
+ int i;
+ int num_parents;
+ const char *parent_names[SMD_SOURCE_MAX];
+ const char *name = np->name;
+
+ num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells");
+ if (num_parents <= 0 || num_parents >= SMD_SOURCE_MAX)
+ return;
+
+ for (i = 0; i < num_parents; i++) {
+ parent_names[i] = of_clk_get_parent_name(np, i);
+ if (!parent_names[i])
+ return;
+ }
+
+ of_property_read_string(np, "clock-output-names", &name);
+
+ clk = at91sam9x5_clk_register_smd(name, parent_names, num_parents);
+
+ if (IS_ERR(clk))
+ return;
+
+ of_clk_add_provider(np, of_clk_src_simple_get, clk);
+}
+CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
+ of_at91sam9x5_clk_smd_setup);
+#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [RFC 11/50] ARM: at91: add PMC clk device tree binding doc.
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (9 preceding siblings ...)
2013-06-07 8:34 ` [RFC 10/50] ARM: at91: add PMC smd " Boris BREZILLON
@ 2013-06-07 8:34 ` Boris BREZILLON
2013-06-07 9:22 ` [RFC 00/50] ARM: at91: move to common clk framework Nicolas Ferre
11 siblings, 0 replies; 16+ messages in thread
From: Boris BREZILLON @ 2013-06-07 8:34 UTC (permalink / raw)
To: Mike Turquette, Jean-Christophe Plagniol-Villard, Nicolas Ferre,
linux-arm-kernel, linux-kernel
Cc: Boris BREZILLON, Grant Likely, Rob Herring, Rob Landley,
devicetree-discuss, linux-doc
This is the documentation of the dt bindings used by at91 clks.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
---
.../devicetree/bindings/clock/at91-clock.txt | 247 ++++++++++++++++++++
1 file changed, 247 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
new file mode 100644
index 0000000..63c5d16
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -0,0 +1,247 @@
+Device Tree Clock bindings for arch-at91
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be one of the following:
+ "atmel,at91rm9200-clk-main":
+ at91 main oscillator
+
+ "atmel,at91rm9200-clk-master" or
+ "atmel,at91sam9x5-clk-master":
+ at91 master clock
+
+ "atmel,at91sam9x5-clk-peripheral" or
+ "atmel,at91rm9200-clk-peripheral":
+ at91 peripheral clocks
+
+ "atmel,at91rm9200-clk-pll" or
+ "atmel,at91sam9g45-clk-pll" or
+ "atmel,at91sam9g20-clk-pllb" or
+ "atmel,sama5d3-clk-pll":
+ at91 pll clocks
+
+ "atmel,at91sam9x5-clk-plldiv":
+ at91 plla divisor
+
+ "atmel,at91rm9200-clk-programmable" or
+ "atmel,at91sam9g45-clk-programmable" or
+ "atmel,at91sam9x5-clk-programmable":
+ at91 programmable clocks
+
+ "atmel,at91sam9x5-clk-smd":
+ at91 SMD (Soft Modem) clock
+
+ "atmel,at91rm9200-clk-system":
+ at91 system clocks
+
+ "atmel,at91rm9200-clk-usb" or
+ "atmel,at91sam9x5-clk-usb":
+ at91 usb clock
+
+ "atmel,at91sam9x5-clk-utmi":
+ at91 utmi clock
+
+
+Required properties for main clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks (optional if clock-frequency is provided) : shall be the slow clock
+ phandle. This clock is used to compute the main clock rate if
+ "clock-frequency" is not provided.
+- clock-frequency: the main oscillator frequency.Prefer the use of
+ "clock-frequency" over automatic clock rate computation.
+
+For example:
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&ck32k>;
+ clock-frequency = <18432000>;
+ };
+
+Required properties for master clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the master clock sources (see atmel datasheet) phandles.
+ e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>".
+- characteristics : device tree node describing master clock characteristics.
+ You can find these characteristics in atmel's SoC datasheets.
+ * output : minimum and maximum clock frequency (two u32 fields).
+ e.g. output = <0 133000000>; <=> 0 to 133MHz.
+ * divisors : master clock divisors table (four u32 fields).
+ 0 <=> reserved value.
+ e.g. divisors = <1 2 4 6>;
+ * have-div3-pres : some SoC use the reserved value 7 in the PRES field
+ as CLOCK_DIV3 (e.g sam9x5).
+
+For example:
+ mck: mck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ characteristics = {
+ output = <0 133000000>;
+ divisors = <1 2 4 0>;
+ };
+ };
+
+Required properties for peripheral clocks:
+- #clock-cells : from common clock binding; shall be set to 1. The second cell
+ is used to encode the peripheral id. Peripheral ids are defined in
+ atmel's SoC datasheets.
+- clocks : shall be the master clock phandle.
+ e.g. clocks = <&mck>;
+- ids : peripheral ids (u32 array).
+- clock-output-names : name of clocks. These are the name used during clock
+ registration.
+- "default-divisors" (optional, only available for
+ "atmel,at91sam9x5-clk-peripheral") : sam9x5 and sama5d3 SoC provides
+ configurable peripheral clock divisors. If you define this property
+ (u32 array), the default divisor will be applied when enabling
+ peripheral clock. If not provided the peripheral clock is not divided.
+
+For example:
+ periph: periphck {
+ compatible = "atmel,at91sam9x5-clk-peripheral";
+ #clock-cells = <1>;
+ clocks = <&mck>;
+ ids = <2 6 7>;
+ clock-output-names = "pioA_clk", "pioB_clk", "pioB_clk";
+ default-divisors = <1 2 2>;
+ };
+
+
+Required properties for pll clocks:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the main clock phandle.
+- id : pll id
+ * 0 <=> plla
+ * 1 <=> pllb
+- characteristics : device tree node describing pll clock characteristics.
+ You can find these characteristics in atmel's SoC datasheets.
+ * input : minimum and maximum source clock frequency (two u32 fields).
+ e.g. input = <1 32000000>; <=> 1 to 32MHz.
+ * output : output frequency ranges.
+ * out: out field value for output frequency ranges.
+ * icpll (not available on some SoC): icpll field value for output
+ frequency ranges.
+
+For example:
+ plla: pllack {
+ compatible = "atmel,at91sam9g45-clk-pll";
+ #clock-cells = <0>;
+ clocks = <&main>;
+ id = <0>;
+ input = <2000000 32000000>;
+ output = <74500000 800000000
+ 69500000 750000000
+ 64500000 700000000
+ 59500000 650000000
+ 54500000 600000000
+ 49500000 550000000
+ 44500000 500000000
+ 40000000 450000000>;
+ out = <0 1 2 3 0 1 2 3>;
+ icpll = <0 0 0 0 1 1 1 1>;
+ };
+
+Required properties for plldiv clocks:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the plla clock phandle.
+
+For example:
+ plladiv: plladivck {
+ compatible = "atmel,at91sam9x5-clk-plldiv";
+ #clock-cells = <0>;
+ clocks = <&plla>;
+ };
+
+Required properties for programmable clocks:
+- #clock-cells : from common clock binding; shall be set to 1. The second cell
+ is used to encode the programmable clock id.
+ Peripheral ids are in atmel's SoC
+ datasheets.
+- clocks : shall be the programmable clock source phandles.
+ e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+- ids : programmable clock ids (u32 array).
+- clock-output-names : name of clocks. These names are used during clock
+ registration.
+
+For example:
+ prog: progck {
+ compatible = "atmel,at91sam9g45-clk-programmable";
+ #clock-cells = <1>;
+ ids = <0 1>;
+ clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+ clock-output-names = "prog0", "prog1";
+ };
+
+
+Required properties for smd clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the smd clock source phandles.
+ e.g. clocks = <&plladiv>, <&utmi>;
+
+For example:
+ smd: smdck {
+ compatible = "atmel,at91sam9x5-clk-smd";
+ #clock-cells = <0>;
+ clocks = <&plladiv>, <&utmi>;
+ };
+
+Required properties for system clocks:
+- #clock-cells : from common clock binding; shall be set to 1. The second cell
+ is used to encode the system clock id (bit used in SCER/SCDR register).
+- clocks : shall be the system clock source phandle.
+ e.g. clocks = <&usb>;
+- ids : peripheral ids (u32 array).
+- clock-output-names : name of clocks. These names are used during clock
+ registration.
+
+For example:
+ system: systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #clock-cells = <1>;
+ ids = <2 4 6 7 8 9 10>;
+ clocks = <&mck>, <&smd>, <&usb>, <&usb>,
+ <&prog 0>, <&prog 1>, <&prog 2>;
+ clock-output-names = "ddrck", "smdck", "uhpck", "udpck",
+ "pck0", "pck1", "pck2";
+ };
+
+
+Required properties for usb clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the smd clock source phandles.
+ e.g. clocks = <&pllb>;
+- divisors (only available for "atmel,at91rm9200-clk-usb"):
+ usb clock divisor table.
+ e.g. divisors = <1 2 4 0>;
+- usbs0-unused (only available for "atmel,at91sam9x5-clk-usb"):
+ Some SoC (sam9n12) use usb source 0 to disable the usb clock.
+
+For example:
+ usb: usbck {
+ compatible = "atmel,at91sam9x5-clk-usb";
+ #clock-cells = <0>;
+ clocks = <&plladiv>, <&utmi>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ clocks = <&pllb>;
+ divisors = <1 2 4 0>;
+ };
+
+
+Required properties for utmi clock:
+- #clock-cells : from common clock binding; shall be set to 0.
+- clocks : shall be the main clock source phandle.
+
+For example:
+ utmi: utmick {
+ compatible = "atmel,at91sam9x5-clk-utmi";
+ #clock-cells = <0>;
+ clocks = <&main>;
+ };
--
1.7.9.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [RFC 00/50] ARM: at91: move to common clk framework
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
` (10 preceding siblings ...)
2013-06-07 8:34 ` [RFC 11/50] ARM: at91: add PMC clk device tree binding doc Boris BREZILLON
@ 2013-06-07 9:22 ` Nicolas Ferre
2013-06-07 9:32 ` boris brezillon
11 siblings, 1 reply; 16+ messages in thread
From: Nicolas Ferre @ 2013-06-07 9:22 UTC (permalink / raw)
To: Boris BREZILLON
Cc: Mike Turquette, Jean-Christophe Plagniol-Villard,
linux-arm-kernel, linux-kernel, linux-serial, linux-usb,
linux-fbdev, devicetree-discuss, linux-doc, linux-mmc
On 07/06/2013 10:34, Boris BREZILLON :
> Hello,
>
> This patch series is a proposal to move at91 clock implementation
> to common clk framework.
Before discussion begins I would like to give my kudos to you Boris!
This is huge work and I thank you for it: It is so great!
I am sure that Jean-Christophe will have his idea on that because he
told me that he thought a little bit about that, but I am sure that we
will come to a quick and seamlessly integration soon.
(Hey, I know it is not technical email, but I am so exited to see this
happen that the noise worth it! ;-))
> Most of the clock provided by the PMC (Power Management Controller) are
> implemented :
> - main clock (main oscillator)
> - pll clocks
> - master clock
> - programmable clocks
> - utmi clock
> - peripheral clocks
> - system clocks
>
> This implementation is compatible with device tree: the goal is
> to define the whole clock tree in the device tree (all currently
> available dt SoCs and boards are patched to support dt clocks).
> Please feel free to comment the dt bindinds (I'm not sure about the
> name I choose or the position of clock nodes: children of pmc node).
>
> I removed the register_clocks function in SoC supporting dt boards only:
> - at91sam9x5 SoCs
> - at91sam9n12 SoC
> - sama5d3 SoCs
>
> This patch series also update at91 drivers calling clk_enable/disable
> instead of the preferred clk_prepare_enable/disable_unprepare functions.
>
>
> I know there are a lot of cleanup in progress for at91 arch, so please tell
> me if you think this transition to common clk framework should wait.
>
> This patch series has been tested on Kizbox (sam9g20 SoC) board using device
> tree. It compiles for other SoCs and both with and without dt support, but it
> has not been tested.
>
> The clocks rate/parent change has not been tested.
>
> Best Regards,
> Boris
>
> Boris BREZILLON (50):
> ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to
> include/linux/clk/at91.h
> ARM: at91: add PMC main clock using common clk framework.
> ARM: at91: add PMC pll clocks support using common clk framework.
> ARM: at91: add PMC master clock support using common clk framework.
> ARM: at91: add PMC system clocks support using common clk framework.
> ARM: at91: add PMC peripheral clocks support using common clk
> framework.
> ARM: at91: add PMC programmable clocks support using common clk
> framework.
> ARM: at91: add PMC utmi clock support using common clk framework.
> ARM: at91: add PMC usb clock support using common clk framework.
> ARM: at91: add PMC smd clock support using common clk framework.
> ARM: at91: add PMC clk device tree binding doc.
> ARM: at91: move to common clk framework.
> ARM: at91: move at91rm9200 SoC to common clk framework.
> ARM: at91: move at91sam9260 SoC to common clk framework.
> ARM: at91: move at91sam9263 SoC to common clk framework.
> ARM: at91: move at91sam9263 SoC to common clk framework.
> ARM: at91: move at91sam9g45 SoC to common clk framework.
> ARM: at91: move at91sam9n12 SoC to common clk framework.
> ARM: at91: move at91sam9rl SoC to common clk framework.
> ARM: at91: move at91sam9x5 SoCs to common clk framework.
> ARM: at91: move at91sam9 SoCs to common clk framework.
> ARM: at91: move sama5d3 SoCs to common clk framework.
> ARM: at91: move at91rm9200 non dt boards to common clk framework.
> ARM: at91: move at91sam9 non dt boards to common clk framework.
> ARM: at91: move pit timer to common clk framework.
> ARM: at91/tc/clocksource: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> at_hdmac: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> ASoC: atmel-ssc: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> mmc: atmel-mci: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> pwm: atmel-tcb: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> tty: atmel_serial: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> usb: gadget: at91_udc: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> drivers/usb/host/ehci-atmel.c: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> USB: ohci-at91: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> ARM: at91/avr32/atmel_lcdfb: replace clk_enable/disable with
> clk_prepare_enable/disable_unprepare.
> ARM: at91/dt: move at91rm9200 SoC to clk framework.
> ARM: at91/dt: move at91sam9260 SoC to common clk framework.
> ARM: at91/dt: move at91sam9263 SoC to common clk framework.
> ARM: at91/dt: move at91sam9g45 SoC to common clk framework.
> ARM: at91/dt: move at91sam9n12 SoC to common clk framework.
> ARM: at91/dt: move at91sam9x5 SoCs to common clk framework.
> ARM: at91/dt: move at91sam9g20 SoC to common clk framework.
> ARM: at91/dt: move sama5d3 SoCs to common clk framework.
> ARM: at91/dt: move at91sam9260/sam9g20 boards to common clk
> framework.
> ARM: at91/dt: move at91rm9200 boards to common clk framework.
> ARM: at91/dt: move at91sam9263 boards to common clk framework.
> ARM: at91/dt: move at91sam9g45 boards to common clk framework.
> ARM: at91/dt: move at91sam9n12 boards to common clk framework.
> ARM: at91/dt: move at91sam9x5 boards to common clk framework.
> ARM: at91/dt: move sama5d3 boards to common clk framework.
>
> .../devicetree/bindings/clock/at91-clock.txt | 247 +++++
> arch/arm/boot/dts/animeo_ip.dts | 17 +-
> arch/arm/boot/dts/at91-ariag25.dts | 17 +-
> arch/arm/boot/dts/at91rm9200.dtsi | 133 +++
> arch/arm/boot/dts/at91rm9200ek.dts | 17 +-
> arch/arm/boot/dts/at91sam9260.dtsi | 144 ++-
> arch/arm/boot/dts/at91sam9263.dtsi | 135 +++
> arch/arm/boot/dts/at91sam9263ek.dts | 17 +-
> arch/arm/boot/dts/at91sam9g15.dtsi | 11 +
> arch/arm/boot/dts/at91sam9g20.dtsi | 37 +
> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 17 +-
> arch/arm/boot/dts/at91sam9g25.dtsi | 3 +
> arch/arm/boot/dts/at91sam9g35.dtsi | 23 +
> arch/arm/boot/dts/at91sam9g45.dtsi | 157 ++++
> arch/arm/boot/dts/at91sam9m10g45ek.dts | 17 +-
> arch/arm/boot/dts/at91sam9n12.dtsi | 153 ++++
> arch/arm/boot/dts/at91sam9n12ek.dts | 17 +-
> arch/arm/boot/dts/at91sam9x25.dtsi | 25 +-
> arch/arm/boot/dts/at91sam9x35.dtsi | 3 +
> arch/arm/boot/dts/at91sam9x5.dtsi | 226 +++--
> arch/arm/boot/dts/at91sam9x5_can.dtsi | 24 +
> arch/arm/boot/dts/at91sam9x5_isi.dtsi | 24 +
> arch/arm/boot/dts/at91sam9x5_lcdc.dtsi | 32 +
> arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 68 ++
> arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 56 ++
> arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 60 ++
> arch/arm/boot/dts/ge863-pro3.dtsi | 16 +-
> arch/arm/boot/dts/kizbox.dts | 5 +
> arch/arm/boot/dts/mpa1600.dts | 16 +-
> arch/arm/boot/dts/pm9g45.dts | 16 +-
> arch/arm/boot/dts/sama5d3.dtsi | 358 ++++----
> arch/arm/boot/dts/sama5d31ek.dts | 4 +
> arch/arm/boot/dts/sama5d33ek.dts | 2 +
> arch/arm/boot/dts/sama5d34ek.dts | 4 +
> arch/arm/boot/dts/sama5d35ek.dts | 6 +
> arch/arm/boot/dts/sama5d3_can.dtsi | 67 ++
> arch/arm/boot/dts/sama5d3_emac.dtsi | 56 ++
> arch/arm/boot/dts/sama5d3_gmac.dtsi | 89 ++
> arch/arm/boot/dts/sama5d3_lcd.dtsi | 73 ++
> arch/arm/boot/dts/sama5d3_mci2.dtsi | 59 ++
> arch/arm/boot/dts/sama5d3_tcb1.dtsi | 39 +
> arch/arm/boot/dts/sama5d3_uart.dtsi | 42 +
> arch/arm/boot/dts/sama5d3xcm.dtsi | 17 +-
> arch/arm/boot/dts/tny_a9260_common.dtsi | 17 +-
> arch/arm/boot/dts/tny_a9263.dts | 17 +-
> arch/arm/boot/dts/usb_a9260_common.dtsi | 17 +-
> arch/arm/boot/dts/usb_a9263.dts | 17 +-
> arch/arm/mach-at91/Kconfig | 26 +
> arch/arm/mach-at91/Makefile | 2 +-
> arch/arm/mach-at91/at91rm9200.c | 578 +++++++-----
> arch/arm/mach-at91/at91sam9260.c | 694 +++++++++-----
> arch/arm/mach-at91/at91sam9261.c | 581 ++++++++----
> arch/arm/mach-at91/at91sam9263.c | 599 +++++++-----
> arch/arm/mach-at91/at91sam926x_time.c | 21 +-
> arch/arm/mach-at91/at91sam9g45.c | 705 ++++++++------
> arch/arm/mach-at91/at91sam9g45_devices.c | 1 -
> arch/arm/mach-at91/at91sam9n12.c | 196 +---
> arch/arm/mach-at91/at91sam9rl.c | 514 +++++++----
> arch/arm/mach-at91/at91sam9x5.c | 291 +-----
> arch/arm/mach-at91/board-1arm.c | 12 +-
> arch/arm/mach-at91/board-afeb-9260v1.c | 11 +-
> arch/arm/mach-at91/board-cam60.c | 13 +-
> arch/arm/mach-at91/board-carmeva.c | 13 +-
> arch/arm/mach-at91/board-cpu9krea.c | 12 +-
> arch/arm/mach-at91/board-cpuat91.c | 12 +-
> arch/arm/mach-at91/board-csb337.c | 11 +-
> arch/arm/mach-at91/board-csb637.c | 11 +-
> arch/arm/mach-at91/board-dt-rm9200.c | 9 +-
> arch/arm/mach-at91/board-dt-sam9.c | 9 +-
> arch/arm/mach-at91/board-dt-sama5.c | 9 +-
> arch/arm/mach-at91/board-eb9200.c | 11 +-
> arch/arm/mach-at91/board-ecbat91.c | 12 +-
> arch/arm/mach-at91/board-eco920.c | 13 +-
> arch/arm/mach-at91/board-flexibity.c | 12 +-
> arch/arm/mach-at91/board-foxg20.c | 12 +-
> arch/arm/mach-at91/board-gsia18s.c | 8 +-
> arch/arm/mach-at91/board-kafa.c | 12 +-
> arch/arm/mach-at91/board-kb9202.c | 12 +-
> arch/arm/mach-at91/board-pcontrol-g20.c | 9 +-
> arch/arm/mach-at91/board-picotux200.c | 11 +-
> arch/arm/mach-at91/board-qil-a9260.c | 11 +-
> arch/arm/mach-at91/board-rm9200dk.c | 11 +-
> arch/arm/mach-at91/board-rm9200ek.c | 11 +-
> arch/arm/mach-at91/board-rsi-ews.c | 12 +-
> arch/arm/mach-at91/board-sam9-l9260.c | 11 +-
> arch/arm/mach-at91/board-sam9260ek.c | 11 +-
> arch/arm/mach-at91/board-sam9261ek.c | 15 +-
> arch/arm/mach-at91/board-sam9263ek.c | 11 +-
> arch/arm/mach-at91/board-sam9g20ek.c | 15 +-
> arch/arm/mach-at91/board-sam9m10g45ek.c | 11 +-
> arch/arm/mach-at91/board-sam9rlek.c | 11 +-
> arch/arm/mach-at91/board-snapper9260.c | 12 +-
> arch/arm/mach-at91/board-stamp9g20.c | 15 +-
> arch/arm/mach-at91/board-yl-9200.c | 12 +-
> arch/arm/mach-at91/clock.c | 961 --------------------
> arch/arm/mach-at91/clock.h | 49 -
> arch/arm/mach-at91/generic.h | 10 +-
> arch/arm/mach-at91/pm.c | 2 +-
> arch/arm/mach-at91/pm_slowclock.S | 2 +-
> arch/arm/mach-at91/pmc.c | 58 ++
> arch/arm/mach-at91/sama5d3.c | 344 +------
> arch/arm/mach-at91/setup.c | 38 +-
> arch/arm/mach-at91/stamp9g20.h | 2 +-
> drivers/clk/Makefile | 1 +
> drivers/clk/at91/Makefile | 11 +
> drivers/clk/at91/clk-main.c | 106 +++
> drivers/clk/at91/clk-master.c | 317 +++++++
> drivers/clk/at91/clk-peripheral.c | 376 ++++++++
> drivers/clk/at91/clk-pll.c | 438 +++++++++
> drivers/clk/at91/clk-plldiv.c | 125 +++
> drivers/clk/at91/clk-programmable.c | 370 ++++++++
> drivers/clk/at91/clk-smd.c | 157 ++++
> drivers/clk/at91/clk-system.c | 189 ++++
> drivers/clk/at91/clk-usb.c | 303 ++++++
> drivers/clk/at91/clk-utmi.c | 114 +++
> drivers/clocksource/tcb_clksrc.c | 10 +-
> drivers/dma/at_hdmac.c | 12 +-
> drivers/misc/atmel-ssc.c | 8 +-
> drivers/mmc/host/atmel-mci.c | 16 +-
> drivers/pwm/pwm-atmel-tcb.c | 4 +-
> drivers/tty/serial/atmel_serial.c | 35 +-
> drivers/usb/gadget/at91_udc.c | 12 +-
> drivers/usb/gadget/atmel_usba_udc.c | 2 +-
> drivers/usb/host/ehci-atmel.c | 8 +-
> drivers/usb/host/ohci-at91.c | 12 +-
> drivers/video/atmel_lcdfb.c | 8 +-
> .../mach/at91_pmc.h => include/linux/clk/at91.h | 122 ++-
> 127 files changed, 7588 insertions(+), 3862 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
> create mode 100644 arch/arm/boot/dts/at91sam9x5_can.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9x5_isi.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9x5_lcdc.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb0.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb1.dtsi
> create mode 100644 arch/arm/boot/dts/at91sam9x5_usart3.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_can.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_emac.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_gmac.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_lcd.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_mci2.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_tcb1.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3_uart.dtsi
> delete mode 100644 arch/arm/mach-at91/clock.c
> delete mode 100644 arch/arm/mach-at91/clock.h
> create mode 100644 arch/arm/mach-at91/pmc.c
> create mode 100644 drivers/clk/at91/Makefile
> create mode 100644 drivers/clk/at91/clk-main.c
> create mode 100644 drivers/clk/at91/clk-master.c
> create mode 100644 drivers/clk/at91/clk-peripheral.c
> create mode 100644 drivers/clk/at91/clk-pll.c
> create mode 100644 drivers/clk/at91/clk-plldiv.c
> create mode 100644 drivers/clk/at91/clk-programmable.c
> create mode 100644 drivers/clk/at91/clk-smd.c
> create mode 100644 drivers/clk/at91/clk-system.c
> create mode 100644 drivers/clk/at91/clk-usb.c
> create mode 100644 drivers/clk/at91/clk-utmi.c
> rename arch/arm/mach-at91/include/mach/at91_pmc.h => include/linux/clk/at91.h (76%)
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC 00/50] ARM: at91: move to common clk framework
2013-06-07 9:22 ` [RFC 00/50] ARM: at91: move to common clk framework Nicolas Ferre
@ 2013-06-07 9:32 ` boris brezillon
2013-06-07 10:14 ` Gregory CLEMENT
0 siblings, 1 reply; 16+ messages in thread
From: boris brezillon @ 2013-06-07 9:32 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Mike Turquette, Jean-Christophe Plagniol-Villard,
linux-arm-kernel, linux-kernel, linux-serial, linux-usb,
linux-fbdev, devicetree-discuss, linux-doc, linux-mmc
On 07/06/2013 11:22, Nicolas Ferre wrote:
> On 07/06/2013 10:34, Boris BREZILLON :
>> Hello,
>>
>> This patch series is a proposal to move at91 clock implementation
>> to common clk framework.
>
> Before discussion begins I would like to give my kudos to you Boris!
> This is huge work and I thank you for it: It is so great!
>
> I am sure that Jean-Christophe will have his idea on that because he
> told me that he thought a little bit about that, but I am sure that we
> will come to a quick and seamlessly integration soon.
>
> (Hey, I know it is not technical email, but I am so exited to see this
> happen that the noise worth it! ;-))
I received several notifications about filtered mails.
Could you tell me if you received the whole series ?
And do you know why this could have been filtered ?
>
>> Most of the clock provided by the PMC (Power Management Controller) are
>> implemented :
>> - main clock (main oscillator)
>> - pll clocks
>> - master clock
>> - programmable clocks
>> - utmi clock
>> - peripheral clocks
>> - system clocks
>>
>> This implementation is compatible with device tree: the goal is
>> to define the whole clock tree in the device tree (all currently
>> available dt SoCs and boards are patched to support dt clocks).
>> Please feel free to comment the dt bindinds (I'm not sure about the
>> name I choose or the position of clock nodes: children of pmc node).
>>
>> I removed the register_clocks function in SoC supporting dt boards only:
>> - at91sam9x5 SoCs
>> - at91sam9n12 SoC
>> - sama5d3 SoCs
>>
>> This patch series also update at91 drivers calling clk_enable/disable
>> instead of the preferred clk_prepare_enable/disable_unprepare functions.
>>
>>
>> I know there are a lot of cleanup in progress for at91 arch, so
>> please tell
>> me if you think this transition to common clk framework should wait.
>>
>> This patch series has been tested on Kizbox (sam9g20 SoC) board using
>> device
>> tree. It compiles for other SoCs and both with and without dt
>> support, but it
>> has not been tested.
>>
>> The clocks rate/parent change has not been tested.
>>
>> Best Regards,
>> Boris
>>
>> Boris BREZILLON (50):
>> ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to
>> include/linux/clk/at91.h
>> ARM: at91: add PMC main clock using common clk framework.
>> ARM: at91: add PMC pll clocks support using common clk framework.
>> ARM: at91: add PMC master clock support using common clk framework.
>> ARM: at91: add PMC system clocks support using common clk framework.
>> ARM: at91: add PMC peripheral clocks support using common clk
>> framework.
>> ARM: at91: add PMC programmable clocks support using common clk
>> framework.
>> ARM: at91: add PMC utmi clock support using common clk framework.
>> ARM: at91: add PMC usb clock support using common clk framework.
>> ARM: at91: add PMC smd clock support using common clk framework.
>> ARM: at91: add PMC clk device tree binding doc.
>> ARM: at91: move to common clk framework.
>> ARM: at91: move at91rm9200 SoC to common clk framework.
>> ARM: at91: move at91sam9260 SoC to common clk framework.
>> ARM: at91: move at91sam9263 SoC to common clk framework.
>> ARM: at91: move at91sam9263 SoC to common clk framework.
>> ARM: at91: move at91sam9g45 SoC to common clk framework.
>> ARM: at91: move at91sam9n12 SoC to common clk framework.
>> ARM: at91: move at91sam9rl SoC to common clk framework.
>> ARM: at91: move at91sam9x5 SoCs to common clk framework.
>> ARM: at91: move at91sam9 SoCs to common clk framework.
>> ARM: at91: move sama5d3 SoCs to common clk framework.
>> ARM: at91: move at91rm9200 non dt boards to common clk framework.
>> ARM: at91: move at91sam9 non dt boards to common clk framework.
>> ARM: at91: move pit timer to common clk framework.
>> ARM: at91/tc/clocksource: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> at_hdmac: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> ASoC: atmel-ssc: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> mmc: atmel-mci: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> pwm: atmel-tcb: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> tty: atmel_serial: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> usb: gadget: at91_udc: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> drivers/usb/host/ehci-atmel.c: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> USB: ohci-at91: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> ARM: at91/avr32/atmel_lcdfb: replace clk_enable/disable with
>> clk_prepare_enable/disable_unprepare.
>> ARM: at91/dt: move at91rm9200 SoC to clk framework.
>> ARM: at91/dt: move at91sam9260 SoC to common clk framework.
>> ARM: at91/dt: move at91sam9263 SoC to common clk framework.
>> ARM: at91/dt: move at91sam9g45 SoC to common clk framework.
>> ARM: at91/dt: move at91sam9n12 SoC to common clk framework.
>> ARM: at91/dt: move at91sam9x5 SoCs to common clk framework.
>> ARM: at91/dt: move at91sam9g20 SoC to common clk framework.
>> ARM: at91/dt: move sama5d3 SoCs to common clk framework.
>> ARM: at91/dt: move at91sam9260/sam9g20 boards to common clk
>> framework.
>> ARM: at91/dt: move at91rm9200 boards to common clk framework.
>> ARM: at91/dt: move at91sam9263 boards to common clk framework.
>> ARM: at91/dt: move at91sam9g45 boards to common clk framework.
>> ARM: at91/dt: move at91sam9n12 boards to common clk framework.
>> ARM: at91/dt: move at91sam9x5 boards to common clk framework.
>> ARM: at91/dt: move sama5d3 boards to common clk framework.
>>
>> .../devicetree/bindings/clock/at91-clock.txt | 247 +++++
>> arch/arm/boot/dts/animeo_ip.dts | 17 +-
>> arch/arm/boot/dts/at91-ariag25.dts | 17 +-
>> arch/arm/boot/dts/at91rm9200.dtsi | 133 +++
>> arch/arm/boot/dts/at91rm9200ek.dts | 17 +-
>> arch/arm/boot/dts/at91sam9260.dtsi | 144 ++-
>> arch/arm/boot/dts/at91sam9263.dtsi | 135 +++
>> arch/arm/boot/dts/at91sam9263ek.dts | 17 +-
>> arch/arm/boot/dts/at91sam9g15.dtsi | 11 +
>> arch/arm/boot/dts/at91sam9g20.dtsi | 37 +
>> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 17 +-
>> arch/arm/boot/dts/at91sam9g25.dtsi | 3 +
>> arch/arm/boot/dts/at91sam9g35.dtsi | 23 +
>> arch/arm/boot/dts/at91sam9g45.dtsi | 157 ++++
>> arch/arm/boot/dts/at91sam9m10g45ek.dts | 17 +-
>> arch/arm/boot/dts/at91sam9n12.dtsi | 153 ++++
>> arch/arm/boot/dts/at91sam9n12ek.dts | 17 +-
>> arch/arm/boot/dts/at91sam9x25.dtsi | 25 +-
>> arch/arm/boot/dts/at91sam9x35.dtsi | 3 +
>> arch/arm/boot/dts/at91sam9x5.dtsi | 226 +++--
>> arch/arm/boot/dts/at91sam9x5_can.dtsi | 24 +
>> arch/arm/boot/dts/at91sam9x5_isi.dtsi | 24 +
>> arch/arm/boot/dts/at91sam9x5_lcdc.dtsi | 32 +
>> arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 68 ++
>> arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 56 ++
>> arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 60 ++
>> arch/arm/boot/dts/ge863-pro3.dtsi | 16 +-
>> arch/arm/boot/dts/kizbox.dts | 5 +
>> arch/arm/boot/dts/mpa1600.dts | 16 +-
>> arch/arm/boot/dts/pm9g45.dts | 16 +-
>> arch/arm/boot/dts/sama5d3.dtsi | 358 ++++----
>> arch/arm/boot/dts/sama5d31ek.dts | 4 +
>> arch/arm/boot/dts/sama5d33ek.dts | 2 +
>> arch/arm/boot/dts/sama5d34ek.dts | 4 +
>> arch/arm/boot/dts/sama5d35ek.dts | 6 +
>> arch/arm/boot/dts/sama5d3_can.dtsi | 67 ++
>> arch/arm/boot/dts/sama5d3_emac.dtsi | 56 ++
>> arch/arm/boot/dts/sama5d3_gmac.dtsi | 89 ++
>> arch/arm/boot/dts/sama5d3_lcd.dtsi | 73 ++
>> arch/arm/boot/dts/sama5d3_mci2.dtsi | 59 ++
>> arch/arm/boot/dts/sama5d3_tcb1.dtsi | 39 +
>> arch/arm/boot/dts/sama5d3_uart.dtsi | 42 +
>> arch/arm/boot/dts/sama5d3xcm.dtsi | 17 +-
>> arch/arm/boot/dts/tny_a9260_common.dtsi | 17 +-
>> arch/arm/boot/dts/tny_a9263.dts | 17 +-
>> arch/arm/boot/dts/usb_a9260_common.dtsi | 17 +-
>> arch/arm/boot/dts/usb_a9263.dts | 17 +-
>> arch/arm/mach-at91/Kconfig | 26 +
>> arch/arm/mach-at91/Makefile | 2 +-
>> arch/arm/mach-at91/at91rm9200.c | 578 +++++++-----
>> arch/arm/mach-at91/at91sam9260.c | 694
>> +++++++++-----
>> arch/arm/mach-at91/at91sam9261.c | 581 ++++++++----
>> arch/arm/mach-at91/at91sam9263.c | 599 +++++++-----
>> arch/arm/mach-at91/at91sam926x_time.c | 21 +-
>> arch/arm/mach-at91/at91sam9g45.c | 705
>> ++++++++------
>> arch/arm/mach-at91/at91sam9g45_devices.c | 1 -
>> arch/arm/mach-at91/at91sam9n12.c | 196 +---
>> arch/arm/mach-at91/at91sam9rl.c | 514 +++++++----
>> arch/arm/mach-at91/at91sam9x5.c | 291 +-----
>> arch/arm/mach-at91/board-1arm.c | 12 +-
>> arch/arm/mach-at91/board-afeb-9260v1.c | 11 +-
>> arch/arm/mach-at91/board-cam60.c | 13 +-
>> arch/arm/mach-at91/board-carmeva.c | 13 +-
>> arch/arm/mach-at91/board-cpu9krea.c | 12 +-
>> arch/arm/mach-at91/board-cpuat91.c | 12 +-
>> arch/arm/mach-at91/board-csb337.c | 11 +-
>> arch/arm/mach-at91/board-csb637.c | 11 +-
>> arch/arm/mach-at91/board-dt-rm9200.c | 9 +-
>> arch/arm/mach-at91/board-dt-sam9.c | 9 +-
>> arch/arm/mach-at91/board-dt-sama5.c | 9 +-
>> arch/arm/mach-at91/board-eb9200.c | 11 +-
>> arch/arm/mach-at91/board-ecbat91.c | 12 +-
>> arch/arm/mach-at91/board-eco920.c | 13 +-
>> arch/arm/mach-at91/board-flexibity.c | 12 +-
>> arch/arm/mach-at91/board-foxg20.c | 12 +-
>> arch/arm/mach-at91/board-gsia18s.c | 8 +-
>> arch/arm/mach-at91/board-kafa.c | 12 +-
>> arch/arm/mach-at91/board-kb9202.c | 12 +-
>> arch/arm/mach-at91/board-pcontrol-g20.c | 9 +-
>> arch/arm/mach-at91/board-picotux200.c | 11 +-
>> arch/arm/mach-at91/board-qil-a9260.c | 11 +-
>> arch/arm/mach-at91/board-rm9200dk.c | 11 +-
>> arch/arm/mach-at91/board-rm9200ek.c | 11 +-
>> arch/arm/mach-at91/board-rsi-ews.c | 12 +-
>> arch/arm/mach-at91/board-sam9-l9260.c | 11 +-
>> arch/arm/mach-at91/board-sam9260ek.c | 11 +-
>> arch/arm/mach-at91/board-sam9261ek.c | 15 +-
>> arch/arm/mach-at91/board-sam9263ek.c | 11 +-
>> arch/arm/mach-at91/board-sam9g20ek.c | 15 +-
>> arch/arm/mach-at91/board-sam9m10g45ek.c | 11 +-
>> arch/arm/mach-at91/board-sam9rlek.c | 11 +-
>> arch/arm/mach-at91/board-snapper9260.c | 12 +-
>> arch/arm/mach-at91/board-stamp9g20.c | 15 +-
>> arch/arm/mach-at91/board-yl-9200.c | 12 +-
>> arch/arm/mach-at91/clock.c | 961
>> --------------------
>> arch/arm/mach-at91/clock.h | 49 -
>> arch/arm/mach-at91/generic.h | 10 +-
>> arch/arm/mach-at91/pm.c | 2 +-
>> arch/arm/mach-at91/pm_slowclock.S | 2 +-
>> arch/arm/mach-at91/pmc.c | 58 ++
>> arch/arm/mach-at91/sama5d3.c | 344 +------
>> arch/arm/mach-at91/setup.c | 38 +-
>> arch/arm/mach-at91/stamp9g20.h | 2 +-
>> drivers/clk/Makefile | 1 +
>> drivers/clk/at91/Makefile | 11 +
>> drivers/clk/at91/clk-main.c | 106 +++
>> drivers/clk/at91/clk-master.c | 317 +++++++
>> drivers/clk/at91/clk-peripheral.c | 376 ++++++++
>> drivers/clk/at91/clk-pll.c | 438 +++++++++
>> drivers/clk/at91/clk-plldiv.c | 125 +++
>> drivers/clk/at91/clk-programmable.c | 370 ++++++++
>> drivers/clk/at91/clk-smd.c | 157 ++++
>> drivers/clk/at91/clk-system.c | 189 ++++
>> drivers/clk/at91/clk-usb.c | 303 ++++++
>> drivers/clk/at91/clk-utmi.c | 114 +++
>> drivers/clocksource/tcb_clksrc.c | 10 +-
>> drivers/dma/at_hdmac.c | 12 +-
>> drivers/misc/atmel-ssc.c | 8 +-
>> drivers/mmc/host/atmel-mci.c | 16 +-
>> drivers/pwm/pwm-atmel-tcb.c | 4 +-
>> drivers/tty/serial/atmel_serial.c | 35 +-
>> drivers/usb/gadget/at91_udc.c | 12 +-
>> drivers/usb/gadget/atmel_usba_udc.c | 2 +-
>> drivers/usb/host/ehci-atmel.c | 8 +-
>> drivers/usb/host/ohci-at91.c | 12 +-
>> drivers/video/atmel_lcdfb.c | 8 +-
>> .../mach/at91_pmc.h => include/linux/clk/at91.h | 122 ++-
>> 127 files changed, 7588 insertions(+), 3862 deletions(-)
>> create mode 100644
>> Documentation/devicetree/bindings/clock/at91-clock.txt
>> create mode 100644 arch/arm/boot/dts/at91sam9x5_can.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9x5_isi.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9x5_lcdc.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb0.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb1.dtsi
>> create mode 100644 arch/arm/boot/dts/at91sam9x5_usart3.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_can.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_emac.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_gmac.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_lcd.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_mci2.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_tcb1.dtsi
>> create mode 100644 arch/arm/boot/dts/sama5d3_uart.dtsi
>> delete mode 100644 arch/arm/mach-at91/clock.c
>> delete mode 100644 arch/arm/mach-at91/clock.h
>> create mode 100644 arch/arm/mach-at91/pmc.c
>> create mode 100644 drivers/clk/at91/Makefile
>> create mode 100644 drivers/clk/at91/clk-main.c
>> create mode 100644 drivers/clk/at91/clk-master.c
>> create mode 100644 drivers/clk/at91/clk-peripheral.c
>> create mode 100644 drivers/clk/at91/clk-pll.c
>> create mode 100644 drivers/clk/at91/clk-plldiv.c
>> create mode 100644 drivers/clk/at91/clk-programmable.c
>> create mode 100644 drivers/clk/at91/clk-smd.c
>> create mode 100644 drivers/clk/at91/clk-system.c
>> create mode 100644 drivers/clk/at91/clk-usb.c
>> create mode 100644 drivers/clk/at91/clk-utmi.c
>> rename arch/arm/mach-at91/include/mach/at91_pmc.h =>
>> include/linux/clk/at91.h (76%)
>>
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC 00/50] ARM: at91: move to common clk framework
2013-06-07 9:32 ` boris brezillon
@ 2013-06-07 10:14 ` Gregory CLEMENT
2013-06-07 20:06 ` boris brezillon
0 siblings, 1 reply; 16+ messages in thread
From: Gregory CLEMENT @ 2013-06-07 10:14 UTC (permalink / raw)
To: boris brezillon
Cc: Nicolas Ferre, linux-fbdev, Mike Turquette, linux-doc,
devicetree-discuss, linux-usb, linux-mmc, linux-kernel,
linux-serial, Jean-Christophe Plagniol-Villard, linux-arm-kernel
On 06/07/2013 11:32 AM, boris brezillon wrote:
> On 07/06/2013 11:22, Nicolas Ferre wrote:
>> On 07/06/2013 10:34, Boris BREZILLON :
>>> Hello,
>>>
>>> This patch series is a proposal to move at91 clock implementation
>>> to common clk framework.
>>
>> Before discussion begins I would like to give my kudos to you Boris!
>> This is huge work and I thank you for it: It is so great!
>>
>> I am sure that Jean-Christophe will have his idea on that because he
>> told me that he thought a little bit about that, but I am sure that we
>> will come to a quick and seamlessly integration soon.
>>
>> (Hey, I know it is not technical email, but I am so exited to see this
>> happen that the noise worth it! ;-))
> I received several notifications about filtered mails.
> Could you tell me if you received the whole series ?
I have just received this email. But since few days (or weeks) I have observed
a big latency on the LAKML. Sometime my emails were in the LAKML after 3 or 4
hours.
> And do you know why this could have been filtered ?
There is a filter which prevent to "hijack" a thread by changing the topic.
of course it is a problem for the patch set sent with git send-email. So for
this there is an exception if you have the word PATCH in your topic. But
it doesn't work with the work RFC. Maybe it is the word you have chosen. If
you are in this case then you can use [PATCH RFC ]
Regards
>
>
>>
>>> Most of the clock provided by the PMC (Power Management Controller) are
>>> implemented :
>>> - main clock (main oscillator)
>>> - pll clocks
>>> - master clock
>>> - programmable clocks
>>> - utmi clock
>>> - peripheral clocks
>>> - system clocks
>>>
>>> This implementation is compatible with device tree: the goal is
>>> to define the whole clock tree in the device tree (all currently
>>> available dt SoCs and boards are patched to support dt clocks).
>>> Please feel free to comment the dt bindinds (I'm not sure about the
>>> name I choose or the position of clock nodes: children of pmc node).
>>>
>>> I removed the register_clocks function in SoC supporting dt boards only:
>>> - at91sam9x5 SoCs
>>> - at91sam9n12 SoC
>>> - sama5d3 SoCs
>>>
>>> This patch series also update at91 drivers calling clk_enable/disable
>>> instead of the preferred clk_prepare_enable/disable_unprepare functions.
>>>
>>>
>>> I know there are a lot of cleanup in progress for at91 arch, so
>>> please tell
>>> me if you think this transition to common clk framework should wait.
>>>
>>> This patch series has been tested on Kizbox (sam9g20 SoC) board using
>>> device
>>> tree. It compiles for other SoCs and both with and without dt
>>> support, but it
>>> has not been tested.
>>>
>>> The clocks rate/parent change has not been tested.
>>>
>>> Best Regards,
>>> Boris
>>>
>>> Boris BREZILLON (50):
>>> ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to
>>> include/linux/clk/at91.h
>>> ARM: at91: add PMC main clock using common clk framework.
>>> ARM: at91: add PMC pll clocks support using common clk framework.
>>> ARM: at91: add PMC master clock support using common clk framework.
>>> ARM: at91: add PMC system clocks support using common clk framework.
>>> ARM: at91: add PMC peripheral clocks support using common clk
>>> framework.
>>> ARM: at91: add PMC programmable clocks support using common clk
>>> framework.
>>> ARM: at91: add PMC utmi clock support using common clk framework.
>>> ARM: at91: add PMC usb clock support using common clk framework.
>>> ARM: at91: add PMC smd clock support using common clk framework.
>>> ARM: at91: add PMC clk device tree binding doc.
>>> ARM: at91: move to common clk framework.
>>> ARM: at91: move at91rm9200 SoC to common clk framework.
>>> ARM: at91: move at91sam9260 SoC to common clk framework.
>>> ARM: at91: move at91sam9263 SoC to common clk framework.
>>> ARM: at91: move at91sam9263 SoC to common clk framework.
>>> ARM: at91: move at91sam9g45 SoC to common clk framework.
>>> ARM: at91: move at91sam9n12 SoC to common clk framework.
>>> ARM: at91: move at91sam9rl SoC to common clk framework.
>>> ARM: at91: move at91sam9x5 SoCs to common clk framework.
>>> ARM: at91: move at91sam9 SoCs to common clk framework.
>>> ARM: at91: move sama5d3 SoCs to common clk framework.
>>> ARM: at91: move at91rm9200 non dt boards to common clk framework.
>>> ARM: at91: move at91sam9 non dt boards to common clk framework.
>>> ARM: at91: move pit timer to common clk framework.
>>> ARM: at91/tc/clocksource: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> at_hdmac: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> ASoC: atmel-ssc: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> mmc: atmel-mci: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> pwm: atmel-tcb: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> tty: atmel_serial: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> usb: gadget: at91_udc: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> drivers/usb/host/ehci-atmel.c: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> USB: ohci-at91: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> ARM: at91/avr32/atmel_lcdfb: replace clk_enable/disable with
>>> clk_prepare_enable/disable_unprepare.
>>> ARM: at91/dt: move at91rm9200 SoC to clk framework.
>>> ARM: at91/dt: move at91sam9260 SoC to common clk framework.
>>> ARM: at91/dt: move at91sam9263 SoC to common clk framework.
>>> ARM: at91/dt: move at91sam9g45 SoC to common clk framework.
>>> ARM: at91/dt: move at91sam9n12 SoC to common clk framework.
>>> ARM: at91/dt: move at91sam9x5 SoCs to common clk framework.
>>> ARM: at91/dt: move at91sam9g20 SoC to common clk framework.
>>> ARM: at91/dt: move sama5d3 SoCs to common clk framework.
>>> ARM: at91/dt: move at91sam9260/sam9g20 boards to common clk
>>> framework.
>>> ARM: at91/dt: move at91rm9200 boards to common clk framework.
>>> ARM: at91/dt: move at91sam9263 boards to common clk framework.
>>> ARM: at91/dt: move at91sam9g45 boards to common clk framework.
>>> ARM: at91/dt: move at91sam9n12 boards to common clk framework.
>>> ARM: at91/dt: move at91sam9x5 boards to common clk framework.
>>> ARM: at91/dt: move sama5d3 boards to common clk framework.
>>>
>>> .../devicetree/bindings/clock/at91-clock.txt | 247 +++++
>>> arch/arm/boot/dts/animeo_ip.dts | 17 +-
>>> arch/arm/boot/dts/at91-ariag25.dts | 17 +-
>>> arch/arm/boot/dts/at91rm9200.dtsi | 133 +++
>>> arch/arm/boot/dts/at91rm9200ek.dts | 17 +-
>>> arch/arm/boot/dts/at91sam9260.dtsi | 144 ++-
>>> arch/arm/boot/dts/at91sam9263.dtsi | 135 +++
>>> arch/arm/boot/dts/at91sam9263ek.dts | 17 +-
>>> arch/arm/boot/dts/at91sam9g15.dtsi | 11 +
>>> arch/arm/boot/dts/at91sam9g20.dtsi | 37 +
>>> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 17 +-
>>> arch/arm/boot/dts/at91sam9g25.dtsi | 3 +
>>> arch/arm/boot/dts/at91sam9g35.dtsi | 23 +
>>> arch/arm/boot/dts/at91sam9g45.dtsi | 157 ++++
>>> arch/arm/boot/dts/at91sam9m10g45ek.dts | 17 +-
>>> arch/arm/boot/dts/at91sam9n12.dtsi | 153 ++++
>>> arch/arm/boot/dts/at91sam9n12ek.dts | 17 +-
>>> arch/arm/boot/dts/at91sam9x25.dtsi | 25 +-
>>> arch/arm/boot/dts/at91sam9x35.dtsi | 3 +
>>> arch/arm/boot/dts/at91sam9x5.dtsi | 226 +++--
>>> arch/arm/boot/dts/at91sam9x5_can.dtsi | 24 +
>>> arch/arm/boot/dts/at91sam9x5_isi.dtsi | 24 +
>>> arch/arm/boot/dts/at91sam9x5_lcdc.dtsi | 32 +
>>> arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 68 ++
>>> arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 56 ++
>>> arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 60 ++
>>> arch/arm/boot/dts/ge863-pro3.dtsi | 16 +-
>>> arch/arm/boot/dts/kizbox.dts | 5 +
>>> arch/arm/boot/dts/mpa1600.dts | 16 +-
>>> arch/arm/boot/dts/pm9g45.dts | 16 +-
>>> arch/arm/boot/dts/sama5d3.dtsi | 358 ++++----
>>> arch/arm/boot/dts/sama5d31ek.dts | 4 +
>>> arch/arm/boot/dts/sama5d33ek.dts | 2 +
>>> arch/arm/boot/dts/sama5d34ek.dts | 4 +
>>> arch/arm/boot/dts/sama5d35ek.dts | 6 +
>>> arch/arm/boot/dts/sama5d3_can.dtsi | 67 ++
>>> arch/arm/boot/dts/sama5d3_emac.dtsi | 56 ++
>>> arch/arm/boot/dts/sama5d3_gmac.dtsi | 89 ++
>>> arch/arm/boot/dts/sama5d3_lcd.dtsi | 73 ++
>>> arch/arm/boot/dts/sama5d3_mci2.dtsi | 59 ++
>>> arch/arm/boot/dts/sama5d3_tcb1.dtsi | 39 +
>>> arch/arm/boot/dts/sama5d3_uart.dtsi | 42 +
>>> arch/arm/boot/dts/sama5d3xcm.dtsi | 17 +-
>>> arch/arm/boot/dts/tny_a9260_common.dtsi | 17 +-
>>> arch/arm/boot/dts/tny_a9263.dts | 17 +-
>>> arch/arm/boot/dts/usb_a9260_common.dtsi | 17 +-
>>> arch/arm/boot/dts/usb_a9263.dts | 17 +-
>>> arch/arm/mach-at91/Kconfig | 26 +
>>> arch/arm/mach-at91/Makefile | 2 +-
>>> arch/arm/mach-at91/at91rm9200.c | 578 +++++++-----
>>> arch/arm/mach-at91/at91sam9260.c | 694
>>> +++++++++-----
>>> arch/arm/mach-at91/at91sam9261.c | 581 ++++++++----
>>> arch/arm/mach-at91/at91sam9263.c | 599 +++++++-----
>>> arch/arm/mach-at91/at91sam926x_time.c | 21 +-
>>> arch/arm/mach-at91/at91sam9g45.c | 705
>>> ++++++++------
>>> arch/arm/mach-at91/at91sam9g45_devices.c | 1 -
>>> arch/arm/mach-at91/at91sam9n12.c | 196 +---
>>> arch/arm/mach-at91/at91sam9rl.c | 514 +++++++----
>>> arch/arm/mach-at91/at91sam9x5.c | 291 +-----
>>> arch/arm/mach-at91/board-1arm.c | 12 +-
>>> arch/arm/mach-at91/board-afeb-9260v1.c | 11 +-
>>> arch/arm/mach-at91/board-cam60.c | 13 +-
>>> arch/arm/mach-at91/board-carmeva.c | 13 +-
>>> arch/arm/mach-at91/board-cpu9krea.c | 12 +-
>>> arch/arm/mach-at91/board-cpuat91.c | 12 +-
>>> arch/arm/mach-at91/board-csb337.c | 11 +-
>>> arch/arm/mach-at91/board-csb637.c | 11 +-
>>> arch/arm/mach-at91/board-dt-rm9200.c | 9 +-
>>> arch/arm/mach-at91/board-dt-sam9.c | 9 +-
>>> arch/arm/mach-at91/board-dt-sama5.c | 9 +-
>>> arch/arm/mach-at91/board-eb9200.c | 11 +-
>>> arch/arm/mach-at91/board-ecbat91.c | 12 +-
>>> arch/arm/mach-at91/board-eco920.c | 13 +-
>>> arch/arm/mach-at91/board-flexibity.c | 12 +-
>>> arch/arm/mach-at91/board-foxg20.c | 12 +-
>>> arch/arm/mach-at91/board-gsia18s.c | 8 +-
>>> arch/arm/mach-at91/board-kafa.c | 12 +-
>>> arch/arm/mach-at91/board-kb9202.c | 12 +-
>>> arch/arm/mach-at91/board-pcontrol-g20.c | 9 +-
>>> arch/arm/mach-at91/board-picotux200.c | 11 +-
>>> arch/arm/mach-at91/board-qil-a9260.c | 11 +-
>>> arch/arm/mach-at91/board-rm9200dk.c | 11 +-
>>> arch/arm/mach-at91/board-rm9200ek.c | 11 +-
>>> arch/arm/mach-at91/board-rsi-ews.c | 12 +-
>>> arch/arm/mach-at91/board-sam9-l9260.c | 11 +-
>>> arch/arm/mach-at91/board-sam9260ek.c | 11 +-
>>> arch/arm/mach-at91/board-sam9261ek.c | 15 +-
>>> arch/arm/mach-at91/board-sam9263ek.c | 11 +-
>>> arch/arm/mach-at91/board-sam9g20ek.c | 15 +-
>>> arch/arm/mach-at91/board-sam9m10g45ek.c | 11 +-
>>> arch/arm/mach-at91/board-sam9rlek.c | 11 +-
>>> arch/arm/mach-at91/board-snapper9260.c | 12 +-
>>> arch/arm/mach-at91/board-stamp9g20.c | 15 +-
>>> arch/arm/mach-at91/board-yl-9200.c | 12 +-
>>> arch/arm/mach-at91/clock.c | 961
>>> --------------------
>>> arch/arm/mach-at91/clock.h | 49 -
>>> arch/arm/mach-at91/generic.h | 10 +-
>>> arch/arm/mach-at91/pm.c | 2 +-
>>> arch/arm/mach-at91/pm_slowclock.S | 2 +-
>>> arch/arm/mach-at91/pmc.c | 58 ++
>>> arch/arm/mach-at91/sama5d3.c | 344 +------
>>> arch/arm/mach-at91/setup.c | 38 +-
>>> arch/arm/mach-at91/stamp9g20.h | 2 +-
>>> drivers/clk/Makefile | 1 +
>>> drivers/clk/at91/Makefile | 11 +
>>> drivers/clk/at91/clk-main.c | 106 +++
>>> drivers/clk/at91/clk-master.c | 317 +++++++
>>> drivers/clk/at91/clk-peripheral.c | 376 ++++++++
>>> drivers/clk/at91/clk-pll.c | 438 +++++++++
>>> drivers/clk/at91/clk-plldiv.c | 125 +++
>>> drivers/clk/at91/clk-programmable.c | 370 ++++++++
>>> drivers/clk/at91/clk-smd.c | 157 ++++
>>> drivers/clk/at91/clk-system.c | 189 ++++
>>> drivers/clk/at91/clk-usb.c | 303 ++++++
>>> drivers/clk/at91/clk-utmi.c | 114 +++
>>> drivers/clocksource/tcb_clksrc.c | 10 +-
>>> drivers/dma/at_hdmac.c | 12 +-
>>> drivers/misc/atmel-ssc.c | 8 +-
>>> drivers/mmc/host/atmel-mci.c | 16 +-
>>> drivers/pwm/pwm-atmel-tcb.c | 4 +-
>>> drivers/tty/serial/atmel_serial.c | 35 +-
>>> drivers/usb/gadget/at91_udc.c | 12 +-
>>> drivers/usb/gadget/atmel_usba_udc.c | 2 +-
>>> drivers/usb/host/ehci-atmel.c | 8 +-
>>> drivers/usb/host/ohci-at91.c | 12 +-
>>> drivers/video/atmel_lcdfb.c | 8 +-
>>> .../mach/at91_pmc.h => include/linux/clk/at91.h | 122 ++-
>>> 127 files changed, 7588 insertions(+), 3862 deletions(-)
>>> create mode 100644
>>> Documentation/devicetree/bindings/clock/at91-clock.txt
>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_can.dtsi
>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_isi.dtsi
>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_lcdc.dtsi
>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb0.dtsi
>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb1.dtsi
>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_usart3.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_can.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_emac.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_gmac.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_lcd.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_mci2.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_tcb1.dtsi
>>> create mode 100644 arch/arm/boot/dts/sama5d3_uart.dtsi
>>> delete mode 100644 arch/arm/mach-at91/clock.c
>>> delete mode 100644 arch/arm/mach-at91/clock.h
>>> create mode 100644 arch/arm/mach-at91/pmc.c
>>> create mode 100644 drivers/clk/at91/Makefile
>>> create mode 100644 drivers/clk/at91/clk-main.c
>>> create mode 100644 drivers/clk/at91/clk-master.c
>>> create mode 100644 drivers/clk/at91/clk-peripheral.c
>>> create mode 100644 drivers/clk/at91/clk-pll.c
>>> create mode 100644 drivers/clk/at91/clk-plldiv.c
>>> create mode 100644 drivers/clk/at91/clk-programmable.c
>>> create mode 100644 drivers/clk/at91/clk-smd.c
>>> create mode 100644 drivers/clk/at91/clk-system.c
>>> create mode 100644 drivers/clk/at91/clk-usb.c
>>> create mode 100644 drivers/clk/at91/clk-utmi.c
>>> rename arch/arm/mach-at91/include/mach/at91_pmc.h =>
>>> include/linux/clk/at91.h (76%)
>>>
>>
>>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [RFC 00/50] ARM: at91: move to common clk framework
2013-06-07 10:14 ` Gregory CLEMENT
@ 2013-06-07 20:06 ` boris brezillon
0 siblings, 0 replies; 16+ messages in thread
From: boris brezillon @ 2013-06-07 20:06 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Nicolas Ferre, linux-fbdev, Mike Turquette, linux-doc,
devicetree-discuss, linux-usb, linux-mmc, linux-kernel,
linux-serial, Jean-Christophe Plagniol-Villard, linux-arm-kernel
On 07/06/2013 12:14, Gregory CLEMENT wrote:
> On 06/07/2013 11:32 AM, boris brezillon wrote:
>> On 07/06/2013 11:22, Nicolas Ferre wrote:
>>> On 07/06/2013 10:34, Boris BREZILLON :
>>>> Hello,
>>>>
>>>> This patch series is a proposal to move at91 clock implementation
>>>> to common clk framework.
>>> Before discussion begins I would like to give my kudos to you Boris!
>>> This is huge work and I thank you for it: It is so great!
>>>
>>> I am sure that Jean-Christophe will have his idea on that because he
>>> told me that he thought a little bit about that, but I am sure that we
>>> will come to a quick and seamlessly integration soon.
>>>
>>> (Hey, I know it is not technical email, but I am so exited to see this
>>> happen that the noise worth it! ;-))
>> I received several notifications about filtered mails.
>> Could you tell me if you received the whole series ?
> I have just received this email. But since few days (or weeks) I have observed
> a big latency on the LAKML. Sometime my emails were in the LAKML after 3 or 4
> hours.
>
>> And do you know why this could have been filtered ?
> There is a filter which prevent to "hijack" a thread by changing the topic.
> of course it is a problem for the patch set sent with git send-email. So for
> this there is an exception if you have the word PATCH in your topic. But
> it doesn't work with the work RFC. Maybe it is the word you have chosen. If
> you are in this case then you can use [PATCH RFC ]
Thanks for the tip. It did the trick.
Best Regards,
Boris
> Regards
>
>>
>>>> Most of the clock provided by the PMC (Power Management Controller) are
>>>> implemented :
>>>> - main clock (main oscillator)
>>>> - pll clocks
>>>> - master clock
>>>> - programmable clocks
>>>> - utmi clock
>>>> - peripheral clocks
>>>> - system clocks
>>>>
>>>> This implementation is compatible with device tree: the goal is
>>>> to define the whole clock tree in the device tree (all currently
>>>> available dt SoCs and boards are patched to support dt clocks).
>>>> Please feel free to comment the dt bindinds (I'm not sure about the
>>>> name I choose or the position of clock nodes: children of pmc node).
>>>>
>>>> I removed the register_clocks function in SoC supporting dt boards only:
>>>> - at91sam9x5 SoCs
>>>> - at91sam9n12 SoC
>>>> - sama5d3 SoCs
>>>>
>>>> This patch series also update at91 drivers calling clk_enable/disable
>>>> instead of the preferred clk_prepare_enable/disable_unprepare functions.
>>>>
>>>>
>>>> I know there are a lot of cleanup in progress for at91 arch, so
>>>> please tell
>>>> me if you think this transition to common clk framework should wait.
>>>>
>>>> This patch series has been tested on Kizbox (sam9g20 SoC) board using
>>>> device
>>>> tree. It compiles for other SoCs and both with and without dt
>>>> support, but it
>>>> has not been tested.
>>>>
>>>> The clocks rate/parent change has not been tested.
>>>>
>>>> Best Regards,
>>>> Boris
>>>>
>>>> Boris BREZILLON (50):
>>>> ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to
>>>> include/linux/clk/at91.h
>>>> ARM: at91: add PMC main clock using common clk framework.
>>>> ARM: at91: add PMC pll clocks support using common clk framework.
>>>> ARM: at91: add PMC master clock support using common clk framework.
>>>> ARM: at91: add PMC system clocks support using common clk framework.
>>>> ARM: at91: add PMC peripheral clocks support using common clk
>>>> framework.
>>>> ARM: at91: add PMC programmable clocks support using common clk
>>>> framework.
>>>> ARM: at91: add PMC utmi clock support using common clk framework.
>>>> ARM: at91: add PMC usb clock support using common clk framework.
>>>> ARM: at91: add PMC smd clock support using common clk framework.
>>>> ARM: at91: add PMC clk device tree binding doc.
>>>> ARM: at91: move to common clk framework.
>>>> ARM: at91: move at91rm9200 SoC to common clk framework.
>>>> ARM: at91: move at91sam9260 SoC to common clk framework.
>>>> ARM: at91: move at91sam9263 SoC to common clk framework.
>>>> ARM: at91: move at91sam9263 SoC to common clk framework.
>>>> ARM: at91: move at91sam9g45 SoC to common clk framework.
>>>> ARM: at91: move at91sam9n12 SoC to common clk framework.
>>>> ARM: at91: move at91sam9rl SoC to common clk framework.
>>>> ARM: at91: move at91sam9x5 SoCs to common clk framework.
>>>> ARM: at91: move at91sam9 SoCs to common clk framework.
>>>> ARM: at91: move sama5d3 SoCs to common clk framework.
>>>> ARM: at91: move at91rm9200 non dt boards to common clk framework.
>>>> ARM: at91: move at91sam9 non dt boards to common clk framework.
>>>> ARM: at91: move pit timer to common clk framework.
>>>> ARM: at91/tc/clocksource: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> at_hdmac: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> ASoC: atmel-ssc: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> mmc: atmel-mci: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> pwm: atmel-tcb: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> tty: atmel_serial: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> usb: gadget: at91_udc: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> drivers/usb/host/ehci-atmel.c: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> USB: ohci-at91: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> ARM: at91/avr32/atmel_lcdfb: replace clk_enable/disable with
>>>> clk_prepare_enable/disable_unprepare.
>>>> ARM: at91/dt: move at91rm9200 SoC to clk framework.
>>>> ARM: at91/dt: move at91sam9260 SoC to common clk framework.
>>>> ARM: at91/dt: move at91sam9263 SoC to common clk framework.
>>>> ARM: at91/dt: move at91sam9g45 SoC to common clk framework.
>>>> ARM: at91/dt: move at91sam9n12 SoC to common clk framework.
>>>> ARM: at91/dt: move at91sam9x5 SoCs to common clk framework.
>>>> ARM: at91/dt: move at91sam9g20 SoC to common clk framework.
>>>> ARM: at91/dt: move sama5d3 SoCs to common clk framework.
>>>> ARM: at91/dt: move at91sam9260/sam9g20 boards to common clk
>>>> framework.
>>>> ARM: at91/dt: move at91rm9200 boards to common clk framework.
>>>> ARM: at91/dt: move at91sam9263 boards to common clk framework.
>>>> ARM: at91/dt: move at91sam9g45 boards to common clk framework.
>>>> ARM: at91/dt: move at91sam9n12 boards to common clk framework.
>>>> ARM: at91/dt: move at91sam9x5 boards to common clk framework.
>>>> ARM: at91/dt: move sama5d3 boards to common clk framework.
>>>>
>>>> .../devicetree/bindings/clock/at91-clock.txt | 247 +++++
>>>> arch/arm/boot/dts/animeo_ip.dts | 17 +-
>>>> arch/arm/boot/dts/at91-ariag25.dts | 17 +-
>>>> arch/arm/boot/dts/at91rm9200.dtsi | 133 +++
>>>> arch/arm/boot/dts/at91rm9200ek.dts | 17 +-
>>>> arch/arm/boot/dts/at91sam9260.dtsi | 144 ++-
>>>> arch/arm/boot/dts/at91sam9263.dtsi | 135 +++
>>>> arch/arm/boot/dts/at91sam9263ek.dts | 17 +-
>>>> arch/arm/boot/dts/at91sam9g15.dtsi | 11 +
>>>> arch/arm/boot/dts/at91sam9g20.dtsi | 37 +
>>>> arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 17 +-
>>>> arch/arm/boot/dts/at91sam9g25.dtsi | 3 +
>>>> arch/arm/boot/dts/at91sam9g35.dtsi | 23 +
>>>> arch/arm/boot/dts/at91sam9g45.dtsi | 157 ++++
>>>> arch/arm/boot/dts/at91sam9m10g45ek.dts | 17 +-
>>>> arch/arm/boot/dts/at91sam9n12.dtsi | 153 ++++
>>>> arch/arm/boot/dts/at91sam9n12ek.dts | 17 +-
>>>> arch/arm/boot/dts/at91sam9x25.dtsi | 25 +-
>>>> arch/arm/boot/dts/at91sam9x35.dtsi | 3 +
>>>> arch/arm/boot/dts/at91sam9x5.dtsi | 226 +++--
>>>> arch/arm/boot/dts/at91sam9x5_can.dtsi | 24 +
>>>> arch/arm/boot/dts/at91sam9x5_isi.dtsi | 24 +
>>>> arch/arm/boot/dts/at91sam9x5_lcdc.dtsi | 32 +
>>>> arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 68 ++
>>>> arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 56 ++
>>>> arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 60 ++
>>>> arch/arm/boot/dts/ge863-pro3.dtsi | 16 +-
>>>> arch/arm/boot/dts/kizbox.dts | 5 +
>>>> arch/arm/boot/dts/mpa1600.dts | 16 +-
>>>> arch/arm/boot/dts/pm9g45.dts | 16 +-
>>>> arch/arm/boot/dts/sama5d3.dtsi | 358 ++++----
>>>> arch/arm/boot/dts/sama5d31ek.dts | 4 +
>>>> arch/arm/boot/dts/sama5d33ek.dts | 2 +
>>>> arch/arm/boot/dts/sama5d34ek.dts | 4 +
>>>> arch/arm/boot/dts/sama5d35ek.dts | 6 +
>>>> arch/arm/boot/dts/sama5d3_can.dtsi | 67 ++
>>>> arch/arm/boot/dts/sama5d3_emac.dtsi | 56 ++
>>>> arch/arm/boot/dts/sama5d3_gmac.dtsi | 89 ++
>>>> arch/arm/boot/dts/sama5d3_lcd.dtsi | 73 ++
>>>> arch/arm/boot/dts/sama5d3_mci2.dtsi | 59 ++
>>>> arch/arm/boot/dts/sama5d3_tcb1.dtsi | 39 +
>>>> arch/arm/boot/dts/sama5d3_uart.dtsi | 42 +
>>>> arch/arm/boot/dts/sama5d3xcm.dtsi | 17 +-
>>>> arch/arm/boot/dts/tny_a9260_common.dtsi | 17 +-
>>>> arch/arm/boot/dts/tny_a9263.dts | 17 +-
>>>> arch/arm/boot/dts/usb_a9260_common.dtsi | 17 +-
>>>> arch/arm/boot/dts/usb_a9263.dts | 17 +-
>>>> arch/arm/mach-at91/Kconfig | 26 +
>>>> arch/arm/mach-at91/Makefile | 2 +-
>>>> arch/arm/mach-at91/at91rm9200.c | 578 +++++++-----
>>>> arch/arm/mach-at91/at91sam9260.c | 694
>>>> +++++++++-----
>>>> arch/arm/mach-at91/at91sam9261.c | 581 ++++++++----
>>>> arch/arm/mach-at91/at91sam9263.c | 599 +++++++-----
>>>> arch/arm/mach-at91/at91sam926x_time.c | 21 +-
>>>> arch/arm/mach-at91/at91sam9g45.c | 705
>>>> ++++++++------
>>>> arch/arm/mach-at91/at91sam9g45_devices.c | 1 -
>>>> arch/arm/mach-at91/at91sam9n12.c | 196 +---
>>>> arch/arm/mach-at91/at91sam9rl.c | 514 +++++++----
>>>> arch/arm/mach-at91/at91sam9x5.c | 291 +-----
>>>> arch/arm/mach-at91/board-1arm.c | 12 +-
>>>> arch/arm/mach-at91/board-afeb-9260v1.c | 11 +-
>>>> arch/arm/mach-at91/board-cam60.c | 13 +-
>>>> arch/arm/mach-at91/board-carmeva.c | 13 +-
>>>> arch/arm/mach-at91/board-cpu9krea.c | 12 +-
>>>> arch/arm/mach-at91/board-cpuat91.c | 12 +-
>>>> arch/arm/mach-at91/board-csb337.c | 11 +-
>>>> arch/arm/mach-at91/board-csb637.c | 11 +-
>>>> arch/arm/mach-at91/board-dt-rm9200.c | 9 +-
>>>> arch/arm/mach-at91/board-dt-sam9.c | 9 +-
>>>> arch/arm/mach-at91/board-dt-sama5.c | 9 +-
>>>> arch/arm/mach-at91/board-eb9200.c | 11 +-
>>>> arch/arm/mach-at91/board-ecbat91.c | 12 +-
>>>> arch/arm/mach-at91/board-eco920.c | 13 +-
>>>> arch/arm/mach-at91/board-flexibity.c | 12 +-
>>>> arch/arm/mach-at91/board-foxg20.c | 12 +-
>>>> arch/arm/mach-at91/board-gsia18s.c | 8 +-
>>>> arch/arm/mach-at91/board-kafa.c | 12 +-
>>>> arch/arm/mach-at91/board-kb9202.c | 12 +-
>>>> arch/arm/mach-at91/board-pcontrol-g20.c | 9 +-
>>>> arch/arm/mach-at91/board-picotux200.c | 11 +-
>>>> arch/arm/mach-at91/board-qil-a9260.c | 11 +-
>>>> arch/arm/mach-at91/board-rm9200dk.c | 11 +-
>>>> arch/arm/mach-at91/board-rm9200ek.c | 11 +-
>>>> arch/arm/mach-at91/board-rsi-ews.c | 12 +-
>>>> arch/arm/mach-at91/board-sam9-l9260.c | 11 +-
>>>> arch/arm/mach-at91/board-sam9260ek.c | 11 +-
>>>> arch/arm/mach-at91/board-sam9261ek.c | 15 +-
>>>> arch/arm/mach-at91/board-sam9263ek.c | 11 +-
>>>> arch/arm/mach-at91/board-sam9g20ek.c | 15 +-
>>>> arch/arm/mach-at91/board-sam9m10g45ek.c | 11 +-
>>>> arch/arm/mach-at91/board-sam9rlek.c | 11 +-
>>>> arch/arm/mach-at91/board-snapper9260.c | 12 +-
>>>> arch/arm/mach-at91/board-stamp9g20.c | 15 +-
>>>> arch/arm/mach-at91/board-yl-9200.c | 12 +-
>>>> arch/arm/mach-at91/clock.c | 961
>>>> --------------------
>>>> arch/arm/mach-at91/clock.h | 49 -
>>>> arch/arm/mach-at91/generic.h | 10 +-
>>>> arch/arm/mach-at91/pm.c | 2 +-
>>>> arch/arm/mach-at91/pm_slowclock.S | 2 +-
>>>> arch/arm/mach-at91/pmc.c | 58 ++
>>>> arch/arm/mach-at91/sama5d3.c | 344 +------
>>>> arch/arm/mach-at91/setup.c | 38 +-
>>>> arch/arm/mach-at91/stamp9g20.h | 2 +-
>>>> drivers/clk/Makefile | 1 +
>>>> drivers/clk/at91/Makefile | 11 +
>>>> drivers/clk/at91/clk-main.c | 106 +++
>>>> drivers/clk/at91/clk-master.c | 317 +++++++
>>>> drivers/clk/at91/clk-peripheral.c | 376 ++++++++
>>>> drivers/clk/at91/clk-pll.c | 438 +++++++++
>>>> drivers/clk/at91/clk-plldiv.c | 125 +++
>>>> drivers/clk/at91/clk-programmable.c | 370 ++++++++
>>>> drivers/clk/at91/clk-smd.c | 157 ++++
>>>> drivers/clk/at91/clk-system.c | 189 ++++
>>>> drivers/clk/at91/clk-usb.c | 303 ++++++
>>>> drivers/clk/at91/clk-utmi.c | 114 +++
>>>> drivers/clocksource/tcb_clksrc.c | 10 +-
>>>> drivers/dma/at_hdmac.c | 12 +-
>>>> drivers/misc/atmel-ssc.c | 8 +-
>>>> drivers/mmc/host/atmel-mci.c | 16 +-
>>>> drivers/pwm/pwm-atmel-tcb.c | 4 +-
>>>> drivers/tty/serial/atmel_serial.c | 35 +-
>>>> drivers/usb/gadget/at91_udc.c | 12 +-
>>>> drivers/usb/gadget/atmel_usba_udc.c | 2 +-
>>>> drivers/usb/host/ehci-atmel.c | 8 +-
>>>> drivers/usb/host/ohci-at91.c | 12 +-
>>>> drivers/video/atmel_lcdfb.c | 8 +-
>>>> .../mach/at91_pmc.h => include/linux/clk/at91.h | 122 ++-
>>>> 127 files changed, 7588 insertions(+), 3862 deletions(-)
>>>> create mode 100644
>>>> Documentation/devicetree/bindings/clock/at91-clock.txt
>>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_can.dtsi
>>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_isi.dtsi
>>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_lcdc.dtsi
>>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb0.dtsi
>>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_macb1.dtsi
>>>> create mode 100644 arch/arm/boot/dts/at91sam9x5_usart3.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_can.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_emac.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_gmac.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_lcd.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_mci2.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_tcb1.dtsi
>>>> create mode 100644 arch/arm/boot/dts/sama5d3_uart.dtsi
>>>> delete mode 100644 arch/arm/mach-at91/clock.c
>>>> delete mode 100644 arch/arm/mach-at91/clock.h
>>>> create mode 100644 arch/arm/mach-at91/pmc.c
>>>> create mode 100644 drivers/clk/at91/Makefile
>>>> create mode 100644 drivers/clk/at91/clk-main.c
>>>> create mode 100644 drivers/clk/at91/clk-master.c
>>>> create mode 100644 drivers/clk/at91/clk-peripheral.c
>>>> create mode 100644 drivers/clk/at91/clk-pll.c
>>>> create mode 100644 drivers/clk/at91/clk-plldiv.c
>>>> create mode 100644 drivers/clk/at91/clk-programmable.c
>>>> create mode 100644 drivers/clk/at91/clk-smd.c
>>>> create mode 100644 drivers/clk/at91/clk-system.c
>>>> create mode 100644 drivers/clk/at91/clk-usb.c
>>>> create mode 100644 drivers/clk/at91/clk-utmi.c
>>>> rename arch/arm/mach-at91/include/mach/at91_pmc.h =>
>>>> include/linux/clk/at91.h (76%)
>>>>
>>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2013-06-07 20:07 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-06-07 8:34 [RFC 00/50] ARM: at91: move to common clk framework Boris BREZILLON
2013-06-07 8:34 ` [RFC 01/50] ARM: at91: move arch/arm/mach-at91/include/mach/at91_pmc.h to include/linux/clk/at91.h Boris BREZILLON
2013-06-07 8:34 ` [RFC 02/50] ARM: at91: add PMC main clock support using common clk framework Boris BREZILLON
2013-06-07 8:34 ` [RFC 03/50] ARM: at91: add PMC pll clocks " Boris BREZILLON
2013-06-07 8:34 ` [RFC 04/50] ARM: at91: add PMC master clock " Boris BREZILLON
2013-06-07 8:34 ` [RFC 05/50] ARM: at91: add PMC system clocks " Boris BREZILLON
2013-06-07 8:34 ` [RFC 06/50] ARM: at91: add PMC peripheral " Boris BREZILLON
2013-06-07 8:34 ` [RFC 07/50] ARM: at91: add PMC programmable " Boris BREZILLON
2013-06-07 8:34 ` [RFC 08/50] ARM: at91: add PMC utmi clock " Boris BREZILLON
2013-06-07 8:34 ` [RFC 09/50] ARM: at91: add PMC usb " Boris BREZILLON
2013-06-07 8:34 ` [RFC 10/50] ARM: at91: add PMC smd " Boris BREZILLON
2013-06-07 8:34 ` [RFC 11/50] ARM: at91: add PMC clk device tree binding doc Boris BREZILLON
2013-06-07 9:22 ` [RFC 00/50] ARM: at91: move to common clk framework Nicolas Ferre
2013-06-07 9:32 ` boris brezillon
2013-06-07 10:14 ` Gregory CLEMENT
2013-06-07 20:06 ` boris brezillon
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