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From: James Hogan <james.hogan@imgtec.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Saravana Kannan <skannan@codeaurora.org>
Subject: Re: [PATCH v4 3/5] clk: add support for clock reparent on set_rate
Date: Thu, 13 Jun 2013 15:31:51 +0100	[thread overview]
Message-ID: <51B9D7D7.3070103@imgtec.com> (raw)
In-Reply-To: <519A92DC.2030208@codeaurora.org>

On 20/05/13 22:17, Stephen Boyd wrote:
> On 05/20/13 06:28, James Hogan wrote:
>> diff --git a/Documentation/clk.txt b/Documentation/clk.txt
>> index b9911c2..3110ba4 100644
>> --- a/Documentation/clk.txt
>> +++ b/Documentation/clk.txt
>> @@ -70,6 +70,10 @@ the operations defined in clk.h:
>>  						unsigned long parent_rate);
>>  		long		(*round_rate)(struct clk_hw *hw, unsigned long,
>>  						unsigned long *);
>> +		long		(*determine_rate)(struct clk_hw *hw,
>> +						unsigned long rate,
>> +						unsigned long *best_parent_rate,
>> +						struct clk **best_parent_clk);
>>  		int		(*set_parent)(struct clk_hw *hw, u8 index);
>>  		u8		(*get_parent)(struct clk_hw *hw);
>>  		int		(*set_rate)(struct clk_hw *hw, unsigned long);
> 
> Can you update the clock hardware characteristics table as well?
> 

Yep, I'll add the hunk below to the patch in the next version.

Cheers
James

@@ -179,26 +183,28 @@ mandatory, a cell marked as "n" implies that either including that
 callback is invalid or otherwise unnecessary.  Empty cells are either
 optional or must be evaluated on a case-by-case basis.
 
-                           clock hardware characteristics
-	     -----------------------------------------------------------
-             | gate | change rate | single parent | multiplexer | root |
-             |------|-------------|---------------|-------------|------|
-.prepare     |      |             |               |             |      |
-.unprepare   |      |             |               |             |      |
-             |      |             |               |             |      |
-.enable      | y    |             |               |             |      |
-.disable     | y    |             |               |             |      |
-.is_enabled  | y    |             |               |             |      |
-             |      |             |               |             |      |
-.recalc_rate |      | y           |               |             |      |
-.round_rate  |      | y           |               |             |      |
-.set_rate    |      | y           |               |             |      |
-             |      |             |               |             |      |
-.set_parent  |      |             | n             | y           | n    |
-.get_parent  |      |             | n             | y           | n    |
-             |      |             |               |             |      |
-.init        |      |             |               |             |      |
-	     -----------------------------------------------------------
+                              clock hardware characteristics
+                -----------------------------------------------------------
+                | gate | change rate | single parent | multiplexer | root |
+                |------|-------------|---------------|-------------|------|
+.prepare        |      |             |               |             |      |
+.unprepare      |      |             |               |             |      |
+                |      |             |               |             |      |
+.enable         | y    |             |               |             |      |
+.disable        | y    |             |               |             |      |
+.is_enabled     | y    |             |               |             |      |
+                |      |             |               |             |      |
+.recalc_rate    |      | y           |               |             |      |
+.round_rate     |      | y [1]       |               |             |      |
+.determine_rate |      | y [1]       |               |             |      |
+.set_rate       |      | y           |               |             |      |
+                |      |             |               |             |      |
+.set_parent     |      |             | n             | y           | n    |
+.get_parent     |      |             | n             | y           | n    |
+                |      |             |               |             |      |
+.init           |      |             |               |             |      |
+                -----------------------------------------------------------
+[1] either one of round_rate or determine_rate is required.
 
 Finally, register your clock at run-time with a hardware-specific
 registration function.  This function simply populates struct clk_foo's


  reply	other threads:[~2013-06-13 14:31 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-20 13:28 [PATCH v4 0/5] clk: implement remuxing during set_rate James Hogan
2013-05-20 13:28 ` [PATCH v4 1/5] clk: abstract parent cache James Hogan
2013-05-20 13:28 ` [PATCH v4 2/5] clk: move some parent related functions upwards James Hogan
2013-05-20 21:16   ` Stephen Boyd
2013-05-20 13:28 ` [PATCH v4 3/5] clk: add support for clock reparent on set_rate James Hogan
2013-05-20 21:17   ` Stephen Boyd
2013-06-13 14:31     ` James Hogan [this message]
2013-05-21  5:10   ` Saravana Kannan
2013-05-22 10:13     ` James Hogan
2013-05-20 13:28 ` [PATCH v4 4/5] clk: add CLK_SET_RATE_NO_REPARENT flag James Hogan
2013-05-20 20:44   ` Stephen Warren
2013-05-22 15:52   ` Maxime Ripard
2013-05-20 13:28 ` [PATCH v4 5/5] clk: clk-mux: implement remuxing on set_rate James Hogan
2013-05-21  4:44   ` Saravana Kannan
2013-06-12  1:01     ` Doug Anderson
2013-06-12 17:45       ` Mike Turquette
2013-06-12 17:55         ` Doug Anderson
2013-06-12 18:07           ` Mike Turquette
2013-06-13 15:18       ` James Hogan
2013-06-13 15:02     ` James Hogan
2013-06-06  1:39 ` [PATCH v4 0/5] clk: implement remuxing during set_rate Haojian Zhuang
2013-06-13  1:35 ` Stephen Boyd

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