[PATCH 3/3] regmap: regcache: allow read-only regs to be cached

[PATCH 3/3] regmap: regcache: allow read-only regs to be cached

[Ionut Nicu]

The regmap_writeable() check should not be done in
regcache_write() because this prevents read-only
registers to be cached. After a read on a read-only
register its value will not be stored in the cache
and the next time someone will try to read it the
value will be read from the bus instead of the
cache.

Instead the regmap_writeable() check should be done
in _regmap_write() to prevent callers from writing
to read-only registers.

Signed-off-by: Ionut Nicu <ioan.nicu.ext@nsn.com>
---
 drivers/base/regmap/regcache.c |    3 ---
 drivers/base/regmap/regmap.c   |    3 +++
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index 3455f83..e2abd05 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -241,9 +241,6 @@ int regcache_write(struct regmap *map,
 
 	BUG_ON(!map->cache_ops);
 
-	if (!regmap_writeable(map, reg))
-		return -EIO;
-
 	if (!regmap_volatile(map, reg))
 		return map->cache_ops->write(map, reg, value);
 
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index fa76b61..42b45ac 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -1267,6 +1267,9 @@ int _regmap_write(struct regmap *map, unsigned int reg,
 	int ret;
 	void *context = _regmap_map_get_context(map);
 
+	if (!regmap_writeable(map, reg))
+		return -EIO;
+
 	if (!map->cache_bypass && !map->defer_caching) {
 		ret = regcache_write(map, reg, val);
 		if (ret != 0)
-- 
1.7.1

Re: [PATCH 3/3] regmap: regcache: allow read-only regs to be cached

[Mark Brown]

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On Fri, Aug 09, 2013 at 12:09:20PM +0200, Ionut Nicu wrote:
> The regmap_writeable() check should not be done in
> regcache_write() because this prevents read-only
> registers to be cached. After a read on a read-only
> register its value will not be stored in the cache
> and the next time someone will try to read it the
> value will be read from the bus instead of the
> cache.

Applied, thanks.

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