From: Marc Zyngier <marc.zyngier@arm.com>
To: cinifr <cinifr@gmail.com>
Cc: Mark Rutland <Mark.Rutland@arm.com>,
"coosty@163.com" <coosty@163.com>,
"maxime.ripard@free-electrons.com"
<maxime.ripard@free-electrons.com>,
"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
"linux-sunxi@googlegroups.com" <linux-sunxi@googlegroups.com>
Subject: Re: [PATCH 3/4] Add physical count arch timer support for clocksource in ARMv7.
Date: Fri, 13 Sep 2013 14:40:29 +0100 [thread overview]
Message-ID: <523315CD.8010704@arm.com> (raw)
In-Reply-To: <CAK3cCBw4EKypLmhf4L5_P3d27QzsrB+ZxUTgF58YhmUhBa00xQ@mail.gmail.com>
On 13/09/13 14:09, cinifr wrote:
>> I urge you to read the ARM ARM, and specifically the section dedicated
>> to trapping access to CP15 operations. If you do, you'll quickly notice
>> that you *cannot* trap accesses to the timer subsystem.
>>
> I read it again. The ARMv7 manual said "Is accessible from Non-secure
> PL1 modes only when CNTHCTL.PL1PCTEN is set to 1. When
> CNTHCTL.PL1PCTEN is set to 0, any attempt to access CNTPCT from a
> Non-secure PL1 mode ***generates a Hyp Trap exception***, see Hyp Trap
> exception on page B1-1206" in B8.1.2. but I dont find a special hyp
> trap control for accessing CNTPCT in manual. As you said HSTR cannot
> trap accessing of CP15 c14. What happer when OS access CNTPCT from PL1
> NS=1 mode with CNTHCTL.PL1PCTEN=0 ??? AmI wrong for understanding
> the manual?
That's interesting, as I never noticed this particular line in the ARM
ARM. I'll investigate this, thanks for bringing it up.
This doesn't change the fact that using the physical timer/counter in a
VM is (or can be) horribly expensive, and should be avoided at all cost.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2013-09-13 13:40 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-12 6:51 [PATCH 0/4] Add smp support for Allwinner A20 and phy arch count timer Fan Rong
2013-09-12 6:51 ` [PATCH 1/4] Add smp support for Allwinner A20(sunxi 7i) Fan Rong
2013-09-12 14:26 ` Mark Rutland
2013-09-12 15:53 ` cinifr
2013-09-12 14:40 ` Russell King - ARM Linux
2013-09-12 6:51 ` [PATCH 2/4] Add cpuconfig nodes in dts for smp configure Fan Rong
2013-09-14 11:50 ` Maxime Ripard
2013-09-12 6:51 ` [PATCH 3/4] Add physical count arch timer support for clocksource in ARMv7 Fan Rong
2013-09-12 11:24 ` Mark Rutland
2013-09-12 14:33 ` Russell King - ARM Linux
2013-09-12 16:09 ` cinifr
2013-09-12 15:39 ` [linux-sunxi] " Ian Campbell
2013-09-12 16:07 ` cinifr
2013-09-12 16:39 ` Marc Zyngier
2013-09-13 8:49 ` cinifr
2013-09-13 9:30 ` Marc Zyngier
2013-09-13 13:09 ` cinifr
2013-09-13 13:40 ` Marc Zyngier [this message]
2013-09-13 14:55 ` cinifr
2013-09-18 9:03 ` cinifr
2013-09-14 12:05 ` maxime.ripard
2013-09-16 8:16 ` Marc Zyngier
2013-09-12 6:51 ` [PATCH 4/4] Add arch count timer node in dts for Allwinner A20(sunxi 7i) Fan Rong
2013-09-12 14:57 ` Mark Rutland
2013-09-12 15:44 ` [linux-sunxi] " Ian Campbell
2013-09-12 16:23 ` cinifr
2013-09-12 19:53 ` Henrik Nordström
2013-09-12 14:39 ` [PATCH 0/4] Add smp support for Allwinner A20 and phy arch count timer Mark Rutland
2013-09-12 15:46 ` cinifr
2013-09-13 11:20 ` Mark Rutland
2013-09-13 13:23 ` cinifr
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